diff options
author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-02-12 16:07:43 -0600 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-02-12 16:07:43 -0600 |
commit | 4f8d1a4cef2b23b423ea083078cd933c66c88e2a (patch) | |
tree | c6d7d7567ead8bc2fe34bbf35604cc10d50dd72c /tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini | |
parent | 542d0ceebca1d24bfb433ce9fe916b0586f8d029 (diff) | |
download | gem5-4f8d1a4cef2b23b423ea083078cd933c66c88e2a.tar.xz |
stats: update stats for insts/ops and master id changes
Diffstat (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini')
-rw-r--r-- | tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini | 50 |
1 files changed, 21 insertions, 29 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini index f99b5fb55..4c4894527 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini @@ -1,6 +1,7 @@ [root] type=Root children=system +full_system=false time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 @@ -8,10 +9,16 @@ time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem +boot_osflags=a +init_param=0 +kernel= +load_addr_mask=1099511627775 mem_mode=atomic memories=system.physmem num_work_ids=16 physmem=system.physmem +readfile= +symbolfile= work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -23,16 +30,18 @@ system_port=system.membus.port[0] [system.cpu] type=TimingSimpleCPU -children=dcache dtb icache itb l2cache toL2Bus tracer workload +children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload checker=Null clock=500 cpu_id=0 defer_registration=false do_checkpoint_insts=true +do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb function_trace=false function_trace_start=0 +interrupts=system.cpu.interrupts itb=system.cpu.itb max_insts_all_threads=0 max_insts_any_thread=0 @@ -40,6 +49,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 phase=0 +profile=0 progress_interval=0 system=system tracer=system.cpu.tracer @@ -58,20 +68,13 @@ is_top_level=true latency=1000 max_miss_count=0 mshrs=10 -num_cpus=1 -prefetch_data_accesses_only=false -prefetch_degree=1 -prefetch_latency=10000 prefetch_on_access=false -prefetch_past_page=false -prefetch_policy=none -prefetch_serial_squash=false -prefetch_use_cpu_id=true -prefetcher_size=100 +prefetcher=Null prioritizeRequests=false repl=Null size=262144 subblock_size=0 +system=system tgts_per_mshr=5 trace_addr=0 two_queue=false @@ -94,20 +97,13 @@ is_top_level=true latency=1000 max_miss_count=0 mshrs=10 -num_cpus=1 -prefetch_data_accesses_only=false -prefetch_degree=1 -prefetch_latency=10000 prefetch_on_access=false -prefetch_past_page=false -prefetch_policy=none -prefetch_serial_squash=false -prefetch_use_cpu_id=true -prefetcher_size=100 +prefetcher=Null prioritizeRequests=false repl=Null size=131072 subblock_size=0 +system=system tgts_per_mshr=5 trace_addr=0 two_queue=false @@ -115,6 +111,9 @@ write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.port[0] +[system.cpu.interrupts] +type=AlphaInterrupts + [system.cpu.itb] type=AlphaTLB size=48 @@ -130,20 +129,13 @@ is_top_level=false latency=10000 max_miss_count=0 mshrs=10 -num_cpus=1 -prefetch_data_accesses_only=false -prefetch_degree=1 -prefetch_latency=100000 prefetch_on_access=false -prefetch_past_page=false -prefetch_policy=none -prefetch_serial_squash=false -prefetch_use_cpu_id=true -prefetcher_size=100 +prefetcher=Null prioritizeRequests=false repl=Null size=2097152 subblock_size=0 +system=system tgts_per_mshr=5 trace_addr=0 two_queue=false @@ -167,7 +159,7 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=vortex lendian.raw -cwd=build/ALPHA_SE/tests/opt/long/50.vortex/alpha/tru64/simple-timing +cwd=build/ALPHA/tests/fast/long/se/50.vortex/alpha/tru64/simple-timing egid=100 env= errout=cerr |