diff options
| author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-01-24 12:29:00 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-01-24 12:29:00 -0600 |
| commit | 9bc132e4738c53be2dd9c2fdf5e4dd8e73d8970b (patch) | |
| tree | 64b85031cb791a21af6059778384d358d992b817 /tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout | |
| parent | dbeabedaf0f8d9ec0ea3331db2e44b1add53f79f (diff) | |
| download | gem5-9bc132e4738c53be2dd9c2fdf5e4dd8e73d8970b.tar.xz | |
regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.
Diffstat (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout')
| -rwxr-xr-x | tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout index d2ae983de..e6bb386fa 100755 --- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout +++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout @@ -1,11 +1,13 @@ +Redirecting stdout to build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing/simout +Redirecting stderr to build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 2 2012 08:30:56 -gem5 started Jul 2 2012 10:09:02 -gem5 executing on zizzer -command line: build/ALPHA/gem5.fast -d build/ALPHA/tests/fast/long/se/50.vortex/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/fast/long/se/50.vortex/alpha/tru64/simple-timing +gem5 compiled Jan 23 2013 13:29:14 +gem5 started Jan 23 2013 14:15:43 +gem5 executing on ribera.cs.wisc.edu +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. -Exiting @ tick 134581343000 because target called exit() +Exiting @ tick 133634727000 because target called exit() |