stats: update stats for cache occupancy and clock domain changes

16 files changed, 182 insertions, 43 deletions

diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini
index d10bd65d5..20b5204d0 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini
@@ -120,6 +120,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=262144
 system=system
 tags=system.cpu.dcache.tags
@@ -136,6 +137,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=2
+sequential_access=false
 size=262144
 
 [system.cpu.dtb]
@@ -158,6 +160,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=131072
 system=system
 tags=system.cpu.icache.tags
@@ -174,6 +177,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=2
+sequential_access=false
 size=131072
 
 [system.cpu.interrupts]
@@ -183,6 +187,7 @@ eventq_index=0
 [system.cpu.isa]
 type=AlphaISA
 eventq_index=0
+system=system
 
 [system.cpu.itb]
 type=AlphaTLB
@@ -204,6 +209,7 @@ mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
+sequential_access=false
 size=2097152
 system=system
 tags=system.cpu.l2cache.tags
@@ -220,6 +226,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=20
+sequential_access=false
 size=2097152
 
 [system.cpu.toL2Bus]
@@ -246,7 +253,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex
+executable=/dist/cpu2000/binaries/alpha/tru64/vortex
 gid=100
 input=cin
 max_stack_size=67108864
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr
index 1b49765a7..506aa6e28 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr
@@ -3,4 +3,3 @@ warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
-hack: be nice to actually delete the event here
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simout b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simout
index f56fe9b31..46359a0c9 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simout
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simout
@@ -1,11 +1,11 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 24 2013 03:08:53
-gem5 started Sep 28 2013 09:55:43
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 16:27:55
+gem5 started Jan 22 2014 18:16:43
+gem5 executing on u200540-lin
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/inorder-timing -re tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/inorder-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
-Exiting @ tick 43769191000 because target called exit()
+Exiting @ tick 43690025000 because target called exit()
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt
index fc01eaffa..391c7c37b 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt
@@ -4,13 +4,15 @@ sim_seconds                                  0.043690                       # Nu
 sim_ticks                                 43690025000                       # Number of ticks simulated
 final_tick                                43690025000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                  91247                       # Simulator instruction rate (inst/s)
-host_op_rate                                    91247                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                               45127446                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 283120                       # Number of bytes of host memory used
-host_seconds                                   968.15                       # Real time elapsed on the host
+host_inst_rate                                 133116                       # Simulator instruction rate (inst/s)
+host_op_rate                                   133116                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                               65834414                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 238716                       # Number of bytes of host memory used
+host_seconds                                   663.64                       # Real time elapsed on the host
 sim_insts                                    88340673                       # Number of instructions simulated
 sim_ops                                      88340673                       # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage                       1                       # Voltage in Volts
+system.clk_domain.clock                          1000                       # Clock period in ticks
 system.physmem.bytes_read::cpu.inst            454592                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data          10138368                       # Number of bytes read from this memory
 system.physmem.bytes_read::total             10592960                       # Number of bytes read from this memory
@@ -331,6 +333,7 @@ system.membus.reqLayer0.occupancy          1218631000                       # La
 system.membus.reqLayer0.utilization               2.8                       # Layer utilization (%)
 system.membus.respLayer1.occupancy         1521663500                       # Layer occupancy (ticks)
 system.membus.respLayer1.utilization              3.5                       # Layer utilization (%)
+system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.branchPred.lookups                18742723                       # Number of BP lookups
 system.cpu.branchPred.condPredicted          12318363                       # Number of conditional branches predicted
 system.cpu.branchPred.condIncorrect           4775680                       # Number of conditional branches incorrect
@@ -442,6 +445,14 @@ system.cpu.icache.tags.warmup_cycle                 0                       # Cy
 system.cpu.icache.tags.occ_blocks::cpu.inst  1906.431852                       # Average occupied blocks per requestor
 system.cpu.icache.tags.occ_percent::cpu.inst     0.930875                       # Average percentage of cache occupancy
 system.cpu.icache.tags.occ_percent::total     0.930875                       # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_task_id_blocks::1024         2046                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0           61                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::1          105                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3         1090                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::4          790                       # Occupied blocks per task id
+system.cpu.icache.tags.occ_task_id_percent::1024     0.999023                       # Percentage of cache occupancy per task id
+system.cpu.icache.tags.tag_accesses          24821911                       # Number of tag accesses
+system.cpu.icache.tags.data_accesses         24821911                       # Number of data accesses
 system.cpu.icache.ReadReq_hits::cpu.inst     12250505                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total        12250505                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst      12250505                       # number of demand (read+write) hits
@@ -550,6 +561,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks     0.826966
 system.cpu.l2cache.tags.occ_percent::cpu.inst     0.061272                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::cpu.data     0.054475                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::total     0.942712                       # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_task_id_blocks::1024        32060                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::0          137                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::1         1155                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::2        17071                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::3        13589                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::4          108                       # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1024     0.978394                       # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.tag_accesses          3980332                       # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses         3980332                       # Number of data accesses
 system.cpu.l2cache.ReadReq_hits::cpu.inst        79314                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::cpu.data        33055                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::total         112369                       # number of ReadReq hits
@@ -684,6 +704,13 @@ system.cpu.dcache.tags.warmup_cycle         297515000                       # Cy
 system.cpu.dcache.tags.occ_blocks::cpu.data  4076.382661                       # Average occupied blocks per requestor
 system.cpu.dcache.tags.occ_percent::cpu.data     0.995211                       # Average percentage of cache occupancy
 system.cpu.dcache.tags.occ_percent::total     0.995211                       # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_task_id_blocks::1024         4096                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0           56                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1          922                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2         3118                       # Occupied blocks per task id
+system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
+system.cpu.dcache.tags.tag_accesses          69984376                       # Number of tag accesses
+system.cpu.dcache.tags.data_accesses         69984376                       # Number of data accesses
 system.cpu.dcache.ReadReq_hits::cpu.data     20180292                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total        20180292                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data     13574591                       # number of WriteReq hits
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
index 08705e6b8..f15dfa96f 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
@@ -159,6 +159,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=262144
 system=system
 tags=system.cpu.dcache.tags
@@ -175,6 +176,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=2
+sequential_access=false
 size=262144
 
 [system.cpu.dtb]
@@ -504,6 +506,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=131072
 system=system
 tags=system.cpu.icache.tags
@@ -520,6 +523,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=2
+sequential_access=false
 size=131072
 
 [system.cpu.interrupts]
@@ -529,6 +533,7 @@ eventq_index=0
 [system.cpu.isa]
 type=AlphaISA
 eventq_index=0
+system=system
 
 [system.cpu.itb]
 type=AlphaTLB
@@ -550,6 +555,7 @@ mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
+sequential_access=false
 size=2097152
 system=system
 tags=system.cpu.l2cache.tags
@@ -566,6 +572,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=20
+sequential_access=false
 size=2097152
 
 [system.cpu.toL2Bus]
@@ -592,7 +599,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex
+executable=/dist/cpu2000/binaries/alpha/tru64/vortex
 gid=100
 input=cin
 max_stack_size=67108864
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr
index 1b49765a7..506aa6e28 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr
@@ -3,4 +3,3 @@ warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
-hack: be nice to actually delete the event here
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout
index d12ffcc4f..86191115c 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout
@@ -1,11 +1,11 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Oct 15 2013 18:24:51
-gem5 started Oct 16 2013 01:34:33
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 16:27:55
+gem5 started Jan 22 2014 18:24:06
+gem5 executing on u200540-lin
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
-Exiting @ tick 24977022500 because target called exit()
+Exiting @ tick 24876941500 because target called exit()
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
index 63551bce4..629fb2f13 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,13 +4,15 @@ sim_seconds                                  0.024877                       # Nu
 sim_ticks                                 24876941500                       # Number of ticks simulated
 final_tick                                24876941500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 131928                       # Simulator instruction rate (inst/s)
-host_op_rate                                   131928                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                               41235030                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 285168                       # Number of bytes of host memory used
-host_seconds                                   603.30                       # Real time elapsed on the host
+host_inst_rate                                 202143                       # Simulator instruction rate (inst/s)
+host_op_rate                                   202143                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                               63181048                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 239772                       # Number of bytes of host memory used
+host_seconds                                   393.74                       # Real time elapsed on the host
 sim_insts                                    79591756                       # Number of instructions simulated
 sim_ops                                      79591756                       # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage                       1                       # Voltage in Volts
+system.clk_domain.clock                          1000                       # Clock period in ticks
 system.physmem.bytes_read::cpu.inst            490624                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data          10154752                       # Number of bytes read from this memory
 system.physmem.bytes_read::total             10645376                       # Number of bytes read from this memory
@@ -324,6 +326,7 @@ system.membus.reqLayer0.occupancy          1242193000                       # La
 system.membus.reqLayer0.utilization               5.0                       # Layer utilization (%)
 system.membus.respLayer1.occupancy         1539567000                       # Layer occupancy (ticks)
 system.membus.respLayer1.utilization              6.2                       # Layer utilization (%)
+system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.branchPred.lookups                16535475                       # Number of BP lookups
 system.cpu.branchPred.condPredicted          10680150                       # Number of conditional branches predicted
 system.cpu.branchPred.condIncorrect            413128                       # Number of conditional branches incorrect
@@ -656,6 +659,15 @@ system.cpu.icache.tags.warmup_cycle       20019697250                       # Cy
 system.cpu.icache.tags.occ_blocks::cpu.inst  1926.124790                       # Average occupied blocks per requestor
 system.cpu.icache.tags.occ_percent::cpu.inst     0.940491                       # Average percentage of cache occupancy
 system.cpu.icache.tags.occ_percent::total     0.940491                       # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_task_id_blocks::1024         2048                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0           66                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::1           91                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::2            1                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3         1531                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::4          359                       # Occupied blocks per task id
+system.cpu.icache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
+system.cpu.icache.tags.tag_accesses          27896466                       # Number of tag accesses
+system.cpu.icache.tags.data_accesses         27896466                       # Number of data accesses
 system.cpu.icache.ReadReq_hits::cpu.inst     13794941                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total        13794941                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst      13794941                       # number of demand (read+write) hits
@@ -744,6 +756,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks     0.803864
 system.cpu.l2cache.tags.occ_percent::cpu.inst     0.064255                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::cpu.data     0.068608                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::total     0.936727                       # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_task_id_blocks::1024        32069                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::0          167                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::1         1443                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::2        18046                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::3        12352                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::4           61                       # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1024     0.978668                       # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.tag_accesses          4053036                       # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses         4053036                       # Number of data accesses
 system.cpu.l2cache.ReadReq_hits::cpu.inst        86004                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::cpu.data        34262                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::total         120266                       # number of ReadReq hits
@@ -878,6 +899,13 @@ system.cpu.dcache.tags.warmup_cycle         220306250                       # Cy
 system.cpu.dcache.tags.occ_blocks::cpu.data  4074.011744                       # Average occupied blocks per requestor
 system.cpu.dcache.tags.occ_percent::cpu.data     0.994632                       # Average percentage of cache occupancy
 system.cpu.dcache.tags.occ_percent::total     0.994632                       # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_task_id_blocks::1024         4096                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0           78                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1         1078                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2         2940                       # Occupied blocks per task id
+system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
+system.cpu.dcache.tags.tag_accesses          71186914                       # Number of tag accesses
+system.cpu.dcache.tags.data_accesses         71186914                       # Number of data accesses
 system.cpu.dcache.ReadReq_hits::cpu.data     20609776                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total        20609776                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data     13574069                       # number of WriteReq hits
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
index c0c8f0dec..16ac17b8d 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
@@ -1,7 +1,9 @@
 [root]
 type=Root
 children=system
+eventq_index=0
 full_system=false
+sim_quantum=0
 time_sync_enable=false
 time_sync_period=100000000000
 time_sync_spin_threshold=100000000
@@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
 boot_osflags=a
 cache_line_size=64
 clk_domain=system.clk_domain
+eventq_index=0
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -33,6 +36,7 @@ system_port=system.membus.slave[0]
 [system.clk_domain]
 type=SrcClockDomain
 clock=1000
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.cpu]
@@ -45,6 +49,7 @@ do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
 dtb=system.cpu.dtb
+eventq_index=0
 fastmem=false
 function_trace=false
 function_trace_start=0
@@ -74,20 +79,26 @@ icache_port=system.membus.slave[1]
 
 [system.cpu.dtb]
 type=AlphaTLB
+eventq_index=0
 size=64
 
 [system.cpu.interrupts]
 type=AlphaInterrupts
+eventq_index=0
 
 [system.cpu.isa]
 type=AlphaISA
+eventq_index=0
+system=system
 
 [system.cpu.itb]
 type=AlphaTLB
+eventq_index=0
 size=48
 
 [system.cpu.tracer]
 type=ExeTracer
+eventq_index=0
 
 [system.cpu.workload]
 type=LiveProcess
@@ -97,7 +108,8 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/cpu2000/binaries/alpha/tru64/vortex
+eventq_index=0
+executable=/dist/cpu2000/binaries/alpha/tru64/vortex
 gid=100
 input=cin
 max_stack_size=67108864
@@ -111,11 +123,13 @@ uid=100
 [system.cpu_clk_domain]
 type=SrcClockDomain
 clock=500
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.membus]
 type=CoherentBus
 clk_domain=system.clk_domain
+eventq_index=0
 header_cycles=1
 system=system
 use_default_range=false
@@ -128,6 +142,7 @@ type=SimpleMemory
 bandwidth=73.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=30000
 latency_var=0
@@ -137,5 +152,6 @@ port=system.membus.master[0]
 
 [system.voltage_domain]
 type=VoltageDomain
+eventq_index=0
 voltage=1.000000
 
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr
index 1ed796979..506aa6e28 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr
@@ -1,7 +1,5 @@
-warn: CoherentBus system.membus has no snooping ports attached!
 warn: Sockets disabled, not accepting gdb connections
 warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
-hack: be nice to actually delete the event here
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout
index 6c7ff5465..faff61794 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout
@@ -1,9 +1,9 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 24 2013 03:08:53
-gem5 started Sep 28 2013 10:03:40
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 16:27:55
+gem5 started Jan 22 2014 18:27:58
+gem5 executing on u200540-lin
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
index db9503e0b..35c792878 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
@@ -4,13 +4,15 @@ sim_seconds                                  0.044221                       # Nu
 sim_ticks                                 44221003000                       # Number of ticks simulated
 final_tick                                44221003000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                2564036                       # Simulator instruction rate (inst/s)
-host_op_rate                                  2564035                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1283487470                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 224620                       # Number of bytes of host memory used
-host_seconds                                    34.45                       # Real time elapsed on the host
+host_inst_rate                                3596409                       # Simulator instruction rate (inst/s)
+host_op_rate                                  3596407                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1800265277                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 228820                       # Number of bytes of host memory used
+host_seconds                                    24.56                       # Real time elapsed on the host
 sim_insts                                    88340673                       # Number of instructions simulated
 sim_ops                                      88340673                       # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage                       1                       # Voltage in Volts
+system.clk_domain.clock                          1000                       # Clock period in ticks
 system.physmem.bytes_read::cpu.inst         353752292                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data         126702647                       # Number of bytes read from this memory
 system.physmem.bytes_read::total            480454939                       # Number of bytes read from this memory
@@ -36,6 +38,7 @@ system.physmem.bw_total::total            12937468537                       # To
 system.membus.throughput                  12937468537                       # Throughput (bytes/s)
 system.membus.data_through_bus              572107835                       # Total data (bytes)
 system.membus.snoop_data_through_bus                0                       # Total snoop data (bytes)
+system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.dtb.fetch_hits                           0                       # ITB hits
 system.cpu.dtb.fetch_misses                         0                       # ITB misses
 system.cpu.dtb.fetch_acv                            0                       # ITB acv
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini
index b1fb247dd..927fb8fa4 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini
@@ -1,7 +1,9 @@
 [root]
 type=Root
 children=system
+eventq_index=0
 full_system=false
+sim_quantum=0
 time_sync_enable=false
 time_sync_period=100000000000
 time_sync_spin_threshold=100000000
@@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
 boot_osflags=a
 cache_line_size=64
 clk_domain=system.clk_domain
+eventq_index=0
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -33,6 +36,7 @@ system_port=system.membus.slave[0]
 [system.clk_domain]
 type=SrcClockDomain
 clock=1000
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.cpu]
@@ -45,6 +49,7 @@ do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
 dtb=system.cpu.dtb
+eventq_index=0
 function_trace=false
 function_trace_start=0
 interrupts=system.cpu.interrupts
@@ -71,6 +76,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -79,6 +85,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=262144
 system=system
 tags=system.cpu.dcache.tags
@@ -93,11 +100,14 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 hit_latency=2
+sequential_access=false
 size=262144
 
 [system.cpu.dtb]
 type=AlphaTLB
+eventq_index=0
 size=64
 
 [system.cpu.icache]
@@ -106,6 +116,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -114,6 +125,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=131072
 system=system
 tags=system.cpu.icache.tags
@@ -128,17 +140,23 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 hit_latency=2
+sequential_access=false
 size=131072
 
 [system.cpu.interrupts]
 type=AlphaInterrupts
+eventq_index=0
 
 [system.cpu.isa]
 type=AlphaISA
+eventq_index=0
+system=system
 
 [system.cpu.itb]
 type=AlphaTLB
+eventq_index=0
 size=48
 
 [system.cpu.l2cache]
@@ -147,6 +165,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
 hit_latency=20
 is_top_level=false
@@ -155,6 +174,7 @@ mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
+sequential_access=false
 size=2097152
 system=system
 tags=system.cpu.l2cache.tags
@@ -169,12 +189,15 @@ type=LRU
 assoc=8
 block_size=64
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 hit_latency=20
+sequential_access=false
 size=2097152
 
 [system.cpu.toL2Bus]
 type=CoherentBus
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 header_cycles=1
 system=system
 use_default_range=false
@@ -184,6 +207,7 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
 [system.cpu.tracer]
 type=ExeTracer
+eventq_index=0
 
 [system.cpu.workload]
 type=LiveProcess
@@ -193,7 +217,8 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/cpu2000/binaries/alpha/tru64/vortex
+eventq_index=0
+executable=/dist/cpu2000/binaries/alpha/tru64/vortex
 gid=100
 input=cin
 max_stack_size=67108864
@@ -207,11 +232,13 @@ uid=100
 [system.cpu_clk_domain]
 type=SrcClockDomain
 clock=500
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.membus]
 type=CoherentBus
 clk_domain=system.clk_domain
+eventq_index=0
 header_cycles=1
 system=system
 use_default_range=false
@@ -224,6 +251,7 @@ type=SimpleMemory
 bandwidth=73.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=30000
 latency_var=0
@@ -233,5 +261,6 @@ port=system.membus.master[0]
 
 [system.voltage_domain]
 type=VoltageDomain
+eventq_index=0
 voltage=1.000000
 
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr
index 1b49765a7..506aa6e28 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr
@@ -3,4 +3,3 @@ warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
 warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
-hack: be nice to actually delete the event here
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout
index f89175182..b6a75fdf5 100755
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout
@@ -1,9 +1,9 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 24 2013 03:08:53
-gem5 started Sep 28 2013 10:04:18
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 16:27:55
+gem5 started Jan 22 2014 18:28:33
+gem5 executing on u200540-lin
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
index bac018361..dd1fcd980 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
@@ -4,13 +4,15 @@ sim_seconds                                  0.133635                       # Nu
 sim_ticks                                133634727000                       # Number of ticks simulated
 final_tick                               133634727000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 775893                       # Simulator instruction rate (inst/s)
-host_op_rate                                   775893                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1173708198                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 233104                       # Number of bytes of host memory used
-host_seconds                                   113.86                       # Real time elapsed on the host
+host_inst_rate                                1534458                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1534458                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             2321204993                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 237688                       # Number of bytes of host memory used
+host_seconds                                    57.57                       # Real time elapsed on the host
 sim_insts                                    88340673                       # Number of instructions simulated
 sim_ops                                      88340673                       # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage                       1                       # Voltage in Volts
+system.clk_domain.clock                          1000                       # Clock period in ticks
 system.physmem.bytes_read::cpu.inst            432896                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data          10136896                       # Number of bytes read from this memory
 system.physmem.bytes_read::total             10569792                       # Number of bytes read from this memory
@@ -50,6 +52,7 @@ system.membus.reqLayer0.occupancy          1190991000                       # La
 system.membus.reqLayer0.utilization               0.9                       # Layer utilization (%)
 system.membus.respLayer1.occupancy         1486377000                       # Layer occupancy (ticks)
 system.membus.respLayer1.utilization              1.1                       # Layer utilization (%)
+system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.dtb.fetch_hits                           0                       # ITB hits
 system.cpu.dtb.fetch_misses                         0                       # ITB misses
 system.cpu.dtb.fetch_acv                            0                       # ITB acv
@@ -114,6 +117,14 @@ system.cpu.icache.tags.warmup_cycle                 0                       # Cy
 system.cpu.icache.tags.occ_blocks::cpu.inst  1871.686406                       # Average occupied blocks per requestor
 system.cpu.icache.tags.occ_percent::cpu.inst     0.913909                       # Average percentage of cache occupancy
 system.cpu.icache.tags.occ_percent::total     0.913909                       # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_task_id_blocks::1024         2045                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0           42                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::1          104                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3          191                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::4         1708                       # Occupied blocks per task id
+system.cpu.icache.tags.occ_task_id_percent::1024     0.998535                       # Percentage of cache occupancy per task id
+system.cpu.icache.tags.tag_accesses         176952584                       # Number of tag accesses
+system.cpu.icache.tags.data_accesses        176952584                       # Number of data accesses
 system.cpu.icache.ReadReq_hits::cpu.inst     88361638                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total        88361638                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst      88361638                       # number of demand (read+write) hits
@@ -196,6 +207,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks     0.833083
 system.cpu.l2cache.tags.occ_percent::cpu.inst     0.057205                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::cpu.data     0.047481                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::total     0.937769                       # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_task_id_blocks::1024        32056                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::0          114                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::1          655                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::2         9976                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::3        21194                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::4          117                       # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1024     0.978271                       # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.tag_accesses          3900109                       # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses         3900109                       # Number of data accesses
 system.cpu.l2cache.ReadReq_hits::cpu.inst        69672                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::cpu.data        33258                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::total         102930                       # number of ReadReq hits
@@ -330,6 +350,13 @@ system.cpu.dcache.tags.warmup_cycle         936463000                       # Cy
 system.cpu.dcache.tags.occ_blocks::cpu.data  4078.863631                       # Average occupied blocks per requestor
 system.cpu.dcache.tags.occ_percent::cpu.data     0.995816                       # Average percentage of cache occupancy
 system.cpu.dcache.tags.occ_percent::total     0.995816                       # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_task_id_blocks::1024         4096                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0           52                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1          482                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2         3562                       # Occupied blocks per task id
+system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
+system.cpu.dcache.tags.tag_accesses          69984374                       # Number of tag accesses
+system.cpu.dcache.tags.data_accesses         69984374                       # Number of data accesses
 system.cpu.dcache.ReadReq_hits::cpu.data     20215872                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total        20215872                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data     14469799                       # number of WriteReq hits