stats: update for previous changeset

Very small differences in IQ-specific O3 stats.

4 files changed, 30 insertions, 25 deletions

diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini
index 969dafec8..d5bef4cae 100644
--- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini
+++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini
@@ -23,6 +23,7 @@ load_offset=0
 mem_mode=timing
 mem_ranges=
 memories=system.physmem
+mmap_using_noreserve=false
 num_work_ids=16
 readfile=
 symbolfile=
@@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side
 icache_port=system.cpu.icache.cpu_side
 
 [system.cpu.branchPred]
-type=BranchPredictor
+type=BiModeBP
 BTBEntries=2048
 BTBTagSize=18
 RASSize=16
@@ -145,11 +146,7 @@ eventq_index=0
 globalCtrBits=2
 globalPredictorSize=8192
 instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
 numThreads=1
-predType=bi-mode
 
 [system.cpu.dcache]
 type=BaseCache
@@ -192,6 +189,7 @@ type=ArmStage2MMU
 children=stage2_tlb
 eventq_index=0
 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
+sys=system
 tlb=system.cpu.dtb
 
 [system.cpu.dstage2_mmu.stage2_tlb]
@@ -209,7 +207,6 @@ eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[5]
 
 [system.cpu.dtb]
 type=ArmTLB
@@ -501,7 +498,7 @@ assoc=2
 clk_domain=system.cpu_clk_domain
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
+forward_snoops=false
 hit_latency=1
 is_top_level=true
 max_miss_count=0
@@ -568,6 +565,7 @@ type=ArmStage2MMU
 children=stage2_tlb
 eventq_index=0
 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
+sys=system
 tlb=system.cpu.itb
 
 [system.cpu.istage2_mmu.stage2_tlb]
@@ -585,7 +583,6 @@ eventq_index=0
 is_stage2=true
 num_squash_per_cycle=2
 sys=system
-port=system.cpu.toL2Bus.slave[4]
 
 [system.cpu.itb]
 type=ArmTLB
@@ -669,13 +666,16 @@ size=1048576
 type=CoherentXBar
 clk_domain=system.cpu_clk_domain
 eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
 snoop_filter=Null
+snoop_response_latency=1
 system=system
 use_default_range=false
 width=32
 master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 
 [system.cpu.tracer]
 type=ExeTracer
@@ -691,7 +691,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/vortex
+executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/vortex
 gid=100
 input=cin
 kvmInSE=false
@@ -724,11 +724,14 @@ transition_latency=100000000
 type=CoherentXBar
 clk_domain=system.clk_domain
 eventq_index=0
-header_cycles=1
+forward_latency=4
+frontend_latency=3
+response_latency=2
 snoop_filter=Null
+snoop_response_latency=4
 system=system
 use_default_range=false
-width=8
+width=16
 master=system.physmem.port
 slave=system.system_port system.cpu.l2cache.mem_side
 
@@ -759,7 +762,7 @@ IDD62=0.000000
 VDD=1.500000
 VDD2=0.000000
 activation_limit=4
-addr_mapping=RoRaBaChCo
+addr_mapping=RoRaBaCoCh
 bank_groups_per_rank=0
 banks_per_rank=8
 burst_length=8
diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr
index 1a4f96712..341b479f7 100755
--- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr
+++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr
@@ -1 +1,2 @@
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
 warn: Sockets disabled, not accepting gdb connections
diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout
index 72ee44be5..fb2980f08 100755
--- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout
+++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout
@@ -1,12 +1,13 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jun 21 2014 11:22:42
-gem5 started Jun 21 2014 21:43:42
+gem5 compiled Apr 22 2015 10:58:25
+gem5 started Apr 22 2015 11:16:00
 gem5 executing on phenom
 command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/50.vortex/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/50.vortex/arm/linux/o3-timing
+
 Global frequency set at 1000000000000 ticks per second
-      0: system.cpu.isa: ISA system set to: 0 0x62769a0
+      0: system.cpu.isa: ISA system set to: 0 0x3dc8200
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
-Exiting @ tick 25431292500 because target called exit()
+Exiting @ tick 33359312000 because target called exit()
diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
index ae7859585..46a8a5ebb 100644
--- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.033359                       # Nu
 sim_ticks                                 33359312000                       # Number of ticks simulated
 final_tick                                33359312000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 125450                       # Simulator instruction rate (inst/s)
-host_op_rate                                   160435                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                               59019201                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 322444                       # Number of bytes of host memory used
-host_seconds                                   565.23                       # Real time elapsed on the host
+host_inst_rate                                 119579                       # Simulator instruction rate (inst/s)
+host_op_rate                                   152928                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                               56257417                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 252556                       # Number of bytes of host memory used
+host_seconds                                   592.98                       # Real time elapsed on the host
 sim_insts                                    70907629                       # Number of instructions simulated
 sim_ops                                      90682584                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
@@ -479,7 +479,7 @@ system.cpu.iq.iqInstsAdded                   98166864                       # Nu
 system.cpu.iq.iqNonSpecInstsAdded               34522                       # Number of non-speculative instructions added to the IQ
 system.cpu.iq.iqInstsIssued                  94891849                       # Number of instructions issued
 system.cpu.iq.iqSquashedInstsIssued            694587                       # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined         7414208                       # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu.iq.iqSquashedInstsExamined         7518802                       # Number of squashed instructions iterated over during squash; mainly for profiling
 system.cpu.iq.iqSquashedOperandsExamined     20250811                       # Number of squashed operands that are examined and possibly removed from graph
 system.cpu.iq.iqSquashedNonSpecRemoved            736                       # Number of squashed non-spec instructions that were removed
 system.cpu.iq.issued_per_cycle::samples      65867882                       # Number of insts issued each cycle
@@ -572,7 +572,7 @@ system.cpu.iq.rate                           1.422269                       # In
 system.cpu.iq.fu_busy_cnt                    29960509                       # FU busy when requested
 system.cpu.iq.fu_busy_rate                   0.315733                       # FU busy rate (busy events/executed inst)
 system.cpu.iq.int_inst_queue_reads          286306469                       # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes         105626883                       # Number of integer instruction queue writes
+system.cpu.iq.int_inst_queue_writes         105731477                       # Number of integer instruction queue writes
 system.cpu.iq.int_inst_queue_wakeup_accesses     93465742                       # Number of integer instruction queue wakeup accesses
 system.cpu.iq.fp_inst_queue_reads                 207                       # Number of floating instruction queue reads
 system.cpu.iq.fp_inst_queue_writes                248                       # Number of floating instruction queue writes