diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
commit | b63631536d974f31cf99ee280271dc0f7b4c746f (patch) | |
tree | ff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt | |
parent | 646c4a23ca44aab5468c896034288151c89be782 (diff) | |
download | gem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.
The main reason for bundling them up is to minimise the changeset
size.
Diffstat (limited to 'tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt')
-rw-r--r-- | tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt | 84 |
1 files changed, 42 insertions, 42 deletions
diff --git a/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt index 170d172b3..178d6c7df 100644 --- a/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.132689 # Nu sim_ticks 132689045000 # Number of ticks simulated final_tick 132689045000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 438025 # Simulator instruction rate (inst/s) -host_op_rate 621131 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 825892843 # Simulator tick rate (ticks/s) -host_mem_usage 249772 # Number of bytes of host memory used -host_seconds 160.66 # Real time elapsed on the host +host_inst_rate 525201 # Simulator instruction rate (inst/s) +host_op_rate 744748 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 990262559 # Simulator tick rate (ticks/s) +host_mem_usage 247408 # Number of bytes of host memory used +host_seconds 133.99 # Real time elapsed on the host sim_insts 70373628 # Number of instructions simulated sim_ops 99791654 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 255488 # Number of bytes read from this memory @@ -40,10 +40,10 @@ system.membus.trans_dist::ReadResp 25532 # Tr system.membus.trans_dist::Writeback 83909 # Transaction distribution system.membus.trans_dist::ReadExReq 102280 # Transaction distribution system.membus.trans_dist::ReadExResp 102280 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 339533 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 339533 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 13550144 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 13550144 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 339533 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 339533 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 13550144 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 13550144 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 13550144 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 882993000 # Layer occupancy (ticks) @@ -115,15 +115,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 265378090 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 16890 # number of replacements -system.cpu.icache.tags.tagsinuse 1736.497265 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 78126161 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 18908 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 4131.910355 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1736.497265 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.847899 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.847899 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 16890 # number of replacements +system.cpu.icache.tags.tagsinuse 1736.497265 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 78126161 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 18908 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 4131.910355 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1736.497265 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.847899 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.847899 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 78126161 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 78126161 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 78126161 # number of demand (read+write) hits @@ -193,19 +193,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 19880.791199 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 19880.791199 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 19880.791199 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 94693 # number of replacements -system.cpu.l2cache.tags.tagsinuse 30368.194893 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 74295 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 125788 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.590637 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 94693 # number of replacements +system.cpu.l2cache.tags.tagsinuse 30368.194893 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 74295 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 125788 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.590637 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 27745.868937 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 1154.037281 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 1468.288674 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 1154.037281 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 1468.288674 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.846737 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.035218 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.044809 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.926764 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.926764 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 14916 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 31426 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 46342 # number of ReadReq hits @@ -331,15 +331,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40063.627255 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40053.908900 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40054.212437 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 155902 # number of replacements -system.cpu.dcache.tags.tagsinuse 4076.954355 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 46862074 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 159998 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 292.891624 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 1072595000 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4076.954355 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.995350 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.995350 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 155902 # number of replacements +system.cpu.dcache.tags.tagsinuse 4076.954355 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 46862074 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 159998 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 292.891624 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 1072595000 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4076.954355 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.995350 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.995350 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 27087367 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 27087367 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 19742869 # number of WriteReq hits @@ -445,12 +445,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 71874 # Tr system.cpu.toL2Bus.trans_dist::Writeback 128239 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 107032 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 107032 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 37816 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 448235 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 486051 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 1210112 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 18447168 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 19657280 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 37816 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 448235 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 486051 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1210112 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 18447168 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 19657280 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 19657280 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 281811500 # Layer occupancy (ticks) |