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authorAndreas Hansson <andreas.hansson@arm.com>2016-10-19 06:20:04 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2016-10-19 06:20:04 -0400
commit607c2772915628c2c67c1c5bfdefaa33ae66a06e (patch)
treef8f23fd4012f9a0053d65ac91792a7dc61d6baff /tests/long/se/50.vortex/ref
parent71c982ff708cc3adc7c0eccf536fea34c20cc5f0 (diff)
downloadgem5-607c2772915628c2c67c1c5bfdefaa33ae66a06e.tar.xz
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding reads/writes.
Diffstat (limited to 'tests/long/se/50.vortex/ref')
-rw-r--r--tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt18
-rw-r--r--tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt46
-rw-r--r--tests/long/se/50.vortex/ref/arm/linux/minor-timing/stats.txt18
-rw-r--r--tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt40
4 files changed, 77 insertions, 45 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt
index 4a990b700..0d9a67eb8 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.061709 # Nu
sim_ticks 61709224000 # Number of ticks simulated
final_tick 61709224000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 242211 # Simulator instruction rate (inst/s)
-host_op_rate 242211 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 169006859 # Simulator tick rate (ticks/s)
-host_mem_usage 262168 # Number of bytes of host memory used
-host_seconds 365.13 # Real time elapsed on the host
+host_inst_rate 484192 # Simulator instruction rate (inst/s)
+host_op_rate 484192 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 337853764 # Simulator tick rate (ticks/s)
+host_mem_usage 263376 # Number of bytes of host memory used
+host_seconds 182.65 # Real time elapsed on the host
sim_insts 88438073 # Number of instructions simulated
sim_ops 88438073 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -353,7 +353,9 @@ system.cpu.op_class_0::FloatAdd 114304 0.13% 60.27% # Cl
system.cpu.op_class_0::FloatCmp 84 0.00% 60.27% # Class of committed instruction
system.cpu.op_class_0::FloatCvt 113640 0.13% 60.40% # Class of committed instruction
system.cpu.op_class_0::FloatMult 50 0.00% 60.40% # Class of committed instruction
+system.cpu.op_class_0::FloatMultAcc 0 0.00% 60.40% # Class of committed instruction
system.cpu.op_class_0::FloatDiv 37764 0.04% 60.44% # Class of committed instruction
+system.cpu.op_class_0::FloatMisc 0 0.00% 60.44% # Class of committed instruction
system.cpu.op_class_0::FloatSqrt 0 0.00% 60.44% # Class of committed instruction
system.cpu.op_class_0::SimdAdd 0 0.00% 60.44% # Class of committed instruction
system.cpu.op_class_0::SimdAddAcc 0 0.00% 60.44% # Class of committed instruction
@@ -375,8 +377,10 @@ system.cpu.op_class_0::SimdFloatMisc 0 0.00% 60.44% # Cl
system.cpu.op_class_0::SimdFloatMult 0 0.00% 60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 60.44% # Class of committed instruction
system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 60.44% # Class of committed instruction
-system.cpu.op_class_0::MemRead 20366786 23.03% 83.47% # Class of committed instruction
-system.cpu.op_class_0::MemWrite 14620629 16.53% 100.00% # Class of committed instruction
+system.cpu.op_class_0::MemRead 20366476 23.03% 83.47% # Class of committed instruction
+system.cpu.op_class_0::MemWrite 14619024 16.53% 100.00% # Class of committed instruction
+system.cpu.op_class_0::FloatMemRead 310 0.00% 100.00% # Class of committed instruction
+system.cpu.op_class_0::FloatMemWrite 1605 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::total 88438073 # Class of committed instruction
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
index 6ed69f426..53a1c5599 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.022820 # Nu
sim_ticks 22819771500 # Number of ticks simulated
final_tick 22819771500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 186519 # Simulator instruction rate (inst/s)
-host_op_rate 186519 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 53476835 # Simulator tick rate (ticks/s)
-host_mem_usage 263708 # Number of bytes of host memory used
-host_seconds 426.72 # Real time elapsed on the host
+host_inst_rate 390933 # Simulator instruction rate (inst/s)
+host_op_rate 390933 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 112084385 # Simulator tick rate (ticks/s)
+host_mem_usage 265424 # Number of bytes of host memory used
+host_seconds 203.59 # Real time elapsed on the host
sim_insts 79591756 # Number of instructions simulated
sim_ops 79591756 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -438,7 +438,9 @@ system.cpu.iq.fu_full::FloatAdd 0 0.00% 9.57% # at
system.cpu.iq.fu_full::FloatCmp 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatCvt 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatMult 0 0.00% 9.57% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatDiv 0 0.00% 9.57% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMisc 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatSqrt 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAdd 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 9.57% # attempts to use FU when none available
@@ -460,8 +462,10 @@ system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 9.57% # at
system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 9.57% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 9.57% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemRead 1168337 46.29% 55.86% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemWrite 1114013 44.14% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead 1168317 46.29% 55.85% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite 1113838 44.13% 99.98% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemRead 25 0.00% 99.98% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemWrite 417 0.02% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued
@@ -472,7 +476,9 @@ system.cpu.iq.FU_type_0::FloatAdd 121159 0.14% 55.92% # Ty
system.cpu.iq.FU_type_0::FloatCmp 93 0.00% 55.92% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCvt 120693 0.14% 56.06% # Type of FU issued
system.cpu.iq.FU_type_0::FloatMult 63 0.00% 56.06% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 56.06% # Type of FU issued
system.cpu.iq.FU_type_0::FloatDiv 39087 0.04% 56.10% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 56.10% # Type of FU issued
system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 56.10% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 56.10% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 56.10% # Type of FU issued
@@ -494,22 +500,24 @@ system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 56.10% # Ty
system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 56.10% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 56.10% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 56.10% # Type of FU issued
-system.cpu.iq.FU_type_0::MemRead 22887844 25.84% 81.94% # Type of FU issued
-system.cpu.iq.FU_type_0::MemWrite 15994084 18.06% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead 22887385 25.84% 81.94% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite 15970151 18.03% 99.97% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemRead 459 0.00% 99.97% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemWrite 23933 0.03% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::total 88573949 # Type of FU issued
system.cpu.iq.rate 1.940728 # Inst issue rate
-system.cpu.iq.fu_busy_cnt 2523813 # FU busy when requested
-system.cpu.iq.fu_busy_rate 0.028494 # FU busy rate (busy events/executed inst)
-system.cpu.iq.int_inst_queue_reads 223970382 # Number of integer instruction queue reads
+system.cpu.iq.fu_busy_cnt 2524060 # FU busy when requested
+system.cpu.iq.fu_busy_rate 0.028497 # FU busy rate (busy events/executed inst)
+system.cpu.iq.int_inst_queue_reads 223970516 # Number of integer instruction queue reads
system.cpu.iq.int_inst_queue_writes 101417859 # Number of integer instruction queue writes
system.cpu.iq.int_inst_queue_wakeup_accesses 86818116 # Number of integer instruction queue wakeup accesses
-system.cpu.iq.fp_inst_queue_reads 611328 # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_reads 611441 # Number of floating instruction queue reads
system.cpu.iq.fp_inst_queue_writes 420538 # Number of floating instruction queue writes
system.cpu.iq.fp_inst_queue_wakeup_accesses 299902 # Number of floating instruction queue wakeup accesses
-system.cpu.iq.int_alu_accesses 90791946 # Number of integer alu accesses
-system.cpu.iq.fp_alu_accesses 305816 # Number of floating point alu accesses
+system.cpu.iq.int_alu_accesses 90792080 # Number of integer alu accesses
+system.cpu.iq.fp_alu_accesses 305929 # Number of floating point alu accesses
system.cpu.iew.lsq.thread0.forwLoads 1674439 # Number of loads that had data forwarded from stores
system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
system.cpu.iew.lsq.thread0.squashedLoads 2855253 # Number of loads squashed
@@ -588,7 +596,9 @@ system.cpu.commit.op_class_0::FloatAdd 114304 0.13% 60.33% # Cl
system.cpu.commit.op_class_0::FloatCmp 84 0.00% 60.33% # Class of committed instruction
system.cpu.commit.op_class_0::FloatCvt 113640 0.13% 60.46% # Class of committed instruction
system.cpu.commit.op_class_0::FloatMult 50 0.00% 60.46% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 60.46% # Class of committed instruction
system.cpu.commit.op_class_0::FloatDiv 37764 0.04% 60.51% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMisc 0 0.00% 60.51% # Class of committed instruction
system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 60.51% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAdd 0 0.00% 60.51% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 60.51% # Class of committed instruction
@@ -610,8 +620,10 @@ system.cpu.commit.op_class_0::SimdFloatMisc 0 0.00% 60.51% #
system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 60.51% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 60.51% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 60.51% # Class of committed instruction
-system.cpu.commit.op_class_0::MemRead 20276638 22.95% 83.46% # Class of committed instruction
-system.cpu.commit.op_class_0::MemWrite 14613377 16.54% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::MemRead 20276331 22.95% 83.46% # Class of committed instruction
+system.cpu.commit.op_class_0::MemWrite 14611772 16.54% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemRead 307 0.00% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemWrite 1605 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::total 88340672 # Class of committed instruction
diff --git a/tests/long/se/50.vortex/ref/arm/linux/minor-timing/stats.txt b/tests/long/se/50.vortex/ref/arm/linux/minor-timing/stats.txt
index feef465f0..d9533629f 100644
--- a/tests/long/se/50.vortex/ref/arm/linux/minor-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/arm/linux/minor-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.060131 # Nu
sim_ticks 60130734500 # Number of ticks simulated
final_tick 60130734500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 142105 # Simulator instruction rate (inst/s)
-host_op_rate 181732 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 120494644 # Simulator tick rate (ticks/s)
-host_mem_usage 279144 # Number of bytes of host memory used
-host_seconds 499.03 # Real time elapsed on the host
+host_inst_rate 310652 # Simulator instruction rate (inst/s)
+host_op_rate 397278 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 263409545 # Simulator tick rate (ticks/s)
+host_mem_usage 281384 # Number of bytes of host memory used
+host_seconds 228.28 # Real time elapsed on the host
sim_insts 70915150 # Number of instructions simulated
sim_ops 90690106 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -441,7 +441,9 @@ system.cpu.op_class_0::FloatAdd 0 0.00% 52.12% # Cl
system.cpu.op_class_0::FloatCmp 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::FloatCvt 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::FloatMult 0 0.00% 52.12% # Class of committed instruction
+system.cpu.op_class_0::FloatMultAcc 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::FloatDiv 0 0.00% 52.12% # Class of committed instruction
+system.cpu.op_class_0::FloatMisc 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::FloatSqrt 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::SimdAdd 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::SimdAddAcc 0 0.00% 52.12% # Class of committed instruction
@@ -463,8 +465,10 @@ system.cpu.op_class_0::SimdFloatMisc 7 0.00% 52.12% # Cl
system.cpu.op_class_0::SimdFloatMult 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 52.12% # Class of committed instruction
system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 52.12% # Class of committed instruction
-system.cpu.op_class_0::MemRead 22866262 25.21% 77.33% # Class of committed instruction
-system.cpu.op_class_0::MemWrite 20555739 22.67% 100.00% # Class of committed instruction
+system.cpu.op_class_0::MemRead 22866242 25.21% 77.33% # Class of committed instruction
+system.cpu.op_class_0::MemWrite 20555707 22.67% 100.00% # Class of committed instruction
+system.cpu.op_class_0::FloatMemRead 20 0.00% 100.00% # Class of committed instruction
+system.cpu.op_class_0::FloatMemWrite 32 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.op_class_0::total 90690106 # Class of committed instruction
diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
index 6270a4a24..da2276c3c 100644
--- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.037982 # Nu
sim_ticks 37982056000 # Number of ticks simulated
final_tick 37982056000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 105525 # Simulator instruction rate (inst/s)
-host_op_rate 134954 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 56525025 # Simulator tick rate (ticks/s)
-host_mem_usage 282344 # Number of bytes of host memory used
-host_seconds 671.95 # Real time elapsed on the host
+host_inst_rate 220867 # Simulator instruction rate (inst/s)
+host_op_rate 282464 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 118308818 # Simulator tick rate (ticks/s)
+host_mem_usage 284316 # Number of bytes of host memory used
+host_seconds 321.04 # Real time elapsed on the host
sim_insts 70907652 # Number of instructions simulated
sim_ops 90682607 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -527,7 +527,9 @@ system.cpu.iq.fu_full::FloatAdd 0 0.00% 22.63% # at
system.cpu.iq.fu_full::FloatCmp 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatCvt 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatMult 0 0.00% 22.63% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatDiv 0 0.00% 22.63% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMisc 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatSqrt 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAdd 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 22.63% # attempts to use FU when none available
@@ -549,8 +551,10 @@ system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 22.63% # at
system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 22.63% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 22.63% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemRead 11088474 37.25% 59.89% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemWrite 11940322 40.11% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead 11088448 37.25% 59.89% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite 11940306 40.11% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemRead 30 0.00% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemWrite 21 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued
@@ -561,7 +565,9 @@ system.cpu.iq.FU_type_0::FloatAdd 32 0.00% 52.28% # Ty
system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::FloatMult 0 0.00% 52.28% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 52.28% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 52.28% # Type of FU issued
@@ -583,22 +589,24 @@ system.cpu.iq.FU_type_0::SimdFloatMisc 18 0.00% 52.28% # Ty
system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 52.28% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 52.28% # Type of FU issued
-system.cpu.iq.FU_type_0::MemRead 23958877 25.36% 77.63% # Type of FU issued
-system.cpu.iq.FU_type_0::MemWrite 21133721 22.37% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead 23958815 25.36% 77.63% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite 21133689 22.37% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemRead 62 0.00% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemWrite 32 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::total 94484787 # Type of FU issued
system.cpu.iq.rate 1.243808 # Inst issue rate
-system.cpu.iq.fu_busy_cnt 29765517 # FU busy when requested
+system.cpu.iq.fu_busy_cnt 29765526 # FU busy when requested
system.cpu.iq.fu_busy_rate 0.315030 # FU busy rate (busy events/executed inst)
system.cpu.iq.int_inst_queue_reads 291599265 # Number of integer instruction queue reads
system.cpu.iq.int_inst_queue_writes 104199326 # Number of integer instruction queue writes
system.cpu.iq.int_inst_queue_wakeup_accesses 93203450 # Number of integer instruction queue wakeup accesses
-system.cpu.iq.fp_inst_queue_reads 326 # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_reads 335 # Number of floating instruction queue reads
system.cpu.iq.fp_inst_queue_writes 598 # Number of floating instruction queue writes
system.cpu.iq.fp_inst_queue_wakeup_accesses 92 # Number of floating instruction queue wakeup accesses
system.cpu.iq.int_alu_accesses 124250121 # Number of integer alu accesses
-system.cpu.iq.fp_alu_accesses 183 # Number of floating point alu accesses
+system.cpu.iq.fp_alu_accesses 192 # Number of floating point alu accesses
system.cpu.iew.lsq.thread0.forwLoads 1368397 # Number of loads that had data forwarded from stores
system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
system.cpu.iew.lsq.thread0.squashedLoads 1289383 # Number of loads squashed
@@ -677,7 +685,9 @@ system.cpu.commit.op_class_0::FloatAdd 0 0.00% 52.12% # Cl
system.cpu.commit.op_class_0::FloatCmp 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::FloatCvt 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::FloatMult 0 0.00% 52.12% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::FloatDiv 0 0.00% 52.12% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMisc 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAdd 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 52.12% # Class of committed instruction
@@ -699,8 +709,10 @@ system.cpu.commit.op_class_0::SimdFloatMisc 7 0.00% 52.12% #
system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 52.12% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 52.12% # Class of committed instruction
-system.cpu.commit.op_class_0::MemRead 22866262 25.21% 77.33% # Class of committed instruction
-system.cpu.commit.op_class_0::MemWrite 20555738 22.67% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::MemRead 22866242 25.21% 77.33% # Class of committed instruction
+system.cpu.commit.op_class_0::MemWrite 20555706 22.67% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemRead 20 0.00% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemWrite 32 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::total 90688159 # Class of committed instruction