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authorAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
commitb63631536d974f31cf99ee280271dc0f7b4c746f (patch)
treeff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/50.vortex/ref
parent646c4a23ca44aab5468c896034288151c89be782 (diff)
downloadgem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models. The main reason for bundling them up is to minimise the changeset size.
Diffstat (limited to 'tests/long/se/50.vortex/ref')
-rw-r--r--tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt93
-rw-r--r--tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt93
-rw-r--r--tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt84
-rw-r--r--tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt93
-rw-r--r--tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt84
-rw-r--r--tests/long/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt84
6 files changed, 267 insertions, 264 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt
index fc992598c..c7e2525ee 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.043769 # Nu
sim_ticks 43769191000 # Number of ticks simulated
final_tick 43769191000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 112888 # Simulator instruction rate (inst/s)
-host_op_rate 112888 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 55931443 # Simulator tick rate (ticks/s)
-host_mem_usage 233228 # Number of bytes of host memory used
-host_seconds 782.55 # Real time elapsed on the host
+host_inst_rate 69144 # Simulator instruction rate (inst/s)
+host_op_rate 69144 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 34257993 # Simulator tick rate (ticks/s)
+host_mem_usage 232832 # Number of bytes of host memory used
+host_seconds 1277.63 # Real time elapsed on the host
sim_insts 88340673 # Number of instructions simulated
sim_ops 88340673 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 454592 # Number of bytes read from this memory
@@ -34,14 +34,15 @@ system.physmem.bw_total::writebacks 166688208 # To
system.physmem.bw_total::cpu.inst 10386118 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 231632520 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 408706846 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 165515 # Total number of read requests seen
-system.physmem.writeReqs 113997 # Total number of write requests seen
-system.physmem.cpureqs 279512 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 165515 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 113997 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 165515 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 113997 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 10592960 # Total number of bytes read from memory
system.physmem.bytesWritten 7295808 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 10592960 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 7295808 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 10379 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 10437 # Track reads on a per bank basis
@@ -311,10 +312,10 @@ system.membus.trans_dist::ReadResp 34625 # Tr
system.membus.trans_dist::Writeback 113997 # Transaction distribution
system.membus.trans_dist::ReadExReq 130890 # Transaction distribution
system.membus.trans_dist::ReadExResp 130890 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 445027 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 445027 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 17888768 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 17888768 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 445027 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 445027 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17888768 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 17888768 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 17888768 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 1218896000 # Layer occupancy (ticks)
@@ -423,15 +424,15 @@ system.cpu.stage3.utilization 25.270124 # Pe
system.cpu.stage4.idleCycles 41496378 # Number of cycles 0 instructions are processed.
system.cpu.stage4.runCycles 46042005 # Number of cycles 1+ instructions are processed.
system.cpu.stage4.utilization 52.596362 # Percentage of cycles stage was utilized (processing insts).
-system.cpu.icache.tags.replacements 84371 # number of replacements
-system.cpu.icache.tags.tagsinuse 1906.602529 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 12250515 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 86417 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 141.760475 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1906.602529 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.930958 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.930958 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 84371 # number of replacements
+system.cpu.icache.tags.tagsinuse 1906.602529 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 12250515 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 86417 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 141.760475 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 1906.602529 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.930958 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.930958 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 12250515 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 12250515 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 12250515 # number of demand (read+write) hits
@@ -513,12 +514,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 146995 # Tr
system.cpu.toL2Bus.trans_dist::Writeback 168352 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 143769 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 143769 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 172834 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 577046 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 749880 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 5530688 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 23852736 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 29383424 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 172834 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 577046 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 749880 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5530688 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 23852736 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 29383424 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 29383424 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 397910000 # Layer occupancy (ticks)
@@ -527,19 +528,19 @@ system.cpu.toL2Bus.respLayer0.occupancy 131178984 # La
system.cpu.toL2Bus.respLayer0.utilization 0.3 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 326782984 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 0.7 # Layer utilization (%)
-system.cpu.l2cache.tags.replacements 131591 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 30902.226523 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 151434 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 163651 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.925347 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 131591 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 30902.226523 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 151434 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 163651 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.925347 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 27124.475533 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 2007.439767 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 1770.311223 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 2007.439767 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 1770.311223 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.827773 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.061262 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.054026 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.943061 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.943061 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 79314 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 33056 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 112370 # number of ReadReq hits
@@ -665,15 +666,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 69040.581444
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 87183.204240 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 86404.621938 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 200251 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4076.642006 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 33754840 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 204347 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 165.183927 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 293009000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4076.642006 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.995274 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.995274 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 200251 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4076.642006 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 33754840 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 204347 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 165.183927 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 293009000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4076.642006 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.995274 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.995274 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 20180271 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 20180271 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 13574569 # number of WriteReq hits
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
index a1c1e25d4..5b9e2998f 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.024977 # Nu
sim_ticks 24977022500 # Number of ticks simulated
final_tick 24977022500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 130696 # Simulator instruction rate (inst/s)
-host_op_rate 130696 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 41014411 # Simulator tick rate (ticks/s)
-host_mem_usage 236320 # Number of bytes of host memory used
-host_seconds 608.98 # Real time elapsed on the host
+host_inst_rate 124025 # Simulator instruction rate (inst/s)
+host_op_rate 124025 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 38920856 # Simulator tick rate (ticks/s)
+host_mem_usage 235900 # Number of bytes of host memory used
+host_seconds 641.74 # Real time elapsed on the host
sim_insts 79591756 # Number of instructions simulated
sim_ops 79591756 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 489984 # Number of bytes read from this memory
@@ -34,14 +34,15 @@ system.physmem.bw_total::writebacks 292149475 # To
system.physmem.bw_total::cpu.inst 19617390 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 406515068 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 718281933 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 166305 # Total number of read requests seen
-system.physmem.writeReqs 114016 # Total number of write requests seen
-system.physmem.cpureqs 280321 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 166305 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 114016 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 166305 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 114016 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 10643520 # Total number of bytes read from memory
system.physmem.bytesWritten 7297024 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 10643520 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 7297024 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 3 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 3 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 10424 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 10464 # Track reads on a per bank basis
@@ -309,10 +310,10 @@ system.membus.trans_dist::ReadResp 35508 # Tr
system.membus.trans_dist::Writeback 114016 # Transaction distribution
system.membus.trans_dist::ReadExReq 130797 # Transaction distribution
system.membus.trans_dist::ReadExResp 130797 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 446626 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 446626 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 17940544 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 17940544 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 446626 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 446626 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17940544 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 17940544 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 17940544 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 1244155000 # Layer occupancy (ticks)
@@ -628,12 +629,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 155431 # Tr
system.cpu.toL2Bus.trans_dist::Writeback 168929 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 143410 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 143410 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 186551 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 580061 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 766612 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 5969600 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 23967680 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 29937280 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 186551 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 580061 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 766612 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5969600 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 23967680 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 29937280 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 29937280 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 402814500 # Layer occupancy (ticks)
@@ -642,15 +643,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 141571734 # La
system.cpu.toL2Bus.respLayer0.utilization 0.6 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 327076000 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.3 # Layer utilization (%)
-system.cpu.icache.tags.replacements 91227 # number of replacements
-system.cpu.icache.tags.tagsinuse 1926.280031 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 13799737 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 93275 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 147.946792 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 20172265250 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1926.280031 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.940566 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.940566 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 91227 # number of replacements
+system.cpu.icache.tags.tagsinuse 1926.280031 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 13799737 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 93275 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 147.946792 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 20172265250 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 1926.280031 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.940566 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.940566 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 13799737 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 13799737 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 13799737 # number of demand (read+write) hits
@@ -726,19 +727,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 17000.812278
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 17000.812278 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 17000.812278 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 132400 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 30717.176709 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 159637 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 164461 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.970668 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 132400 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 30717.176709 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 159637 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 164461 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.970668 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 26388.752281 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 2106.212865 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 2222.211563 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 2106.212865 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 2222.211563 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.805321 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.064277 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.067817 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.937414 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.937414 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 85619 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 34304 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 119923 # number of ReadReq hits
@@ -864,15 +865,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 70298.942144
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 89605.561649 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 88716.653338 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 201470 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4074.474898 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 34190075 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 205566 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 166.321644 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 215349000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4074.474898 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.994745 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.994745 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 201470 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4074.474898 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 34190075 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 205566 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 166.321644 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 215349000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4074.474898 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.994745 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.994745 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 20615905 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 20615905 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 13574108 # number of WriteReq hits
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
index 060f66d07..bac018361 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.133635 # Nu
sim_ticks 133634727000 # Number of ticks simulated
final_tick 133634727000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 671194 # Simulator instruction rate (inst/s)
-host_op_rate 671194 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1015328507 # Simulator tick rate (ticks/s)
-host_mem_usage 233108 # Number of bytes of host memory used
-host_seconds 131.62 # Real time elapsed on the host
+host_inst_rate 775893 # Simulator instruction rate (inst/s)
+host_op_rate 775893 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1173708198 # Simulator tick rate (ticks/s)
+host_mem_usage 233104 # Number of bytes of host memory used
+host_seconds 113.86 # Real time elapsed on the host
sim_insts 88340673 # Number of instructions simulated
sim_ops 88340673 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 432896 # Number of bytes read from this memory
@@ -40,10 +40,10 @@ system.membus.trans_dist::ReadResp 34272 # Tr
system.membus.trans_dist::Writeback 113982 # Transaction distribution
system.membus.trans_dist::ReadExReq 130881 # Transaction distribution
system.membus.trans_dist::ReadExResp 130881 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 444288 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 444288 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 17864640 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 17864640 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 444288 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 444288 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17864640 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 17864640 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 17864640 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 1190991000 # Layer occupancy (ticks)
@@ -105,15 +105,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 267269454 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 74391 # number of replacements
-system.cpu.icache.tags.tagsinuse 1871.686406 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 88361638 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 76436 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 1156.021220 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1871.686406 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.913909 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.913909 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 74391 # number of replacements
+system.cpu.icache.tags.tagsinuse 1871.686406 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 88361638 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 76436 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 1156.021220 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 1871.686406 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.913909 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.913909 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 88361638 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 88361638 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 88361638 # number of demand (read+write) hits
@@ -183,19 +183,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 14721.335496
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 14721.335496 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 14721.335496 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 131235 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 30728.810101 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 142024 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 163291 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.869760 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 131235 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 30728.810101 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 142024 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 163291 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.869760 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 27298.448351 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 1874.507766 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 1555.853984 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 1874.507766 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 1555.853984 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.833083 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.057205 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.047481 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.937769 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.937769 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 69672 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 33258 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 102930 # number of ReadReq hits
@@ -321,15 +321,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40052.631579
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40003.137844 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40005.164908 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 200248 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4078.863631 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 34685671 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 204344 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 169.741568 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 936463000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4078.863631 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.995816 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.995816 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 200248 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4078.863631 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 34685671 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 204344 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 169.741568 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 936463000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4078.863631 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.995816 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.995816 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 20215872 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 20215872 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 14469799 # number of WriteReq hits
@@ -427,12 +427,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 137202 # Tr
system.cpu.toL2Bus.trans_dist::Writeback 168375 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 143578 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 143578 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 152872 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 577063 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 729935 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 4891904 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 23854016 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 28745920 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 152872 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 577063 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 729935 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 4891904 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 23854016 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 28745920 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 28745920 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 392952500 # Layer occupancy (ticks)
diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
index 8607c685b..06aaaa021 100644
--- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.026765 # Nu
sim_ticks 26765004500 # Number of ticks simulated
final_tick 26765004500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 88779 # Simulator instruction rate (inst/s)
-host_op_rate 125988 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 33510752 # Simulator tick rate (ticks/s)
-host_mem_usage 255124 # Number of bytes of host memory used
-host_seconds 798.70 # Real time elapsed on the host
+host_inst_rate 102307 # Simulator instruction rate (inst/s)
+host_op_rate 145187 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 38617115 # Simulator tick rate (ticks/s)
+host_mem_usage 251228 # Number of bytes of host memory used
+host_seconds 693.09 # Real time elapsed on the host
sim_insts 70907629 # Number of instructions simulated
sim_ops 100626876 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 297792 # Number of bytes read from this memory
@@ -34,14 +34,15 @@ system.physmem.bw_total::writebacks 200715827 # To
system.physmem.bw_total::cpu.inst 11126170 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 296831783 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 508673780 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 128790 # Total number of read requests seen
-system.physmem.writeReqs 83940 # Total number of write requests seen
-system.physmem.cpureqs 213051 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 128790 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 83940 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 128790 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 83940 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 8242496 # Total number of bytes read from memory
system.physmem.bytesWritten 5372160 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 8242496 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 5372160 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 3 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 3 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 321 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 8146 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 8397 # Track reads on a per bank basis
@@ -313,10 +314,10 @@ system.membus.trans_dist::UpgradeReq 321 # Tr
system.membus.trans_dist::UpgradeResp 321 # Transaction distribution
system.membus.trans_dist::ReadExReq 102252 # Transaction distribution
system.membus.trans_dist::ReadExResp 102252 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 342161 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 342161 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 13614656 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 13614656 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 342161 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 342161 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 13614656 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 13614656 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 13614656 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 935941500 # Layer occupancy (ticks)
@@ -645,12 +646,12 @@ system.cpu.toL2Bus.trans_dist::UpgradeReq 336 # T
system.cpu.toL2Bus.trans_dist::UpgradeResp 336 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 107033 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 107033 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 61963 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 454719 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 516682 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 1966784 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 18660992 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 20627776 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 61963 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 454719 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 516682 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1966784 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 18660992 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 20627776 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 20627776 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 32000 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 290686995 # Layer occupancy (ticks)
@@ -659,15 +660,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 47827231 # La
system.cpu.toL2Bus.respLayer0.utilization 0.2 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 262412261 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.0 # Layer utilization (%)
-system.cpu.icache.tags.replacements 28871 # number of replacements
-system.cpu.icache.tags.tagsinuse 1809.449271 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 11651662 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 30904 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 377.027634 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1809.449271 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.883520 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.883520 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 28871 # number of replacements
+system.cpu.icache.tags.tagsinuse 1809.449271 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 11651662 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 30904 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 377.027634 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 1809.449271 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.883520 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.883520 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 11651673 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 11651673 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 11651673 # number of demand (read+write) hits
@@ -743,19 +744,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 21904.401543
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 21904.401543 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 21904.401543 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 95660 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 29916.504006 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 88398 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 126774 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.697288 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 95660 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 29916.504006 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 88398 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 126774 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.697288 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 26705.369214 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 1366.053749 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 1845.081043 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 1366.053749 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 1845.081043 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.814983 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.041689 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.056307 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.912979 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.912979 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 26062 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 33492 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 59554 # number of ReadReq hits
@@ -910,15 +911,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 71300.343864
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 69986.508974 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 70033.975596 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 158372 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4069.400137 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 44374327 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 162468 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 273.126566 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 354003250 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4069.400137 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.993506 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.993506 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 158372 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4069.400137 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 44374327 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 162468 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 273.126566 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 354003250 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4069.400137 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.993506 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.993506 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 26075013 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 26075013 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 18266800 # number of WriteReq hits
diff --git a/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt
index 170d172b3..178d6c7df 100644
--- a/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.132689 # Nu
sim_ticks 132689045000 # Number of ticks simulated
final_tick 132689045000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 438025 # Simulator instruction rate (inst/s)
-host_op_rate 621131 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 825892843 # Simulator tick rate (ticks/s)
-host_mem_usage 249772 # Number of bytes of host memory used
-host_seconds 160.66 # Real time elapsed on the host
+host_inst_rate 525201 # Simulator instruction rate (inst/s)
+host_op_rate 744748 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 990262559 # Simulator tick rate (ticks/s)
+host_mem_usage 247408 # Number of bytes of host memory used
+host_seconds 133.99 # Real time elapsed on the host
sim_insts 70373628 # Number of instructions simulated
sim_ops 99791654 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 255488 # Number of bytes read from this memory
@@ -40,10 +40,10 @@ system.membus.trans_dist::ReadResp 25532 # Tr
system.membus.trans_dist::Writeback 83909 # Transaction distribution
system.membus.trans_dist::ReadExReq 102280 # Transaction distribution
system.membus.trans_dist::ReadExResp 102280 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 339533 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 339533 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 13550144 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 13550144 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 339533 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 339533 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 13550144 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 13550144 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 13550144 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 882993000 # Layer occupancy (ticks)
@@ -115,15 +115,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 265378090 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 16890 # number of replacements
-system.cpu.icache.tags.tagsinuse 1736.497265 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 78126161 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 18908 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 4131.910355 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1736.497265 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.847899 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.847899 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 16890 # number of replacements
+system.cpu.icache.tags.tagsinuse 1736.497265 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 78126161 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 18908 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 4131.910355 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 1736.497265 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.847899 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.847899 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 78126161 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 78126161 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 78126161 # number of demand (read+write) hits
@@ -193,19 +193,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 19880.791199
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 19880.791199 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 19880.791199 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 94693 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 30368.194893 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 74295 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 125788 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.590637 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 94693 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 30368.194893 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 74295 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 125788 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.590637 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 27745.868937 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 1154.037281 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 1468.288674 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 1154.037281 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 1468.288674 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.846737 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.035218 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.044809 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.926764 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.926764 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 14916 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 31426 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 46342 # number of ReadReq hits
@@ -331,15 +331,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40063.627255
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40053.908900 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40054.212437 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 155902 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4076.954355 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 46862074 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 159998 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 292.891624 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 1072595000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4076.954355 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.995350 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.995350 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 155902 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4076.954355 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 46862074 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 159998 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 292.891624 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 1072595000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4076.954355 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.995350 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.995350 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 27087367 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 27087367 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 19742869 # number of WriteReq hits
@@ -445,12 +445,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 71874 # Tr
system.cpu.toL2Bus.trans_dist::Writeback 128239 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 107032 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 107032 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 37816 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 448235 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 486051 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 1210112 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 18447168 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 19657280 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 37816 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 448235 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 486051 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1210112 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 18447168 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 19657280 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 19657280 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 281811500 # Layer occupancy (ticks)
diff --git a/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt
index df352064c..b5bc877a9 100644
--- a/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.202242 # Nu
sim_ticks 202242260000 # Number of ticks simulated
final_tick 202242260000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 840510 # Simulator instruction rate (inst/s)
-host_op_rate 851393 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1264790801 # Simulator tick rate (ticks/s)
-host_mem_usage 241580 # Number of bytes of host memory used
-host_seconds 159.90 # Real time elapsed on the host
+host_inst_rate 788005 # Simulator instruction rate (inst/s)
+host_op_rate 798208 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1185781953 # Simulator tick rate (ticks/s)
+host_mem_usage 240044 # Number of bytes of host memory used
+host_seconds 170.56 # Real time elapsed on the host
sim_insts 134398962 # Number of instructions simulated
sim_ops 136139190 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 591488 # Number of bytes read from this memory
@@ -40,10 +40,10 @@ system.membus.trans_dist::ReadResp 30277 # Tr
system.membus.trans_dist::Writeback 82868 # Transaction distribution
system.membus.trans_dist::ReadExReq 101256 # Transaction distribution
system.membus.trans_dist::ReadExResp 101256 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 345934 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 345934 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 13721664 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 13721664 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 345934 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 345934 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 13721664 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 13721664 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 13721664 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 877345000 # Layer occupancy (ticks)
@@ -73,15 +73,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 404484520 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 184976 # number of replacements
-system.cpu.icache.tags.tagsinuse 2004.815325 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 134366547 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 187024 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 718.445478 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 143972294000 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 2004.815325 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.978914 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.978914 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 184976 # number of replacements
+system.cpu.icache.tags.tagsinuse 2004.815325 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 134366547 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 187024 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 718.445478 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 143972294000 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 2004.815325 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.978914 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.978914 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 134366547 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 134366547 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 134366547 # number of demand (read+write) hits
@@ -151,19 +151,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 13076.573060
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 13076.573060 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 13076.573060 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 98540 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 30850.759699 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 226933 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 129534 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 1.751918 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 98540 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 30850.759699 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 226933 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 129534 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 1.751918 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 26245.550341 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 3385.944777 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 1219.264582 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 3385.944777 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 1219.264582 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.800951 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.103331 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.037209 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.941490 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.941490 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 177782 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 24464 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 202246 # number of ReadReq hits
@@ -289,15 +289,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40022.181346
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40001.267469 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40002.736956 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 146582 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4087.648350 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 57960842 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 150678 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 384.666919 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 769040000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4087.648350 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.997961 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.997961 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 146582 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4087.648350 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 57960842 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 150678 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 384.666919 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 769040000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4087.648350 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.997961 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.997961 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 37185801 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 37185801 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 20759140 # number of WriteReq hits
@@ -415,12 +415,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 232523 # Tr
system.cpu.toL2Bus.trans_dist::Writeback 123970 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 105179 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 105179 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 374048 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 425326 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 799374 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 11969536 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 17577472 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 29547008 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 374048 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 425326 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 799374 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 11969536 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 17577472 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 29547008 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 29547008 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 354806000 # Layer occupancy (ticks)