summaryrefslogtreecommitdiff
path: root/tests/long/se/60.bzip2/ref/arm/linux/simple-timing
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:51 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:51 -0400
commit5a15909bac241dc795c691d49c4e2c68cab745f4 (patch)
treed0ae694e320c725ed8116943c7179516567279f3 /tests/long/se/60.bzip2/ref/arm/linux/simple-timing
parentac515d7a9b131ffc9e128bd209fcddb2f383808b (diff)
downloadgem5-5a15909bac241dc795c691d49c4e2c68cab745f4.tar.xz
stats: Update stats for monitor, cache and bus changes
This patch removes the sparse histogram total from the CommMonitor stats. It also bumps the stats after the unit fixes in the atomic cache access. Lastly, it updates the stats to match the new port ordering. All numbers are the same, and the only thing that changes is which master corresponds to what port index.
Diffstat (limited to 'tests/long/se/60.bzip2/ref/arm/linux/simple-timing')
-rw-r--r--tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt62
1 files changed, 31 insertions, 31 deletions
diff --git a/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt
index 7f261f2f5..991abe176 100644
--- a/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt
@@ -115,15 +115,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 4782410230 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.replacements 7 # number of replacements
-system.cpu.icache.tagsinuse 514.976015 # Cycle average of tags in use
-system.cpu.icache.total_refs 1544564952 # Total number of references to valid blocks.
-system.cpu.icache.sampled_refs 638 # Sample count of references to valid blocks.
-system.cpu.icache.avg_refs 2420948.200627 # Average number of references to valid blocks.
-system.cpu.icache.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.occ_blocks::cpu.inst 514.976015 # Average occupied blocks per requestor
-system.cpu.icache.occ_percent::cpu.inst 0.251453 # Average percentage of cache occupancy
-system.cpu.icache.occ_percent::total 0.251453 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 7 # number of replacements
+system.cpu.icache.tags.tagsinuse 514.976015 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 1544564952 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 638 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 2420948.200627 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 514.976015 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.251453 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.251453 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 1544564952 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 1544564952 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 1544564952 # number of demand (read+write) hits
@@ -193,19 +193,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 51656.739812
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 51656.739812 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 51656.739812 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.replacements 1926075 # number of replacements
-system.cpu.l2cache.tagsinuse 30987.094489 # Cycle average of tags in use
-system.cpu.l2cache.total_refs 8967572 # Total number of references to valid blocks.
-system.cpu.l2cache.sampled_refs 1955843 # Sample count of references to valid blocks.
-system.cpu.l2cache.avg_refs 4.585016 # Average number of references to valid blocks.
-system.cpu.l2cache.warmup_cycle 154026636000 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.occ_blocks::writebacks 15648.493745 # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.inst 24.153175 # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.data 15314.447570 # Average occupied blocks per requestor
-system.cpu.l2cache.occ_percent::writebacks 0.477554 # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.inst 0.000737 # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.data 0.467360 # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::total 0.945651 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.replacements 1926075 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 30987.094489 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 8967572 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 1955843 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 4.585016 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 154026636000 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::writebacks 15648.493745 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 24.153175 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 15314.447570 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_percent::writebacks 0.477554 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::cpu.inst 0.000737 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::cpu.data 0.467360 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.945651 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 22 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 6048805 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 6048827 # number of ReadReq hits
@@ -331,15 +331,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40108.766234
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40005.192635 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40005.225207 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.replacements 9111140 # number of replacements
-system.cpu.dcache.tagsinuse 4083.522356 # Cycle average of tags in use
-system.cpu.dcache.total_refs 645855059 # Total number of references to valid blocks.
-system.cpu.dcache.sampled_refs 9115236 # Sample count of references to valid blocks.
-system.cpu.dcache.avg_refs 70.854453 # Average number of references to valid blocks.
-system.cpu.dcache.warmup_cycle 25914401000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.occ_blocks::cpu.data 4083.522356 # Average occupied blocks per requestor
-system.cpu.dcache.occ_percent::cpu.data 0.996954 # Average percentage of cache occupancy
-system.cpu.dcache.occ_percent::total 0.996954 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 9111140 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4083.522356 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 645855059 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 9115236 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 70.854453 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 25914401000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4083.522356 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.996954 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.996954 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 475158039 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 475158039 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 170696898 # number of WriteReq hits