diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
commit | b63631536d974f31cf99ee280271dc0f7b4c746f (patch) | |
tree | ff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/60.bzip2/ref/arm | |
parent | 646c4a23ca44aab5468c896034288151c89be782 (diff) | |
download | gem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.
The main reason for bundling them up is to minimise the changeset
size.
Diffstat (limited to 'tests/long/se/60.bzip2/ref/arm')
-rw-r--r-- | tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt | 93 | ||||
-rw-r--r-- | tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt | 84 |
2 files changed, 89 insertions, 88 deletions
diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt index 3d9ea108c..f9e4efd28 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.541686 # Nu sim_ticks 541686426500 # Number of ticks simulated final_tick 541686426500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 161069 # Simulator instruction rate (inst/s) -host_op_rate 179684 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 56487595 # Simulator tick rate (ticks/s) -host_mem_usage 246340 # Number of bytes of host memory used -host_seconds 9589.48 # Real time elapsed on the host +host_inst_rate 146656 # Simulator instruction rate (inst/s) +host_op_rate 163606 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 51433162 # Simulator tick rate (ticks/s) +host_mem_usage 242412 # Number of bytes of host memory used +host_seconds 10531.85 # Real time elapsed on the host sim_insts 1544563023 # Number of instructions simulated sim_ops 1723073835 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 48128 # Number of bytes read from this memory @@ -34,14 +34,15 @@ system.physmem.bw_total::writebacks 130020847 # To system.physmem.bw_total::cpu.inst 88848 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 265329831 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 395439526 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 2246464 # Total number of read requests seen -system.physmem.writeReqs 1100477 # Total number of write requests seen -system.physmem.cpureqs 3346951 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 2246464 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 1100477 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 2246464 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 1100477 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 143773696 # Total number of bytes read from memory system.physmem.bytesWritten 70430528 # Total number of bytes written to memory system.physmem.bytesConsumedRd 143773696 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 70430528 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 599 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 599 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 139699 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 136238 # Track reads on a per bank basis @@ -316,10 +317,10 @@ system.membus.trans_dist::ReadResp 1420070 # Tr system.membus.trans_dist::Writeback 1100477 # Transaction distribution system.membus.trans_dist::ReadExReq 826393 # Transaction distribution system.membus.trans_dist::ReadExResp 826393 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 5593404 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 5593404 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 214204160 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 214204160 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 5593404 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 5593404 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 214204160 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 214204160 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 214204160 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 12928469250 # Layer occupancy (ticks) @@ -644,12 +645,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 7709687 # Tr system.cpu.toL2Bus.trans_dist::Writeback 3782769 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1893417 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1893417 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 1564 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 22987414 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 22988978 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 50048 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 856645824 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 856695872 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1564 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 22987414 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 22988978 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 50048 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 856645824 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 856695872 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 856695872 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 10475876330 # Layer occupancy (ticks) @@ -658,15 +659,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 1321749 # La system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 14846430743 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 2.7 # Layer utilization (%) -system.cpu.icache.tags.replacements 22 # number of replacements -system.cpu.icache.tags.tagsinuse 629.635316 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 290622345 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 782 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 371639.827366 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 629.635316 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.307439 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.307439 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 22 # number of replacements +system.cpu.icache.tags.tagsinuse 629.635316 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 290622345 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 782 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 371639.827366 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 629.635316 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.307439 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.307439 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 290622345 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 290622345 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 290622345 # number of demand (read+write) hits @@ -742,19 +743,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 76009.911765 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 76009.911765 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 76009.911765 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 2213775 # number of replacements -system.cpu.l2cache.tags.tagsinuse 31546.363307 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 9248170 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 2243553 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 4.122109 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 21352949250 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 2213775 # number of replacements +system.cpu.l2cache.tags.tagsinuse 31546.363307 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 9248170 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 2243553 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 4.122109 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 21352949250 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 14312.491305 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 20.144724 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 17213.727277 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 20.144724 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 17213.727277 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.436783 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.000615 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.525321 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.962719 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.962719 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 29 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 6289580 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 6289609 # number of ReadReq hits @@ -889,15 +890,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 64876.329787 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 86543.412735 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 86536.159716 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 9598226 # number of replacements -system.cpu.dcache.tags.tagsinuse 4088.205485 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 655929620 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 9602322 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 68.309480 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 3516509250 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4088.205485 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.998097 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.998097 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 9598226 # number of replacements +system.cpu.dcache.tags.tagsinuse 4088.205485 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 655929620 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 9602322 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 68.309480 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 3516509250 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4088.205485 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.998097 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.998097 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 488969047 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 488969047 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 166960447 # number of WriteReq hits diff --git a/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt index 991abe176..0ee21876c 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.391205 # Nu sim_ticks 2391205115000 # Number of ticks simulated final_tick 2391205115000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1401168 # Simulator instruction rate (inst/s) -host_op_rate 1563717 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2177389973 # Simulator tick rate (ticks/s) -host_mem_usage 243008 # Number of bytes of host memory used -host_seconds 1098.20 # Real time elapsed on the host +host_inst_rate 594937 # Simulator instruction rate (inst/s) +host_op_rate 663956 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 924522029 # Simulator tick rate (ticks/s) +host_mem_usage 240640 # Number of bytes of host memory used +host_seconds 2586.42 # Real time elapsed on the host sim_insts 1538759601 # Number of instructions simulated sim_ops 1717270334 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 39424 # Number of bytes read from this memory @@ -40,10 +40,10 @@ system.membus.trans_dist::ReadResp 1177898 # Tr system.membus.trans_dist::Writeback 1017198 # Transaction distribution system.membus.trans_dist::ReadExReq 780876 # Transaction distribution system.membus.trans_dist::ReadExResp 780876 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 4934746 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 4934746 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 190462208 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 190462208 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 4934746 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 4934746 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 190462208 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 190462208 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 190462208 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 11113556000 # Layer occupancy (ticks) @@ -115,15 +115,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 4782410230 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 7 # number of replacements -system.cpu.icache.tags.tagsinuse 514.976015 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1544564952 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 638 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 2420948.200627 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 514.976015 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.251453 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.251453 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 7 # number of replacements +system.cpu.icache.tags.tagsinuse 514.976015 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1544564952 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 638 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 2420948.200627 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 514.976015 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.251453 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.251453 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1544564952 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1544564952 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1544564952 # number of demand (read+write) hits @@ -193,19 +193,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 51656.739812 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 51656.739812 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 51656.739812 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 1926075 # number of replacements -system.cpu.l2cache.tags.tagsinuse 30987.094489 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 8967572 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 1955843 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 4.585016 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 154026636000 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 1926075 # number of replacements +system.cpu.l2cache.tags.tagsinuse 30987.094489 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 8967572 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 1955843 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 4.585016 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 154026636000 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 15648.493745 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 24.153175 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 15314.447570 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 24.153175 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 15314.447570 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.477554 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.000737 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.467360 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.945651 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.945651 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 22 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 6048805 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 6048827 # number of ReadReq hits @@ -331,15 +331,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40108.766234 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40005.192635 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40005.225207 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 9111140 # number of replacements -system.cpu.dcache.tags.tagsinuse 4083.522356 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 645855059 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 9115236 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 70.854453 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 25914401000 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4083.522356 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.996954 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.996954 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 9111140 # number of replacements +system.cpu.dcache.tags.tagsinuse 4083.522356 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 645855059 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 9115236 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 70.854453 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 25914401000 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4083.522356 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.996954 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.996954 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 475158039 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 475158039 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 170696898 # number of WriteReq hits @@ -445,12 +445,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 7226725 # Tr system.cpu.toL2Bus.trans_dist::Writeback 3697418 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1889149 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1889149 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 1276 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 21927890 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 21929166 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 40832 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 820009856 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 820050688 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1276 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 21927890 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 21929166 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 40832 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 820009856 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 820050688 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 820050688 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 10104064000 # Layer occupancy (ticks) |