diff options
author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
---|---|---|
committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/long/se/60.bzip2/ref/x86/linux/simple-timing | |
parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/long/se/60.bzip2/ref/x86/linux/simple-timing')
-rwxr-xr-x | tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout | 6 | ||||
-rw-r--r-- | tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt | 20 |
2 files changed, 13 insertions, 13 deletions
diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout index 842f4ca6e..2a7659f1c 100755 --- a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout +++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing/simout -Redirecting stderr to build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 06:21:20 -gem5 started Sep 22 2013 06:22:01 +gem5 compiled Oct 16 2013 01:35:57 +gem5 started Oct 16 2013 01:55:52 gem5 executing on zizzer command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt index 776ec92d3..f740c02c8 100644 --- a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 5.882581 # Nu sim_ticks 5882580526000 # Number of ticks simulated final_tick 5882580526000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 645050 # Simulator instruction rate (inst/s) -host_op_rate 1005047 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1261455450 # Simulator tick rate (ticks/s) -host_mem_usage 245540 # Number of bytes of host memory used -host_seconds 4663.33 # Real time elapsed on the host +host_inst_rate 876676 # Simulator instruction rate (inst/s) +host_op_rate 1365940 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1714420225 # Simulator tick rate (ticks/s) +host_mem_usage 249312 # Number of bytes of host memory used +host_seconds 3431.24 # Real time elapsed on the host sim_insts 3008081022 # Number of instructions simulated sim_ops 4686862596 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 43200 # Number of bytes read from this memory @@ -58,16 +58,18 @@ system.cpu.numWorkItemsStarted 0 # nu system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 3008081022 # Number of instructions committed system.cpu.committedOps 4686862596 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 4686862527 # Number of integer alu accesses +system.cpu.num_int_alu_accesses 4684368009 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses system.cpu.num_func_calls 33534539 # number of times a function call or return occured system.cpu.num_conditional_control_insts 182173300 # number of instructions that are conditional controls -system.cpu.num_int_insts 4686862527 # number of integer instructions +system.cpu.num_int_insts 4684368009 # number of integer instructions system.cpu.num_fp_insts 0 # number of float instructions -system.cpu.num_int_register_reads 11915474428 # number of times the integer registers were read -system.cpu.num_int_register_writes 5355771938 # number of times the integer registers were written +system.cpu.num_int_register_reads 10688755601 # number of times the integer registers were read +system.cpu.num_int_register_writes 3999841477 # number of times the integer registers were written system.cpu.num_fp_register_reads 0 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu.num_cc_register_reads 1226718827 # number of times the CC registers were read +system.cpu.num_cc_register_writes 1355930461 # number of times the CC registers were written system.cpu.num_mem_refs 1677713084 # number of memory refs system.cpu.num_load_insts 1239184746 # Number of load instructions system.cpu.num_store_insts 438528338 # Number of store instructions |