stats: Add power stats to test references

Change-Id: Ic827213134b199446822f128b81d4a480e777fee

2 files changed, 31 insertions, 10 deletions

diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
index 65376a235..3f6006735 100644
--- a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  2.846007                       # Nu
 sim_ticks                                2846007227500                       # Number of ticks simulated
 final_tick                               2846007227500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 786137                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1224873                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              743780816                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 258352                       # Number of bytes of host memory used
-host_seconds                                  3826.41                       # Real time elapsed on the host
+host_inst_rate                                1672243                       # Simulator instruction rate (inst/s)
+host_op_rate                                  2605507                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1582143797                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 305608                       # Number of bytes of host memory used
+host_seconds                                  1798.83                       # Real time elapsed on the host
 sim_insts                                  3008081022                       # Number of instructions simulated
 sim_ops                                    4686862596                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 2846007227500                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst       32105863056                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data        5023868345                       # Number of bytes read from this memory
 system.physmem.bytes_read::total          37129731401                       # Number of bytes read from this memory
@@ -35,9 +36,14 @@ system.physmem.bw_write::total              542745211                       # Wr
 system.physmem.bw_total::cpu.inst         11281019509                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data          2307979078                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total            13588998587                       # Total bandwidth to/from this memory (bytes/s)
+system.pwrStateResidencyTicks::UNDEFINED 2846007227500                       # Cumulative time (in ticks) in various power states
 system.cpu_clk_domain.clock                       500                       # Clock period in ticks
+system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2846007227500                       # Cumulative time (in ticks) in various power states
 system.cpu.apic_clk_domain.clock                 8000                       # Clock period in ticks
+system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 2846007227500                       # Cumulative time (in ticks) in various power states
+system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 2846007227500                       # Cumulative time (in ticks) in various power states
 system.cpu.workload.num_syscalls                   46                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON    2846007227500                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                       5692014456                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -98,6 +104,7 @@ system.cpu.op_class::MemWrite               438528338      9.36%    100.00% # Cl
 system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                 4686862596                       # Class of executed instruction
+system.membus.pwrStateResidencyTicks::UNDEFINED 2846007227500                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadReq          5252417628                       # Transaction distribution
 system.membus.trans_dist::ReadResp         5252417628                       # Transaction distribution
 system.membus.trans_dist::WriteReq          438528338                       # Transaction distribution
diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt
index e4e1963fc..5b0c36dc3 100644
--- a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  5.895948                       # Nu
 sim_ticks                                5895947852500                       # Number of ticks simulated
 final_tick                               5895947852500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 545612                       # Simulator instruction rate (inst/s)
-host_op_rate                                   850113                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1069419451                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 268340                       # Number of bytes of host memory used
-host_seconds                                  5513.22                       # Real time elapsed on the host
+host_inst_rate                                1001702                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1560742                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1963371956                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 316648                       # Number of bytes of host memory used
+host_seconds                                  3002.97                       # Real time elapsed on the host
 sim_insts                                  3008081022                       # Number of instructions simulated
 sim_ops                                    4686862596                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst             43200                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data         124876480                       # Number of bytes read from this memory
 system.physmem.bytes_read::total            124919680                       # Number of bytes read from this memory
@@ -36,9 +37,14 @@ system.physmem.bw_total::writebacks          11096858                       # To
 system.physmem.bw_total::cpu.inst                7327                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data            21180052                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total               32284237                       # Total bandwidth to/from this memory (bytes/s)
+system.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu_clk_domain.clock                       500                       # Clock period in ticks
+system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.apic_clk_domain.clock                 8000                       # Clock period in ticks
+system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
+system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.workload.num_syscalls                   46                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON    5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                      11791895705                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -99,6 +105,7 @@ system.cpu.op_class::MemWrite               438528338      9.36%    100.00% # Cl
 system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                 4686862596                       # Class of executed instruction
+system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.tags.replacements           9108581                       # number of replacements
 system.cpu.dcache.tags.tagsinuse          4084.587762                       # Cycle average of tags in use
 system.cpu.dcache.tags.total_refs          1668600407                       # Total number of references to valid blocks.
@@ -117,6 +124,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::4            2
 system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
 system.cpu.dcache.tags.tag_accesses        3364538845                       # Number of tag accesses
 system.cpu.dcache.tags.data_accesses       3364538845                       # Number of data accesses
+system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.ReadReq_hits::cpu.data   1231961896                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total      1231961896                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data    436638511                       # number of WriteReq hits
@@ -205,6 +213,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 22491.821229
 system.cpu.dcache.demand_avg_mshr_miss_latency::total 22491.821229                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 22491.821229                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 22491.821229                       # average overall mshr miss latency
+system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.tags.replacements                10                       # number of replacements
 system.cpu.icache.tags.tagsinuse           555.751337                       # Cycle average of tags in use
 system.cpu.icache.tags.total_refs          4013232207                       # Total number of references to valid blocks.
@@ -220,6 +229,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::4          632
 system.cpu.icache.tags.occ_task_id_percent::1024     0.324707                       # Percentage of cache occupancy per task id
 system.cpu.icache.tags.tag_accesses        8026466439                       # Number of tag accesses
 system.cpu.icache.tags.data_accesses       8026466439                       # Number of data accesses
+system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.ReadReq_hits::cpu.inst   4013232207                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total      4013232207                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst    4013232207                       # number of demand (read+write) hits
@@ -288,6 +298,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 61014.074074
 system.cpu.icache.demand_avg_mshr_miss_latency::total 61014.074074                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 61014.074074                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::total 61014.074074                       # average overall mshr miss latency
+system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.tags.replacements          1919169                       # number of replacements
 system.cpu.l2cache.tags.tagsinuse        31137.283983                       # Cycle average of tags in use
 system.cpu.l2cache.tags.total_refs           14382005                       # Total number of references to valid blocks.
@@ -310,6 +321,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::4        27925
 system.cpu.l2cache.tags.occ_task_id_percent::1024     0.908905                       # Percentage of cache occupancy per task id
 system.cpu.l2cache.tags.tag_accesses        149614323                       # Number of tag accesses
 system.cpu.l2cache.tags.data_accesses       149614323                       # Number of data accesses
+system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.WritebackDirty_hits::writebacks      3682716                       # number of WritebackDirty hits
 system.cpu.l2cache.WritebackDirty_hits::total      3682716                       # number of WritebackDirty hits
 system.cpu.l2cache.WritebackClean_hits::writebacks           10                       # number of WritebackClean hits
@@ -452,6 +464,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0
 system.cpu.toL2Bus.snoop_filter.tot_snoops         1002                       # Total number of snoops made to the snoop filter.
 system.cpu.toL2Bus.snoop_filter.hit_single_snoops         1002                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
 system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.cpu.toL2Bus.trans_dist::ReadResp       7223525                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::WritebackDirty      4705005                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::WritebackClean           10                       # Transaction distribution
@@ -484,6 +497,7 @@ system.cpu.toL2Bus.respLayer0.occupancy       1012500                       # La
 system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
 system.cpu.toL2Bus.respLayer1.occupancy   13669015500                       # Layer occupancy (ticks)
 system.cpu.toL2Bus.respLayer1.utilization          0.2                       # Layer utilization (%)
+system.membus.pwrStateResidencyTicks::UNDEFINED 5895947852500                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadResp            1169437                       # Transaction distribution
 system.membus.trans_dist::WritebackDirty      1022289                       # Transaction distribution
 system.membus.trans_dist::CleanEvict           896090                       # Transaction distribution