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author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-27 18:36:21 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-27 18:36:21 -0500 |
commit | 4646369afd408b486fd3515c35d6c6bbe8960839 (patch) | |
tree | 0649a2372083956dc573d4b0d56d60c1c15a344c /tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout | |
parent | 4920f0d7e5a4c29ada074bf3a73f36510e138016 (diff) | |
download | gem5-4646369afd408b486fd3515c35d6c6bbe8960839.tar.xz |
regressions: update due to cache latency fix
Diffstat (limited to 'tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout')
-rwxr-xr-x | tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout index a97feb72b..eac5f6715 100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout +++ b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout @@ -3,8 +3,8 @@ Redirecting stderr to build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/inorder gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:29:27 +gem5 compiled Mar 26 2013 14:38:52 +gem5 started Mar 26 2013 23:05:23 gem5 executing on ribera.cs.wisc.edu command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/inorder-timing -re tests/run.py build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/inorder-timing Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/inorder-timing/smred.sav @@ -25,4 +25,4 @@ Authors: Carl Sechen, Bill Swartz 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -122 123 124 Exiting @ tick 41615049000 because target called exit() +122 123 124 Exiting @ tick 41622221000 because target called exit() |