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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2014-07-19 19:04:58 -0700 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2014-07-19 19:04:58 -0700 |
commit | 040fa23d01109c68d194d2517df777844e4e2f13 (patch) | |
tree | 822b7da72458db435480c20c1a3448f6158c62aa /tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt | |
parent | 06bb6a473157a204bb7e77ea28e618aa08d2d811 (diff) | |
download | gem5-040fa23d01109c68d194d2517df777844e4e2f13.tar.xz |
stats: update for syscall DPRINTF change
Only printing one rather than two args for the ignored syscall
warning means the count of register accesses has changed on
a few runs. Oddly only Alpha Tru64 seems to have any ignored
syscalls in the regression tests.
Diffstat (limited to 'tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt')
-rw-r--r-- | tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt index 22a3b525f..35ce90696 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.023058 # Nu sim_ticks 23058360500 # Number of ticks simulated final_tick 23058360500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 185322 # Simulator instruction rate (inst/s) -host_op_rate 185322 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 50763012 # Simulator tick rate (ticks/s) -host_mem_usage 226392 # Number of bytes of host memory used -host_seconds 454.24 # Real time elapsed on the host +host_inst_rate 185744 # Simulator instruction rate (inst/s) +host_op_rate 185744 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 50878767 # Simulator tick rate (ticks/s) +host_mem_usage 227216 # Number of bytes of host memory used +host_seconds 453.20 # Real time elapsed on the host sim_insts 84179709 # Number of instructions simulated sim_ops 84179709 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -575,7 +575,7 @@ system.cpu.cpi 0.547837 # CP system.cpu.cpi_total 0.547837 # CPI: Total CPI of All Threads system.cpu.ipc 1.825362 # IPC: Instructions Per Cycle system.cpu.ipc_total 1.825362 # IPC: Total IPC of All Threads -system.cpu.int_regfile_reads 130779467 # number of integer regfile reads +system.cpu.int_regfile_reads 130779466 # number of integer regfile reads system.cpu.int_regfile_writes 71543363 # number of integer regfile writes system.cpu.fp_regfile_reads 6233836 # number of floating regfile reads system.cpu.fp_regfile_writes 6101151 # number of floating regfile writes |