summaryrefslogtreecommitdiff
path: root/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2013-05-30 12:54:18 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-05-30 12:54:18 -0400
commit74553c7d3fc5430752c0c08f2b319a99fb7ed632 (patch)
tree79b2a309fff0edaf1ef3e9aa62656904c3351650 /tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic
parent3bc4ecdcb4785a976a1c3fd463bf7052b8415d8b (diff)
downloadgem5-74553c7d3fc5430752c0c08f2b319a99fb7ed632.tar.xz
stats: Update the stats to reflect bus and memory changes
This patch updates the stats to reflect the addition of the bus stats, and changes to the bus layers. In addition it updates the stats to match the addition of the static pipeline latency of the memory conotroller and the addition of a stat tracking the bytes per activate.
Diffstat (limited to 'tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic')
-rw-r--r--tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt13
1 files changed, 8 insertions, 5 deletions
diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
index e64f41702..31612b0d4 100644
--- a/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
+++ b/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.045952 # Nu
sim_ticks 45951567500 # Number of ticks simulated
final_tick 45951567500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1141309 # Simulator instruction rate (inst/s)
-host_op_rate 1141309 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 570654979 # Simulator tick rate (ticks/s)
-host_mem_usage 267644 # Number of bytes of host memory used
-host_seconds 80.52 # Real time elapsed on the host
+host_inst_rate 3944537 # Simulator instruction rate (inst/s)
+host_op_rate 3944535 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1972268010 # Simulator tick rate (ticks/s)
+host_mem_usage 220188 # Number of bytes of host memory used
+host_seconds 23.30 # Real time elapsed on the host
sim_insts 91903056 # Number of instructions simulated
sim_ops 91903056 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 367612356 # Number of bytes read from this memory
@@ -33,6 +33,9 @@ system.physmem.bw_write::total 672903574 # Wr
system.physmem.bw_total::cpu.inst 7999995996 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 3030549393 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 11030545389 # Total bandwidth to/from this memory (bytes/s)
+system.membus.throughput 11030545389 # Throughput (bytes/s)
+system.membus.data_through_bus 506870851 # Total data (bytes)
+system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv