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authorAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
commitb63631536d974f31cf99ee280271dc0f7b4c746f (patch)
treeff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
parent646c4a23ca44aab5468c896034288151c89be782 (diff)
downloadgem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models. The main reason for bundling them up is to minimise the changeset size.
Diffstat (limited to 'tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt')
-rw-r--r--tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt84
1 files changed, 42 insertions, 42 deletions
diff --git a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
index 371d1c275..3a3e9e512 100644
--- a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.232072 # Nu
sim_ticks 232072304000 # Number of ticks simulated
final_tick 232072304000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1198657 # Simulator instruction rate (inst/s)
-host_op_rate 1312657 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1618778979 # Simulator tick rate (ticks/s)
-host_mem_usage 245268 # Number of bytes of host memory used
-host_seconds 143.36 # Real time elapsed on the host
+host_inst_rate 705973 # Simulator instruction rate (inst/s)
+host_op_rate 773116 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 953412259 # Simulator tick rate (ticks/s)
+host_mem_usage 242928 # Number of bytes of host memory used
+host_seconds 243.41 # Real time elapsed on the host
sim_insts 171842483 # Number of instructions simulated
sim_ops 188185920 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 110656 # Number of bytes read from this memory
@@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 2361 # Tr
system.membus.trans_dist::ReadResp 2361 # Transaction distribution
system.membus.trans_dist::ReadExReq 1092 # Transaction distribution
system.membus.trans_dist::ReadExResp 1092 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 6906 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 6906 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 220992 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 220992 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 6906 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 6906 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 220992 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 220992 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 220992 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 3453000 # Layer occupancy (ticks)
@@ -107,15 +107,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 464144608 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 1506 # number of replacements
-system.cpu.icache.tags.tagsinuse 1147.986161 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 189857001 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 3051 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 62227.794494 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1147.986161 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.560540 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.560540 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 1506 # number of replacements
+system.cpu.icache.tags.tagsinuse 1147.986161 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 189857001 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 3051 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 62227.794494 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 1147.986161 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.560540 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.560540 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 189857001 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 189857001 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 189857001 # number of demand (read+write) hits
@@ -185,19 +185,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 34801.376598
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 34801.376598 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 34801.376598 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 1675.655740 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 1380 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 2369 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.582524 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 1675.655740 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 1380 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 2369 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.582524 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 3.038044 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 1169.032828 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 503.584868 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 1169.032828 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 503.584868 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.000093 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.035676 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.015368 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.051137 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.051137 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 1322 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 57 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 1379 # number of ReadReq hits
@@ -321,15 +321,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 40 # number of replacements
-system.cpu.dcache.tags.tagsinuse 1363.611259 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 42007358 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 1789 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 23480.915595 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 1363.611259 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.332913 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.332913 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 40 # number of replacements
+system.cpu.dcache.tags.tagsinuse 1363.611259 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 42007358 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 1789 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 23480.915595 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 1363.611259 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.332913 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.332913 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 29599357 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 29599357 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 12363187 # number of WriteReq hits
@@ -435,12 +435,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 3740 # Tr
system.cpu.toL2Bus.trans_dist::Writeback 16 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 1100 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 1100 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 6102 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3594 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 9696 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 195264 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 115520 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 310784 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 6102 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3594 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 9696 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 195264 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 115520 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 310784 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 310784 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 2444000 # Layer occupancy (ticks)