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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
| commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
| tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/long/se/70.twolf/ref/arm | |
| parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
| download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz | |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/long/se/70.twolf/ref/arm')
3 files changed, 10 insertions, 13 deletions
diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini index 271729e48..d981a43f0 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout index 000af632b..5ce7704c2 100755 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout @@ -1,14 +1,10 @@ -Redirecting stdout to build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/simout -Redirecting stderr to build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 09:14:29 +gem5 compiled Oct 16 2013 01:36:42 +gem5 started Oct 16 2013 02:15:41 gem5 executing on zizzer command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing -Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sav -Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sv2 Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt index cd02e0594..a815317b1 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.074201 # Nu sim_ticks 74201024500 # Number of ticks simulated final_tick 74201024500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 88798 # Simulator instruction rate (inst/s) -host_op_rate 97225 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 38240010 # Simulator tick rate (ticks/s) -host_mem_usage 245976 # Number of bytes of host memory used -host_seconds 1940.40 # Real time elapsed on the host +host_inst_rate 115322 # Simulator instruction rate (inst/s) +host_op_rate 126267 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 49662501 # Simulator tick rate (ticks/s) +host_mem_usage 251448 # Number of bytes of host memory used +host_seconds 1494.11 # Real time elapsed on the host sim_insts 172303021 # Number of instructions simulated sim_ops 188656503 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 131328 # Number of bytes read from this memory @@ -358,8 +358,8 @@ system.cpu.rename.LSQFullEvents 3662384 # Nu system.cpu.rename.FullRegisterEvents 29 # Number of times there has been no free registers system.cpu.rename.RenamedOperands 631760398 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 1581883462 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 1564582781 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 17300681 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 1507069248 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 3196133 # Number of floating rename lookups system.cpu.rename.CommittedMaps 298044139 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 333716259 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 25188 # count of serializing insts renamed |