stats: Bump stats for the fixes, and mostly DRAM controller changes

2 files changed, 80 insertions, 10 deletions

diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
index 1f6381fd7..85aa0370c 100644
--- a/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.096723                       # Nu
 sim_ticks                                 96722945000                       # Number of ticks simulated
 final_tick                                96722945000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                2588672                       # Simulator instruction rate (inst/s)
-host_op_rate                                  2588674                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1294344494                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 233760                       # Number of bytes of host memory used
-host_seconds                                    74.73                       # Real time elapsed on the host
+host_inst_rate                                2358558                       # Simulator instruction rate (inst/s)
+host_op_rate                                  2358560                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1179286883                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 269756                       # Number of bytes of host memory used
+host_seconds                                    82.02                       # Real time elapsed on the host
 sim_insts                                   193444518                       # Number of instructions simulated
 sim_ops                                     193444756                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
@@ -65,5 +65,40 @@ system.cpu.num_busy_cycles                  193445891                       # Nu
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 system.cpu.Branches                          15132745                       # Number of branches fetched
+system.cpu.op_class::No_OpClass              13329871      6.89%      6.89% # Class of executed instruction
+system.cpu.op_class::IntAlu                 102506896     52.99%     59.88% # Class of executed instruction
+system.cpu.op_class::IntMult                        0      0.00%     59.88% # Class of executed instruction
+system.cpu.op_class::IntDiv                         0      0.00%     59.88% # Class of executed instruction
+system.cpu.op_class::FloatAdd                  875036      0.45%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatCmp                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatCvt                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatMult                      0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatDiv                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatSqrt                      0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdAdd                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc                     0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdAlu                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdCmp                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdCvt                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdMisc                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdMult                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc                    0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdShift                      0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdSqrt                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc                  0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult                  0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc               0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt                  0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::MemRead                 57735103     29.85%     90.18% # Class of executed instruction
+system.cpu.op_class::MemWrite                18998867      9.82%    100.00% # Class of executed instruction
+system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
+system.cpu.op_class::total                  193445773                       # Class of executed instruction
 
 ---------- End Simulation Statistics   ----------
diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
index dc02f2f3d..117dae8be 100644
--- a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.270563                       # Nu
 sim_ticks                                270563082000                       # Number of ticks simulated
 final_tick                               270563082000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1313314                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1313315                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1836878526                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 242660                       # Number of bytes of host memory used
-host_seconds                                   147.30                       # Real time elapsed on the host
+host_inst_rate                                1069922                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1069924                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1496457293                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 278484                       # Number of bytes of host memory used
+host_seconds                                   180.80                       # Real time elapsed on the host
 sim_insts                                   193444518                       # Number of instructions simulated
 sim_ops                                     193444756                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
@@ -69,6 +69,41 @@ system.cpu.num_busy_cycles                  541126164                       # Nu
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 system.cpu.Branches                          15132745                       # Number of branches fetched
+system.cpu.op_class::No_OpClass              13329871      6.89%      6.89% # Class of executed instruction
+system.cpu.op_class::IntAlu                 102506896     52.99%     59.88% # Class of executed instruction
+system.cpu.op_class::IntMult                        0      0.00%     59.88% # Class of executed instruction
+system.cpu.op_class::IntDiv                         0      0.00%     59.88% # Class of executed instruction
+system.cpu.op_class::FloatAdd                  875036      0.45%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatCmp                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatCvt                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatMult                      0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatDiv                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::FloatSqrt                      0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdAdd                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc                     0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdAlu                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdCmp                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdCvt                        0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdMisc                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdMult                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc                    0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdShift                      0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdSqrt                       0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv                   0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc                  0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult                  0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc               0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt                  0      0.00%     60.33% # Class of executed instruction
+system.cpu.op_class::MemRead                 57735103     29.85%     90.18% # Class of executed instruction
+system.cpu.op_class::MemWrite                18998867      9.82%    100.00% # Class of executed instruction
+system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
+system.cpu.op_class::total                  193445773                       # Class of executed instruction
 system.cpu.icache.tags.replacements             10362                       # number of replacements
 system.cpu.icache.tags.tagsinuse          1591.579171                       # Cycle average of tags in use
 system.cpu.icache.tags.total_refs           193433248                       # Total number of references to valid blocks.