Stats: Updates due to bus changes

This patch bumps all the stats to reflect the bus changes, i.e. the
introduction of the state variable, the division into a request and
response layer, and the new default bus width of 8 bytes.

3 files changed, 41 insertions, 41 deletions

diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
index 35d8a380c..fd32216ef 100644
--- a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
@@ -148,7 +148,7 @@ block_size=64
 clock=1000
 header_cycles=1
 use_default_range=false
-width=64
+width=8
 master=system.cpu.l2cache.cpu_side
 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
@@ -158,7 +158,7 @@ type=ExeTracer
 [system.cpu.workload]
 type=LiveProcess
 cmd=twolf smred
-cwd=build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing
+cwd=build/SPARC/tests/fast/long/se/70.twolf/sparc/linux/simple-timing
 egid=100
 env=
 errout=cerr
@@ -180,7 +180,7 @@ block_size=64
 clock=1000
 header_cycles=1
 use_default_range=false
-width=64
+width=8
 master=system.physmem.port[0]
 slave=system.system_port system.cpu.l2cache.mem_side
 
diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout
index 8467606a8..123985114 100755
--- a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout
+++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout
@@ -1,12 +1,12 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jun  4 2012 12:01:47
-gem5 started Jun  4 2012 15:02:43
+gem5 compiled Jul  2 2012 08:54:18
+gem5 started Jul  2 2012 12:35:14
 gem5 executing on zizzer
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing
-Couldn't unlink  build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing/smred.sav
-Couldn't unlink  build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing/smred.sv2
+command line: build/SPARC/gem5.fast -d build/SPARC/tests/fast/long/se/70.twolf/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/fast/long/se/70.twolf/sparc/linux/simple-timing
+Couldn't unlink  build/SPARC/tests/fast/long/se/70.twolf/sparc/linux/simple-timing/smred.sav
+Couldn't unlink  build/SPARC/tests/fast/long/se/70.twolf/sparc/linux/simple-timing/smred.sv2
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 
@@ -23,4 +23,4 @@ Authors: Carl Sechen, Bill Swartz
  91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
 info: Increasing stack size by one page.
-122 123 124 Exiting @ tick 270576960000 because target called exit()
+122 123 124 Exiting @ tick 270628681000 because target called exit()
diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
index 170992582..23f251d47 100644
--- a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
@@ -1,14 +1,14 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.270577                       # Number of seconds simulated
-sim_ticks                                270576960000                       # Number of ticks simulated
-final_tick                               270576960000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.270629                       # Number of seconds simulated
+sim_ticks                                270628681000                       # Number of ticks simulated
+final_tick                               270628681000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1394951                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1394952                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1951161352                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 227304                       # Number of bytes of host memory used
-host_seconds                                   138.67                       # Real time elapsed on the host
+host_inst_rate                                1015199                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1015200                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1420261450                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 225612                       # Number of bytes of host memory used
+host_seconds                                   190.55                       # Real time elapsed on the host
 sim_insts                                   193444531                       # Number of instructions simulated
 sim_ops                                     193444769                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst            230208                       # Number of bytes read from this memory
@@ -19,16 +19,16 @@ system.physmem.bytes_inst_read::total          230208                       # Nu
 system.physmem.num_reads::cpu.inst               3597                       # Number of read requests responded to by this memory
 system.physmem.num_reads::cpu.data               1576                       # Number of read requests responded to by this memory
 system.physmem.num_reads::total                  5173                       # Number of read requests responded to by this memory
-system.physmem.bw_read::cpu.inst               850804                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data               372774                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total                 1223578                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst          850804                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total             850804                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst              850804                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data              372774                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total                1223578                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst               850642                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data               372703                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total                 1223344                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst          850642                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total             850642                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst              850642                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data              372703                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total                1223344                       # Total bandwidth to/from this memory (bytes/s)
 system.cpu.workload.num_syscalls                  401                       # Number of system calls
-system.cpu.numCycles                        541153920                       # number of cpu cycles simulated
+system.cpu.numCycles                        541257362                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                   193444531                       # Number of instructions committed
@@ -47,18 +47,18 @@ system.cpu.num_mem_refs                      76733959                       # nu
 system.cpu.num_load_insts                    57735092                       # Number of load instructions
 system.cpu.num_store_insts                   18998867                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                  541153920                       # Number of busy cycles
+system.cpu.num_busy_cycles                  541257362                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 system.cpu.icache.replacements                  10362                       # number of replacements
-system.cpu.icache.tagsinuse               1591.571713                       # Cycle average of tags in use
+system.cpu.icache.tagsinuse               1591.549936                       # Cycle average of tags in use
 system.cpu.icache.total_refs                193433261                       # Total number of references to valid blocks.
 system.cpu.icache.sampled_refs                  12288                       # Sample count of references to valid blocks.
 system.cpu.icache.avg_refs               15741.639079                       # Average number of references to valid blocks.
 system.cpu.icache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
-system.cpu.icache.occ_blocks::cpu.inst    1591.571713                       # Average occupied blocks per requestor
-system.cpu.icache.occ_percent::cpu.inst      0.777135                       # Average percentage of cache occupancy
-system.cpu.icache.occ_percent::total         0.777135                       # Average percentage of cache occupancy
+system.cpu.icache.occ_blocks::cpu.inst    1591.549936                       # Average occupied blocks per requestor
+system.cpu.icache.occ_percent::cpu.inst      0.777124                       # Average percentage of cache occupancy
+system.cpu.icache.occ_percent::total         0.777124                       # Average percentage of cache occupancy
 system.cpu.icache.ReadReq_hits::cpu.inst    193433261                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total       193433261                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst     193433261                       # number of demand (read+write) hits
@@ -129,14 +129,14 @@ system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 23294.433594
 system.cpu.icache.overall_avg_mshr_miss_latency::total 23294.433594                       # average overall mshr miss latency
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
 system.cpu.dcache.replacements                      2                       # number of replacements
-system.cpu.dcache.tagsinuse               1237.197455                       # Cycle average of tags in use
+system.cpu.dcache.tagsinuse               1237.179086                       # Cycle average of tags in use
 system.cpu.dcache.total_refs                 76732338                       # Total number of references to valid blocks.
 system.cpu.dcache.sampled_refs                   1576                       # Sample count of references to valid blocks.
 system.cpu.dcache.avg_refs               48688.031726                       # Average number of references to valid blocks.
 system.cpu.dcache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
-system.cpu.dcache.occ_blocks::cpu.data    1237.197455                       # Average occupied blocks per requestor
-system.cpu.dcache.occ_percent::cpu.data      0.302050                       # Average percentage of cache occupancy
-system.cpu.dcache.occ_percent::total         0.302050                       # Average percentage of cache occupancy
+system.cpu.dcache.occ_blocks::cpu.data    1237.179086                       # Average occupied blocks per requestor
+system.cpu.dcache.occ_percent::cpu.data      0.302046                       # Average percentage of cache occupancy
+system.cpu.dcache.occ_percent::total         0.302046                       # Average percentage of cache occupancy
 system.cpu.dcache.ReadReq_hits::cpu.data     57734571                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total        57734571                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data     18975362                       # number of WriteReq hits
@@ -249,18 +249,18 @@ system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data        53000
 system.cpu.dcache.overall_avg_mshr_miss_latency::total        53000                       # average overall mshr miss latency
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
 system.cpu.l2cache.replacements                     0                       # number of replacements
-system.cpu.l2cache.tagsinuse              2678.327135                       # Cycle average of tags in use
+system.cpu.l2cache.tagsinuse              2678.289467                       # Cycle average of tags in use
 system.cpu.l2cache.total_refs                    8691                       # Total number of references to valid blocks.
 system.cpu.l2cache.sampled_refs                  4097                       # Sample count of references to valid blocks.
 system.cpu.l2cache.avg_refs                  2.121308                       # Average number of references to valid blocks.
 system.cpu.l2cache.warmup_cycle                     0                       # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.occ_blocks::writebacks     0.000454                       # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.inst   2275.271466                       # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.data    403.055215                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_blocks::writebacks     0.000456                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_blocks::cpu.inst   2275.240506                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_blocks::cpu.data    403.048505                       # Average occupied blocks per requestor
 system.cpu.l2cache.occ_percent::writebacks     0.000000                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.inst     0.069436                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::cpu.inst     0.069435                       # Average percentage of cache occupancy
 system.cpu.l2cache.occ_percent::cpu.data     0.012300                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::total        0.081736                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::total        0.081735                       # Average percentage of cache occupancy
 system.cpu.l2cache.ReadReq_hits::cpu.inst         8691                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::total           8691                       # number of ReadReq hits
 system.cpu.l2cache.Writeback_hits::writebacks            2                       # number of Writeback hits