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authorNilay Vaish <nilay@cs.wisc.edu>2014-10-20 16:48:19 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2014-10-20 16:48:19 -0500
commitd2a0f60b69313ad869f81fb006c8e998e40cb3c1 (patch)
tree39b323ea65cc3c21cf3b00a05df44bcec214c580 /tests/long/se/70.twolf
parent922a9d8ed2488a3483dbbfff47a4f341fb707b7b (diff)
downloadgem5-d2a0f60b69313ad869f81fb006c8e998e40cb3c1.tar.xz
stats: updates due to previous mmap and exit_group patches.
Diffstat (limited to 'tests/long/se/70.twolf')
-rw-r--r--tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt6
-rw-r--r--tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt8
-rw-r--r--tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt8
-rw-r--r--tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt8
-rw-r--r--tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt8
-rw-r--r--tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt14
-rw-r--r--tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt8
-rw-r--r--tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt40
8 files changed, 50 insertions, 50 deletions
diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt
index 613bdf71b..eede9a19d 100644
--- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt
@@ -375,7 +375,7 @@ system.cpu.fetch.Insts 349266175 # Nu
system.cpu.fetch.Branches 85925623 # Number of branches that fetch encountered
system.cpu.fetch.predictedBranches 42726403 # Number of branches that fetch has predicted taken
system.cpu.fetch.Cycles 158254745 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu.fetch.SquashCycles 12044332 # Number of cycles fetch has spent squashing
+system.cpu.fetch.SquashCycles 12044333 # Number of cycles fetch has spent squashing
system.cpu.fetch.MiscStallCycles 129 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
system.cpu.fetch.PendingQuiesceStallCycles 37 # Number of stall cycles due to pending quiesce instructions
system.cpu.fetch.IcacheWaitRetryStallCycles 592 # Number of stall cycles due to full MSHR
@@ -644,7 +644,7 @@ system.cpu.commit.op_class_0::total 181650341 # Cl
system.cpu.commit.bw_lim_events 3353878 # number cycles where commit BW limit reached
system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits
system.cpu.rob.rob_reads 406255589 # The number of ROB reads
-system.cpu.rob.rob_writes 513821131 # The number of ROB writes
+system.cpu.rob.rob_writes 513821132 # The number of ROB writes
system.cpu.timesIdled 2630 # Number of times that the entire CPU went into an idle state and unscheduled itself
system.cpu.idleCycles 38922 # Total number of cycles that the CPU has spent unscheduled due to idling
system.cpu.committedInsts 172303021 # Number of Instructions Simulated
@@ -653,7 +653,7 @@ system.cpu.cpi 0.986122 # CP
system.cpu.cpi_total 0.986122 # CPI: Total CPI of All Threads
system.cpu.ipc 1.014073 # IPC: Instructions Per Cycle
system.cpu.ipc_total 1.014073 # IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 218958563 # number of integer regfile reads
+system.cpu.int_regfile_reads 218958580 # number of integer regfile reads
system.cpu.int_regfile_writes 114511116 # number of integer regfile writes
system.cpu.fp_regfile_reads 2904510 # number of floating regfile reads
system.cpu.fp_regfile_writes 2441819 # number of floating regfile writes
diff --git a/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
index 472f06dc1..b068c4279 100644
--- a/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
@@ -171,10 +171,10 @@ system.cpu.num_cc_register_writes 190815535 # nu
system.cpu.num_mem_refs 40540779 # number of memory refs
system.cpu.num_load_insts 27896144 # Number of load instructions
system.cpu.num_store_insts 12644635 # Number of store instructions
-system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 199192983 # Number of busy cycles
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
+system.cpu.num_busy_cycles 199192982.998000 # Number of busy cycles
+system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
system.cpu.Branches 40300311 # Number of branches fetched
system.cpu.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction
system.cpu.op_class::IntAlu 138988212 76.51% 76.51% # Class of executed instruction
diff --git a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
index 085a5b238..394a8f6cf 100644
--- a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
@@ -158,10 +158,10 @@ system.cpu.num_cc_register_writes 190815535 # nu
system.cpu.num_mem_refs 40540779 # number of memory refs
system.cpu.num_load_insts 27896144 # Number of load instructions
system.cpu.num_store_insts 12644635 # Number of store instructions
-system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 460346714 # Number of busy cycles
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
+system.cpu.num_busy_cycles 460346713.998000 # Number of busy cycles
+system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
system.cpu.Branches 40300311 # Number of branches fetched
system.cpu.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction
system.cpu.op_class::IntAlu 138988212 76.51% 76.51% # Class of executed instruction
diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
index 306fece1f..aa452dcbd 100644
--- a/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
@@ -80,10 +80,10 @@ system.cpu.num_fp_register_writes 2974850 # nu
system.cpu.num_mem_refs 76733958 # number of memory refs
system.cpu.num_load_insts 57735091 # Number of load instructions
system.cpu.num_store_insts 18998867 # Number of store instructions
-system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 193445891 # Number of busy cycles
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
+system.cpu.num_busy_cycles 193445890.998000 # Number of busy cycles
+system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
system.cpu.Branches 15132745 # Number of branches fetched
system.cpu.op_class::No_OpClass 13329871 6.89% 6.89% # Class of executed instruction
system.cpu.op_class::IntAlu 102506896 52.99% 59.88% # Class of executed instruction
diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
index a6897afb3..66a194e38 100644
--- a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
@@ -72,10 +72,10 @@ system.cpu.num_fp_register_writes 2974850 # nu
system.cpu.num_mem_refs 76733958 # number of memory refs
system.cpu.num_load_insts 57735091 # Number of load instructions
system.cpu.num_store_insts 18998867 # Number of store instructions
-system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 541126164 # Number of busy cycles
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
+system.cpu.num_busy_cycles 541126163.998000 # Number of busy cycles
+system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
system.cpu.Branches 15132745 # Number of branches fetched
system.cpu.op_class::No_OpClass 13329871 6.89% 6.89% # Class of executed instruction
system.cpu.op_class::IntAlu 102506896 52.99% 59.88% # Class of executed instruction
diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt
index 55e2f8708..c2d74a54c 100644
--- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt
@@ -292,7 +292,7 @@ system.cpu.fetch.Insts 249058784 # Nu
system.cpu.fetch.Branches 22382097 # Number of branches that fetch encountered
system.cpu.fetch.predictedBranches 14763235 # Number of branches that fetch has predicted taken
system.cpu.fetch.Cycles 267434691 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu.fetch.SquashCycles 3695048 # Number of cycles fetch has spent squashing
+system.cpu.fetch.SquashCycles 3695049 # Number of cycles fetch has spent squashing
system.cpu.fetch.TlbCycles 15 # Number of cycles fetch has spent waiting for tlb
system.cpu.fetch.MiscStallCycles 4561 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
system.cpu.fetch.PendingTrapStallCycles 42381 # Number of stall cycles due to pending traps
@@ -499,11 +499,11 @@ system.cpu.iew.wb_penalized_rate 0 # fr
system.cpu.commit.commitSquashedInsts 119784082 # The number of squashed insts skipped by commit
system.cpu.commit.commitNonSpecStalls 1245 # The number of times commit has been forced to stall to communicate backwards
system.cpu.commit.branchMispredicts 1557714 # The number of times a branch was mispredicted
-system.cpu.commit.committed_per_cycle::samples 280934179 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::samples 280934178 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::mean 0.787955 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::stdev 1.593006 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::0 181002456 64.43% 64.43% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::0 181002455 64.43% 64.43% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::1 57799506 20.57% 85.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::2 14236358 5.07% 90.07% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::3 11930779 4.25% 94.32% # Number of insts commited each cycle
@@ -515,7 +515,7 @@ system.cpu.commit.committed_per_cycle::8 6891030 2.45% 100.00% # Nu
system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::total 280934179 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::total 280934178 # Number of insts commited each cycle
system.cpu.commit.committedInsts 132071192 # Number of instructions committed
system.cpu.commit.committedOps 221363384 # Number of ops (including micro ops) committed
system.cpu.commit.swp_count 0 # Number of s/w prefetches committed
@@ -563,8 +563,8 @@ system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% #
system.cpu.commit.op_class_0::total 221363384 # Class of committed instruction
system.cpu.commit.bw_lim_events 6891030 # number cycles where commit BW limit reached
system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits
-system.cpu.rob.rob_reads 615190615 # The number of ROB reads
-system.cpu.rob.rob_writes 698614568 # The number of ROB writes
+system.cpu.rob.rob_reads 615190614 # The number of ROB reads
+system.cpu.rob.rob_writes 698614569 # The number of ROB writes
system.cpu.timesIdled 3122 # Number of times that the entire CPU went into an idle state and unscheduled itself
system.cpu.idleCycles 178726 # Total number of cycles that the CPU has spent unscheduled due to idling
system.cpu.committedInsts 132071192 # Number of Instructions Simulated
@@ -573,7 +573,7 @@ system.cpu.cpi 2.251725 # CP
system.cpu.cpi_total 2.251725 # CPI: Total CPI of All Threads
system.cpu.ipc 0.444104 # IPC: Instructions Per Cycle
system.cpu.ipc_total 0.444104 # IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 456361988 # number of integer regfile reads
+system.cpu.int_regfile_reads 456362005 # number of integer regfile reads
system.cpu.int_regfile_writes 239113538 # number of integer regfile writes
system.cpu.fp_regfile_reads 3275482 # number of floating regfile reads
system.cpu.fp_regfile_writes 2058196 # number of floating regfile writes
diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
index 7d0cfab72..7b91ddd8b 100644
--- a/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
@@ -85,10 +85,10 @@ system.cpu.num_cc_register_writes 56242058 # nu
system.cpu.num_mem_refs 77165304 # number of memory refs
system.cpu.num_load_insts 56649587 # Number of load instructions
system.cpu.num_store_insts 20515717 # Number of store instructions
-system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 262786559 # Number of busy cycles
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
+system.cpu.num_busy_cycles 262786558.998000 # Number of busy cycles
+system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
system.cpu.Branches 12326938 # Number of branches fetched
system.cpu.op_class::No_OpClass 1176721 0.53% 0.53% # Class of executed instruction
system.cpu.op_class::IntAlu 134111833 60.58% 61.12% # Class of executed instruction
diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
index 79eb88ee5..d20d50993 100644
--- a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
@@ -77,10 +77,10 @@ system.cpu.num_cc_register_writes 56242058 # nu
system.cpu.num_mem_refs 77165304 # number of memory refs
system.cpu.num_load_insts 56649587 # Number of load instructions
system.cpu.num_store_insts 20515717 # Number of store instructions
-system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 501907914 # Number of busy cycles
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
+system.cpu.num_busy_cycles 501907913.998000 # Number of busy cycles
+system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
system.cpu.Branches 12326938 # Number of branches fetched
system.cpu.op_class::No_OpClass 1176721 0.53% 0.53% # Class of executed instruction
system.cpu.op_class::IntAlu 134111833 60.58% 61.12% # Class of executed instruction
@@ -119,9 +119,9 @@ system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Cl
system.cpu.op_class::total 221363385 # Class of executed instruction
system.cpu.icache.tags.replacements 2836 # number of replacements
system.cpu.icache.tags.tagsinuse 1455.296642 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 173489674 # Total number of references to valid blocks.
+system.cpu.icache.tags.total_refs 173489673 # Total number of references to valid blocks.
system.cpu.icache.tags.sampled_refs 4694 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 36959.879421 # Average number of references to valid blocks.
+system.cpu.icache.tags.avg_refs 36959.879207 # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.icache.tags.occ_blocks::cpu.inst 1455.296642 # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst 0.710594 # Average percentage of cache occupancy
@@ -133,14 +133,14 @@ system.cpu.icache.tags.age_task_id_blocks_1024::2 498
system.cpu.icache.tags.age_task_id_blocks_1024::3 394 # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::4 869 # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024 0.907227 # Percentage of cache occupancy per task id
-system.cpu.icache.tags.tag_accesses 346993430 # Number of tag accesses
-system.cpu.icache.tags.data_accesses 346993430 # Number of data accesses
-system.cpu.icache.ReadReq_hits::cpu.inst 173489674 # number of ReadReq hits
-system.cpu.icache.ReadReq_hits::total 173489674 # number of ReadReq hits
-system.cpu.icache.demand_hits::cpu.inst 173489674 # number of demand (read+write) hits
-system.cpu.icache.demand_hits::total 173489674 # number of demand (read+write) hits
-system.cpu.icache.overall_hits::cpu.inst 173489674 # number of overall hits
-system.cpu.icache.overall_hits::total 173489674 # number of overall hits
+system.cpu.icache.tags.tag_accesses 346993428 # Number of tag accesses
+system.cpu.icache.tags.data_accesses 346993428 # Number of data accesses
+system.cpu.icache.ReadReq_hits::cpu.inst 173489673 # number of ReadReq hits
+system.cpu.icache.ReadReq_hits::total 173489673 # number of ReadReq hits
+system.cpu.icache.demand_hits::cpu.inst 173489673 # number of demand (read+write) hits
+system.cpu.icache.demand_hits::total 173489673 # number of demand (read+write) hits
+system.cpu.icache.overall_hits::cpu.inst 173489673 # number of overall hits
+system.cpu.icache.overall_hits::total 173489673 # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst 4694 # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total 4694 # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst 4694 # number of demand (read+write) misses
@@ -153,12 +153,12 @@ system.cpu.icache.demand_miss_latency::cpu.inst 180319000
system.cpu.icache.demand_miss_latency::total 180319000 # number of demand (read+write) miss cycles
system.cpu.icache.overall_miss_latency::cpu.inst 180319000 # number of overall miss cycles
system.cpu.icache.overall_miss_latency::total 180319000 # number of overall miss cycles
-system.cpu.icache.ReadReq_accesses::cpu.inst 173494368 # number of ReadReq accesses(hits+misses)
-system.cpu.icache.ReadReq_accesses::total 173494368 # number of ReadReq accesses(hits+misses)
-system.cpu.icache.demand_accesses::cpu.inst 173494368 # number of demand (read+write) accesses
-system.cpu.icache.demand_accesses::total 173494368 # number of demand (read+write) accesses
-system.cpu.icache.overall_accesses::cpu.inst 173494368 # number of overall (read+write) accesses
-system.cpu.icache.overall_accesses::total 173494368 # number of overall (read+write) accesses
+system.cpu.icache.ReadReq_accesses::cpu.inst 173494367 # number of ReadReq accesses(hits+misses)
+system.cpu.icache.ReadReq_accesses::total 173494367 # number of ReadReq accesses(hits+misses)
+system.cpu.icache.demand_accesses::cpu.inst 173494367 # number of demand (read+write) accesses
+system.cpu.icache.demand_accesses::total 173494367 # number of demand (read+write) accesses
+system.cpu.icache.overall_accesses::cpu.inst 173494367 # number of overall (read+write) accesses
+system.cpu.icache.overall_accesses::total 173494367 # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.000027 # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total 0.000027 # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst 0.000027 # miss rate for demand accesses