diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
| commit | b63631536d974f31cf99ee280271dc0f7b4c746f (patch) | |
| tree | ff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/70.twolf | |
| parent | 646c4a23ca44aab5468c896034288151c89be782 (diff) | |
| download | gem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz | |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.
The main reason for bundling them up is to minimise the changeset
size.
Diffstat (limited to 'tests/long/se/70.twolf')
8 files changed, 347 insertions, 347 deletions
diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt index 9ab9303b1..5350fe782 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.041672 # Nu sim_ticks 41671895000 # Number of ticks simulated final_tick 41671895000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 84546 # Simulator instruction rate (inst/s) -host_op_rate 84546 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 38336000 # Simulator tick rate (ticks/s) -host_mem_usage 228812 # Number of bytes of host memory used -host_seconds 1087.02 # Real time elapsed on the host +host_inst_rate 101828 # Simulator instruction rate (inst/s) +host_op_rate 101828 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 46172411 # Simulator tick rate (ticks/s) +host_mem_usage 228672 # Number of bytes of host memory used +host_seconds 902.53 # Real time elapsed on the host sim_insts 91903056 # Number of instructions simulated sim_ops 91903056 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 178816 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 4291046 # In system.physmem.bw_total::cpu.inst 4291046 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 3292771 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 7583816 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 4938 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 4938 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 4938 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 4938 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 316032 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 316032 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 443 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 270 # Track reads on a per bank basis @@ -239,10 +240,10 @@ system.membus.trans_dist::ReadReq 3216 # Tr system.membus.trans_dist::ReadResp 3216 # Transaction distribution system.membus.trans_dist::ReadExReq 1722 # Transaction distribution system.membus.trans_dist::ReadExResp 1722 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 9876 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 9876 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 316032 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 316032 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 9876 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 9876 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 316032 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 316032 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 316032 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 5784500 # Layer occupancy (ticks) @@ -351,15 +352,15 @@ system.cpu.stage3.utilization 21.629101 # Pe system.cpu.stage4.idleCycles 29484037 # Number of cycles 0 instructions are processed. system.cpu.stage4.runCycles 53859754 # Number of cycles 1+ instructions are processed. system.cpu.stage4.utilization 64.623595 # Percentage of cycles stage was utilized (processing insts). -system.cpu.icache.tags.replacements 7635 # number of replacements -system.cpu.icache.tags.tagsinuse 1492.268238 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 9945551 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 9520 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 1044.700735 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1492.268238 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.728647 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.728647 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 7635 # number of replacements +system.cpu.icache.tags.tagsinuse 1492.268238 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 9945551 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 9520 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 1044.700735 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1492.268238 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.728647 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.728647 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 9945551 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 9945551 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 9945551 # number of demand (read+write) hits @@ -441,12 +442,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 9995 # Tr system.cpu.toL2Bus.trans_dist::Writeback 107 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1748 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1748 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 19040 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 4553 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 23593 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 609280 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 149120 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 758400 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 19040 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 4553 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 23593 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 609280 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 149120 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 758400 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 758400 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 6032000 # Layer occupancy (ticks) @@ -455,19 +456,19 @@ system.cpu.toL2Bus.respLayer0.occupancy 14868500 # La system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 3600000 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 2189.714615 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 6793 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 3282 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 2.069775 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 2189.714615 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 6793 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 3282 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 2.069775 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 17.843770 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 1820.865070 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 351.005775 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 1820.865070 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 351.005775 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000545 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.055568 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.010712 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.066825 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.066825 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 6726 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 53 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 6779 # number of ReadReq hits @@ -591,15 +592,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 52663.027917 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 55345.382463 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 53827.663021 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 157 # number of replacements -system.cpu.dcache.tags.tagsinuse 1441.455272 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 26488508 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 2223 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 11915.658120 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1441.455272 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.351918 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.351918 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 157 # number of replacements +system.cpu.dcache.tags.tagsinuse 1441.455272 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 26488508 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 2223 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 11915.658120 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1441.455272 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.351918 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.351918 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 19995622 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 19995622 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 6492886 # number of WriteReq hits diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt index b5b638e61..b7d057d9f 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.023492 # Nu sim_ticks 23492267500 # Number of ticks simulated final_tick 23492267500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 122951 # Simulator instruction rate (inst/s) -host_op_rate 122951 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 34312389 # Simulator tick rate (ticks/s) -host_mem_usage 231868 # Number of bytes of host memory used -host_seconds 684.66 # Real time elapsed on the host +host_inst_rate 120531 # Simulator instruction rate (inst/s) +host_op_rate 120531 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 33636905 # Simulator tick rate (ticks/s) +host_mem_usage 231740 # Number of bytes of host memory used +host_seconds 698.41 # Real time elapsed on the host sim_insts 84179709 # Number of instructions simulated sim_ops 84179709 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 195904 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 8339084 # In system.physmem.bw_total::cpu.inst 8339084 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 5898111 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 14237195 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 5226 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 5226 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 5226 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 5226 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 334464 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 334464 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 469 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 291 # Track reads on a per bank basis @@ -239,10 +240,10 @@ system.membus.trans_dist::ReadReq 3520 # Tr system.membus.trans_dist::ReadResp 3520 # Transaction distribution system.membus.trans_dist::ReadExReq 1706 # Transaction distribution system.membus.trans_dist::ReadExResp 1706 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 10452 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 10452 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 334464 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 334464 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 10452 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 10452 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 334464 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 334464 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 334464 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 6824500 # Layer occupancy (ticks) @@ -557,12 +558,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 12006 # Tr system.cpu.toL2Bus.trans_dist::Writeback 108 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1731 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1731 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 22984 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 4598 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 27582 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 735488 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 150592 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 886080 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 22984 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 4598 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 27582 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 735488 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 150592 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 886080 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 886080 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 7030500 # Layer occupancy (ticks) @@ -571,15 +572,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 17871250 # La system.cpu.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 3590750 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) -system.cpu.icache.tags.replacements 9559 # number of replacements -system.cpu.icache.tags.tagsinuse 1595.799290 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 14741729 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 11492 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 1282.781848 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1595.799290 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.779199 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.779199 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 9559 # number of replacements +system.cpu.icache.tags.tagsinuse 1595.799290 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 14741729 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 11492 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 1282.781848 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1595.799290 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.779199 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.779199 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 14741729 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 14741729 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 14741729 # number of demand (read+write) hits @@ -655,19 +656,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 25714.605813 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 25714.605813 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 25714.605813 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 2404.485668 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 8502 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 3587 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 2.370226 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 2404.485668 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 8502 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 3587 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 2.370226 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 17.679636 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 2007.666457 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 379.139575 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 2007.666457 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 379.139575 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000540 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.061269 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.011570 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.073379 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.073379 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 8431 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 55 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 8486 # number of ReadReq hits @@ -791,15 +792,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 52525.726887 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 56117.436490 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 54013.681592 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 158 # number of replacements -system.cpu.dcache.tags.tagsinuse 1457.925933 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 28096273 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 2245 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 12515.043653 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1457.925933 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.355939 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.355939 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 158 # number of replacements +system.cpu.dcache.tags.tagsinuse 1457.925933 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 28096273 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 2245 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 12515.043653 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1457.925933 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.355939 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.355939 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 21603146 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 21603146 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 6492891 # number of WriteReq hits diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt index 847011ac3..be0605d18 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.118729 # Nu sim_ticks 118729316000 # Number of ticks simulated final_tick 118729316000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 852211 # Simulator instruction rate (inst/s) -host_op_rate 852211 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1100968725 # Simulator tick rate (ticks/s) +host_inst_rate 2022504 # Simulator instruction rate (inst/s) +host_op_rate 2022504 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2612866318 # Simulator tick rate (ticks/s) host_mem_usage 228676 # Number of bytes of host memory used -host_seconds 107.84 # Real time elapsed on the host +host_seconds 45.44 # Real time elapsed on the host sim_insts 91903056 # Number of instructions simulated sim_ops 91903056 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 167744 # Number of bytes read from this memory @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 3043 # Tr system.membus.trans_dist::ReadResp 3043 # Transaction distribution system.membus.trans_dist::ReadExReq 1722 # Transaction distribution system.membus.trans_dist::ReadExResp 1722 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 9530 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 9530 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 304960 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 304960 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 9530 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 9530 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 304960 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 304960 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 304960 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 4765000 # Layer occupancy (ticks) @@ -97,15 +97,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 237458632 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 6681 # number of replacements -system.cpu.icache.tags.tagsinuse 1418.052773 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 91894580 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 8510 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 10798.423032 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1418.052773 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.692409 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.692409 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 6681 # number of replacements +system.cpu.icache.tags.tagsinuse 1418.052773 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 91894580 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 8510 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 10798.423032 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1418.052773 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.692409 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.692409 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 91894580 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 91894580 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 91894580 # number of demand (read+write) hits @@ -175,19 +175,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 23935.605170 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 23935.605170 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 23935.605170 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 2074.070560 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 5956 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 3109 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 1.915729 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 2074.070560 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 5956 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 3109 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 1.915729 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 17.795178 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 1705.018003 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 351.257379 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 1705.018003 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 351.257379 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000543 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.052033 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.010720 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.063296 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.063296 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 5889 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 53 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 5942 # number of ReadReq hits @@ -311,15 +311,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 157 # number of replacements -system.cpu.dcache.tags.tagsinuse 1442.043392 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 26495078 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 2223 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 11918.613585 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1442.043392 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.352061 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.352061 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 157 # number of replacements +system.cpu.dcache.tags.tagsinuse 1442.043392 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 26495078 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 2223 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 11918.613585 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1442.043392 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.352061 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.352061 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 19995723 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 19995723 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 6499355 # number of WriteReq hits @@ -417,12 +417,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 8985 # Tr system.cpu.toL2Bus.trans_dist::Writeback 107 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1748 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1748 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 17020 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 4553 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 21573 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 544640 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 149120 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 693760 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 17020 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 4553 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 21573 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 544640 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 149120 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 693760 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 693760 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 5527000 # Layer occupancy (ticks) diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt index 191849c1b..cd02e0594 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.074201 # Nu sim_ticks 74201024500 # Number of ticks simulated final_tick 74201024500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 81530 # Simulator instruction rate (inst/s) -host_op_rate 89268 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 35110326 # Simulator tick rate (ticks/s) -host_mem_usage 249620 # Number of bytes of host memory used -host_seconds 2113.37 # Real time elapsed on the host +host_inst_rate 88798 # Simulator instruction rate (inst/s) +host_op_rate 97225 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 38240010 # Simulator tick rate (ticks/s) +host_mem_usage 245976 # Number of bytes of host memory used +host_seconds 1940.40 # Real time elapsed on the host sim_insts 172303021 # Number of instructions simulated sim_ops 188656503 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 131328 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 1769895 # In system.physmem.bw_total::cpu.inst 1769895 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 1507688 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 3277583 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 3801 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 3803 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 3801 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 3801 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 243200 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 243200 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 2 # Reqs where no action is needed system.physmem.perBankRdReqs::0 308 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 215 # Track reads on a per bank basis @@ -238,10 +239,10 @@ system.membus.trans_dist::UpgradeReq 2 # Tr system.membus.trans_dist::UpgradeResp 2 # Transaction distribution system.membus.trans_dist::ReadExReq 1075 # Transaction distribution system.membus.trans_dist::ReadExResp 1075 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 7605 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 7605 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 243200 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 243200 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 7605 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 7605 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 243200 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 243200 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 243200 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 4684500 # Layer occupancy (ticks) @@ -571,12 +572,12 @@ system.cpu.toL2Bus.trans_dist::UpgradeReq 2 # T system.cpu.toL2Bus.trans_dist::UpgradeResp 2 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1083 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1083 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 8247 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3732 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 11979 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 263808 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 119872 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 383680 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 8247 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3732 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 11979 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 263808 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 119872 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 383680 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 383680 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 128 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 3018000 # Layer occupancy (ticks) @@ -585,15 +586,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 6609745 # La system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 3106490 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) -system.cpu.icache.tags.replacements 2391 # number of replacements -system.cpu.icache.tags.tagsinuse 1346.456608 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 36834377 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 4122 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 8936.044881 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1346.456608 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.657450 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.657450 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 2391 # number of replacements +system.cpu.icache.tags.tagsinuse 1346.456608 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 36834377 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 4122 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 8936.044881 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1346.456608 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.657450 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.657450 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 36834377 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 36834377 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 36834377 # number of demand (read+write) hits @@ -669,19 +670,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 39366.607030 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 39366.607030 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 39366.607030 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 1961.044100 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 2153 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 2735 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.787203 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 1961.044100 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 2153 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 2735 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.787203 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 4.994051 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 1423.034105 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 533.015945 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 1423.034105 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 533.015945 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000152 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.043428 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.016266 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.059846 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.059846 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 2065 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 87 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 2152 # number of ReadReq hits @@ -828,15 +829,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54266.682903 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 53045.480549 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 53705.077611 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 57 # number of replacements -system.cpu.dcache.tags.tagsinuse 1404.261851 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 46798452 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1855 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 25228.276011 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1404.261851 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.342837 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.342837 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 57 # number of replacements +system.cpu.dcache.tags.tagsinuse 1404.261851 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 46798452 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1855 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 25228.276011 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1404.261851 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.342837 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.342837 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 34397014 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 34397014 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 12356557 # number of WriteReq hits diff --git a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt index 371d1c275..3a3e9e512 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.232072 # Nu sim_ticks 232072304000 # Number of ticks simulated final_tick 232072304000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1198657 # Simulator instruction rate (inst/s) -host_op_rate 1312657 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1618778979 # Simulator tick rate (ticks/s) -host_mem_usage 245268 # Number of bytes of host memory used -host_seconds 143.36 # Real time elapsed on the host +host_inst_rate 705973 # Simulator instruction rate (inst/s) +host_op_rate 773116 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 953412259 # Simulator tick rate (ticks/s) +host_mem_usage 242928 # Number of bytes of host memory used +host_seconds 243.41 # Real time elapsed on the host sim_insts 171842483 # Number of instructions simulated sim_ops 188185920 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 110656 # Number of bytes read from this memory @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 2361 # Tr system.membus.trans_dist::ReadResp 2361 # Transaction distribution system.membus.trans_dist::ReadExReq 1092 # Transaction distribution system.membus.trans_dist::ReadExResp 1092 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 6906 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 6906 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 220992 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 220992 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 6906 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 6906 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 220992 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 220992 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 220992 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 3453000 # Layer occupancy (ticks) @@ -107,15 +107,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 464144608 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 1506 # number of replacements -system.cpu.icache.tags.tagsinuse 1147.986161 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 189857001 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 3051 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 62227.794494 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1147.986161 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.560540 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.560540 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 1506 # number of replacements +system.cpu.icache.tags.tagsinuse 1147.986161 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 189857001 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 3051 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 62227.794494 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1147.986161 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.560540 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.560540 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 189857001 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 189857001 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 189857001 # number of demand (read+write) hits @@ -185,19 +185,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 34801.376598 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 34801.376598 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 34801.376598 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 1675.655740 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1380 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 2369 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.582524 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 1675.655740 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1380 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 2369 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.582524 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 3.038044 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 1169.032828 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 503.584868 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 1169.032828 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 503.584868 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000093 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.035676 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.015368 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.051137 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.051137 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1322 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 57 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1379 # number of ReadReq hits @@ -321,15 +321,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 40 # number of replacements -system.cpu.dcache.tags.tagsinuse 1363.611259 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 42007358 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1789 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 23480.915595 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1363.611259 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.332913 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.332913 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 40 # number of replacements +system.cpu.dcache.tags.tagsinuse 1363.611259 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 42007358 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1789 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 23480.915595 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1363.611259 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.332913 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.332913 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 29599357 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 29599357 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 12363187 # number of WriteReq hits @@ -435,12 +435,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 3740 # Tr system.cpu.toL2Bus.trans_dist::Writeback 16 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1100 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1100 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 6102 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3594 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 9696 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 195264 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 115520 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 310784 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 6102 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3594 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 9696 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 195264 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 115520 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 310784 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 310784 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 2444000 # Layer occupancy (ticks) diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt index 6ce379f53..471075dde 100644 --- a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.270563 # Nu sim_ticks 270563082000 # Number of ticks simulated final_tick 270563082000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 942019 # Simulator instruction rate (inst/s) -host_op_rate 942020 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1317563963 # Simulator tick rate (ticks/s) -host_mem_usage 238020 # Number of bytes of host memory used -host_seconds 205.35 # Real time elapsed on the host +host_inst_rate 872463 # Simulator instruction rate (inst/s) +host_op_rate 872464 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1220278409 # Simulator tick rate (ticks/s) +host_mem_usage 236504 # Number of bytes of host memory used +host_seconds 221.72 # Real time elapsed on the host sim_insts 193444518 # Number of instructions simulated sim_ops 193444756 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 230208 # Number of bytes read from this memory @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 4095 # Tr system.membus.trans_dist::ReadResp 4095 # Transaction distribution system.membus.trans_dist::ReadExReq 1078 # Transaction distribution system.membus.trans_dist::ReadExResp 1078 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 10346 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 10346 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 331072 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 331072 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 10346 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 10346 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 331072 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 331072 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 331072 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 5173000 # Layer occupancy (ticks) @@ -65,15 +65,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 541126164 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 10362 # number of replacements -system.cpu.icache.tags.tagsinuse 1591.579171 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 193433248 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 12288 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 15741.638021 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1591.579171 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.777138 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.777138 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 10362 # number of replacements +system.cpu.icache.tags.tagsinuse 1591.579171 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 193433248 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 12288 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 15741.638021 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1591.579171 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.777138 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.777138 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 193433248 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 193433248 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 193433248 # number of demand (read+write) hits @@ -143,19 +143,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 23294.433594 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 23294.433594 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 23294.433594 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 2678.340865 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 8691 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 4097 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 2.121308 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 2678.340865 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 8691 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 4097 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 2.121308 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 0.000453 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 2275.282924 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 403.057488 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 2275.282924 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 403.057488 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000000 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.069436 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.012300 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.081736 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.081736 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 8691 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 8691 # number of ReadReq hits system.cpu.l2cache.Writeback_hits::writebacks 2 # number of Writeback hits @@ -274,15 +274,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 2 # number of replacements -system.cpu.dcache.tags.tagsinuse 1237.203941 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 76732337 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1576 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 48688.031091 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1237.203941 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.302052 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.302052 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 2 # number of replacements +system.cpu.dcache.tags.tagsinuse 1237.203941 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 76732337 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1576 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 48688.031091 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1237.203941 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.302052 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.302052 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 57734570 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 57734570 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 18975362 # number of WriteReq hits @@ -400,12 +400,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 12786 # Tr system.cpu.toL2Bus.trans_dist::Writeback 2 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1078 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1078 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 24576 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3154 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 27730 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 786432 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 100992 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 887424 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 24576 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3154 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 27730 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 786432 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 100992 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 887424 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 887424 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 6935000 # Layer occupancy (ticks) diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt index 2e8d78059..53040adf9 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.144471 # Nu sim_ticks 144470654000 # Number of ticks simulated final_tick 144470654000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 76550 # Simulator instruction rate (inst/s) -host_op_rate 128304 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 83736451 # Simulator tick rate (ticks/s) -host_mem_usage 279024 # Number of bytes of host memory used -host_seconds 1725.30 # Real time elapsed on the host +host_inst_rate 75912 # Simulator instruction rate (inst/s) +host_op_rate 127236 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 83039301 # Simulator tick rate (ticks/s) +host_mem_usage 277792 # Number of bytes of host memory used +host_seconds 1739.79 # Real time elapsed on the host sim_insts 132071192 # Number of instructions simulated sim_ops 221362962 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 216768 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 1500429 # In system.physmem.bw_total::cpu.inst 1500429 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 865172 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 2365602 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 5340 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 5492 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 5340 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 5340 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 341760 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 341760 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 152 # Reqs where no action is needed system.physmem.perBankRdReqs::0 286 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 358 # Track reads on a per bank basis @@ -242,11 +243,9 @@ system.membus.trans_dist::ReadExReq 1530 # Tr system.membus.trans_dist::ReadExResp 1530 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 10983 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::total 10983 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::system.physmem.port 10983 # Packet count per connected master and slave (bytes) system.membus.pkt_count::total 10983 # Packet count per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 341696 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 341696 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size::system.physmem.port 341696 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size::total 341696 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 341696 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) @@ -531,12 +530,12 @@ system.cpu.toL2Bus.trans_dist::UpgradeReq 153 # T system.cpu.toL2Bus.trans_dist::UpgradeResp 153 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1537 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1537 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 13393 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 4315 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 17708 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 423616 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 128704 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 552320 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 13393 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 4315 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 17708 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 423616 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 128704 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 552320 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 552320 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 9856 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 4483500 # Layer occupancy (ticks) @@ -545,15 +544,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 10832250 # La system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 3515652 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) -system.cpu.icache.tags.replacements 4654 # number of replacements -system.cpu.icache.tags.tagsinuse 1616.215170 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 22351029 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 6622 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 3375.268650 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1616.215170 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.789168 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.789168 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 4654 # number of replacements +system.cpu.icache.tags.tagsinuse 1616.215170 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 22351029 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 6622 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 3375.268650 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1616.215170 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.789168 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.789168 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 22351029 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 22351029 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 22351029 # number of demand (read+write) hits @@ -629,19 +628,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 38650.612637 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 38650.612637 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 38650.612637 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 2537.222896 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 3276 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 3813 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.859166 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 2537.222896 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 3276 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 3813 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.859166 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 1.748933 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 2223.089774 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 312.384188 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 2223.089774 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 312.384188 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000053 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.067843 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.009533 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.077430 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.077430 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 3232 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 38 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 3270 # number of ReadReq hits @@ -781,15 +780,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 53112.234357 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 52681.515617 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 52954.736941 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 56 # number of replacements -system.cpu.dcache.tags.tagsinuse 1433.333580 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 66124025 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1997 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 33111.680020 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1433.333580 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.349935 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.349935 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 56 # number of replacements +system.cpu.dcache.tags.tagsinuse 1433.333580 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 66124025 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1997 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 33111.680020 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1433.333580 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.349935 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.349935 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 45609763 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 45609763 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 20514039 # number of WriteReq hits diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt index 8e5c309b6..2ebeaa506 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.250954 # Nu sim_ticks 250953957000 # Number of ticks simulated final_tick 250953957000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 679792 # Simulator instruction rate (inst/s) -host_op_rate 1139391 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1291700674 # Simulator tick rate (ticks/s) -host_mem_usage 272716 # Number of bytes of host memory used -host_seconds 194.28 # Real time elapsed on the host +host_inst_rate 352771 # Simulator instruction rate (inst/s) +host_op_rate 591275 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 670313887 # Simulator tick rate (ticks/s) +host_mem_usage 270496 # Number of bytes of host memory used +host_seconds 374.38 # Real time elapsed on the host sim_insts 132071193 # Number of instructions simulated sim_ops 221362963 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 181760 # Number of bytes read from this memory @@ -34,11 +34,9 @@ system.membus.trans_dist::ReadExReq 1575 # Tr system.membus.trans_dist::ReadExResp 1575 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 9470 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::total 9470 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::system.physmem.port 9470 # Packet count per connected master and slave (bytes) system.membus.pkt_count::total 9470 # Packet count per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 303040 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 303040 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size::system.physmem.port 303040 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size::total 303040 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 303040 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) @@ -69,15 +67,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 501907914 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 2836 # number of replacements -system.cpu.icache.tags.tagsinuse 1455.296642 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 173489674 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 4694 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 36959.879421 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1455.296642 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.710594 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.710594 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 2836 # number of replacements +system.cpu.icache.tags.tagsinuse 1455.296642 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 173489674 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 4694 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 36959.879421 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1455.296642 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.710594 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.710594 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 173489674 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 173489674 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 173489674 # number of demand (read+write) hits @@ -147,19 +145,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 36414.784832 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 36414.784832 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 36414.784832 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 2058.178686 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1862 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 3164 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.588496 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 2058.178686 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1862 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 3164 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.588496 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 0.021744 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 1829.978580 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 228.178362 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 1829.978580 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 228.178362 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.000001 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.055847 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.006963 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.062811 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.062811 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1854 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 7 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1861 # number of ReadReq hits @@ -283,15 +281,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 41 # number of replacements -system.cpu.dcache.tags.tagsinuse 1363.457571 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 77195831 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1905 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 40522.745932 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 1363.457571 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.332875 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.332875 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 41 # number of replacements +system.cpu.dcache.tags.tagsinuse 1363.457571 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 77195831 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1905 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 40522.745932 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 1363.457571 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.332875 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.332875 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 56681678 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 56681678 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 20514153 # number of WriteReq hits @@ -389,12 +387,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 5021 # Tr system.cpu.toL2Bus.trans_dist::Writeback 7 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1578 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1578 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 9388 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3817 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 13205 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 300416 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 122368 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 422784 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 9388 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3817 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 13205 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 300416 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 122368 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 422784 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 422784 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 3310000 # Layer occupancy (ticks) |