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authorNilay Vaish <nilay@cs.wisc.edu>2015-04-14 11:01:11 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-04-14 11:01:11 -0500
commit172385ae9fc49cdf18470b0205abe1a2089c51b9 (patch)
tree15a3830420b9c91cbe8040b04706f2dd7f403888 /tests/long/se
parent826f69b47073f23ced9b6a2f5eac51e3ae9bc953 (diff)
downloadgem5-172385ae9fc49cdf18470b0205abe1a2089c51b9.tar.xz
stats: x86: changes due to recent patches
The change in 20.parser is from new x87 instructions. The change to pc-o3-timing is not clear to me. It seems that this test might be invoking some undefined behavior.
Diffstat (limited to 'tests/long/se')
-rw-r--r--tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt1538
1 files changed, 768 insertions, 770 deletions
diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt
index 83e6f9459..9b577089a 100644
--- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt
+++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt
@@ -1,108 +1,108 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 0.455304 # Number of seconds simulated
-sim_ticks 455304035500 # Number of ticks simulated
-final_tick 455304035500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.455715 # Number of seconds simulated
+sim_ticks 455715234500 # Number of ticks simulated
+final_tick 455715234500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 97470 # Simulator instruction rate (inst/s)
-host_op_rate 180233 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 53670129 # Simulator tick rate (ticks/s)
-host_mem_usage 427808 # Number of bytes of host memory used
-host_seconds 8483.38 # Real time elapsed on the host
+host_inst_rate 71545 # Simulator instruction rate (inst/s)
+host_op_rate 132294 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 39430208 # Simulator tick rate (ticks/s)
+host_mem_usage 421584 # Number of bytes of host memory used
+host_seconds 11557.52 # Real time elapsed on the host
sim_insts 826877109 # Number of instructions simulated
sim_ops 1528988701 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.bytes_read::cpu.inst 225344 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 24524608 # Number of bytes read from this memory
-system.physmem.bytes_read::total 24749952 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 225344 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 225344 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 18812544 # Number of bytes written to this memory
-system.physmem.bytes_written::total 18812544 # Number of bytes written to this memory
-system.physmem.num_reads::cpu.inst 3521 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 383197 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 386718 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 293946 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 293946 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst 494931 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 53864245 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 54359176 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 494931 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 494931 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 41318641 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 41318641 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 41318641 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 494931 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 53864245 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 95677817 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 386718 # Number of read requests accepted
-system.physmem.writeReqs 293946 # Number of write requests accepted
-system.physmem.readBursts 386718 # Number of DRAM read bursts, including those serviced by the write queue
-system.physmem.writeBursts 293946 # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM 24728064 # Total number of bytes read from DRAM
-system.physmem.bytesReadWrQ 21888 # Total number of bytes read from write queue
-system.physmem.bytesWritten 18810880 # Total number of bytes written to DRAM
-system.physmem.bytesReadSys 24749952 # Total read bytes from the system interface side
-system.physmem.bytesWrittenSys 18812544 # Total written bytes from the system interface side
-system.physmem.servicedByWrQ 342 # Number of DRAM read bursts serviced by the write queue
+system.physmem.bytes_read::cpu.inst 225856 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.data 24534720 # Number of bytes read from this memory
+system.physmem.bytes_read::total 24760576 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 225856 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 225856 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 18815424 # Number of bytes written to this memory
+system.physmem.bytes_written::total 18815424 # Number of bytes written to this memory
+system.physmem.num_reads::cpu.inst 3529 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.data 383355 # Number of read requests responded to by this memory
+system.physmem.num_reads::total 386884 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 293991 # Number of write requests responded to by this memory
+system.physmem.num_writes::total 293991 # Number of write requests responded to by this memory
+system.physmem.bw_read::cpu.inst 495608 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 53837831 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 54333439 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 495608 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 495608 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 41287678 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 41287678 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 41287678 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 495608 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 53837831 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 95621118 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 386885 # Number of read requests accepted
+system.physmem.writeReqs 293991 # Number of write requests accepted
+system.physmem.readBursts 386885 # Number of DRAM read bursts, including those serviced by the write queue
+system.physmem.writeBursts 293991 # Number of DRAM write bursts, including those merged in the write queue
+system.physmem.bytesReadDRAM 24739328 # Total number of bytes read from DRAM
+system.physmem.bytesReadWrQ 21248 # Total number of bytes read from write queue
+system.physmem.bytesWritten 18814144 # Total number of bytes written to DRAM
+system.physmem.bytesReadSys 24760640 # Total read bytes from the system interface side
+system.physmem.bytesWrittenSys 18815424 # Total written bytes from the system interface side
+system.physmem.servicedByWrQ 332 # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
-system.physmem.neitherReadNorWriteReqs 191861 # Number of requests that are neither read nor write
-system.physmem.perBankRdBursts::0 24073 # Per bank write bursts
-system.physmem.perBankRdBursts::1 26434 # Per bank write bursts
-system.physmem.perBankRdBursts::2 24630 # Per bank write bursts
-system.physmem.perBankRdBursts::3 24561 # Per bank write bursts
-system.physmem.perBankRdBursts::4 23290 # Per bank write bursts
-system.physmem.perBankRdBursts::5 23730 # Per bank write bursts
-system.physmem.perBankRdBursts::6 24498 # Per bank write bursts
-system.physmem.perBankRdBursts::7 24639 # Per bank write bursts
-system.physmem.perBankRdBursts::8 23691 # Per bank write bursts
-system.physmem.perBankRdBursts::9 23546 # Per bank write bursts
-system.physmem.perBankRdBursts::10 24793 # Per bank write bursts
-system.physmem.perBankRdBursts::11 24069 # Per bank write bursts
-system.physmem.perBankRdBursts::12 23353 # Per bank write bursts
-system.physmem.perBankRdBursts::13 23015 # Per bank write bursts
-system.physmem.perBankRdBursts::14 24077 # Per bank write bursts
-system.physmem.perBankRdBursts::15 23977 # Per bank write bursts
-system.physmem.perBankWrBursts::0 18554 # Per bank write bursts
-system.physmem.perBankWrBursts::1 19855 # Per bank write bursts
-system.physmem.perBankWrBursts::2 18927 # Per bank write bursts
-system.physmem.perBankWrBursts::3 18928 # Per bank write bursts
-system.physmem.perBankWrBursts::4 18036 # Per bank write bursts
-system.physmem.perBankWrBursts::5 18437 # Per bank write bursts
-system.physmem.perBankWrBursts::6 18989 # Per bank write bursts
-system.physmem.perBankWrBursts::7 19175 # Per bank write bursts
-system.physmem.perBankWrBursts::8 18571 # Per bank write bursts
-system.physmem.perBankWrBursts::9 17897 # Per bank write bursts
-system.physmem.perBankWrBursts::10 18838 # Per bank write bursts
-system.physmem.perBankWrBursts::11 17731 # Per bank write bursts
-system.physmem.perBankWrBursts::12 17375 # Per bank write bursts
-system.physmem.perBankWrBursts::13 16985 # Per bank write bursts
-system.physmem.perBankWrBursts::14 17811 # Per bank write bursts
-system.physmem.perBankWrBursts::15 17811 # Per bank write bursts
+system.physmem.neitherReadNorWriteReqs 191853 # Number of requests that are neither read nor write
+system.physmem.perBankRdBursts::0 24085 # Per bank write bursts
+system.physmem.perBankRdBursts::1 26442 # Per bank write bursts
+system.physmem.perBankRdBursts::2 24611 # Per bank write bursts
+system.physmem.perBankRdBursts::3 24606 # Per bank write bursts
+system.physmem.perBankRdBursts::4 23306 # Per bank write bursts
+system.physmem.perBankRdBursts::5 23756 # Per bank write bursts
+system.physmem.perBankRdBursts::6 24486 # Per bank write bursts
+system.physmem.perBankRdBursts::7 24652 # Per bank write bursts
+system.physmem.perBankRdBursts::8 23681 # Per bank write bursts
+system.physmem.perBankRdBursts::9 23594 # Per bank write bursts
+system.physmem.perBankRdBursts::10 24798 # Per bank write bursts
+system.physmem.perBankRdBursts::11 24077 # Per bank write bursts
+system.physmem.perBankRdBursts::12 23369 # Per bank write bursts
+system.physmem.perBankRdBursts::13 23004 # Per bank write bursts
+system.physmem.perBankRdBursts::14 24109 # Per bank write bursts
+system.physmem.perBankRdBursts::15 23976 # Per bank write bursts
+system.physmem.perBankWrBursts::0 18564 # Per bank write bursts
+system.physmem.perBankWrBursts::1 19853 # Per bank write bursts
+system.physmem.perBankWrBursts::2 18919 # Per bank write bursts
+system.physmem.perBankWrBursts::3 18930 # Per bank write bursts
+system.physmem.perBankWrBursts::4 18043 # Per bank write bursts
+system.physmem.perBankWrBursts::5 18450 # Per bank write bursts
+system.physmem.perBankWrBursts::6 18985 # Per bank write bursts
+system.physmem.perBankWrBursts::7 19190 # Per bank write bursts
+system.physmem.perBankWrBursts::8 18567 # Per bank write bursts
+system.physmem.perBankWrBursts::9 17917 # Per bank write bursts
+system.physmem.perBankWrBursts::10 18839 # Per bank write bursts
+system.physmem.perBankWrBursts::11 17726 # Per bank write bursts
+system.physmem.perBankWrBursts::12 17379 # Per bank write bursts
+system.physmem.perBankWrBursts::13 16983 # Per bank write bursts
+system.physmem.perBankWrBursts::14 17822 # Per bank write bursts
+system.physmem.perBankWrBursts::15 17804 # Per bank write bursts
system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
-system.physmem.totGap 455304010000 # Total gap between requests
+system.physmem.totGap 455715219000 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
system.physmem.readPktSize::3 0 # Read request sizes (log2)
system.physmem.readPktSize::4 0 # Read request sizes (log2)
system.physmem.readPktSize::5 0 # Read request sizes (log2)
-system.physmem.readPktSize::6 386718 # Read request sizes (log2)
+system.physmem.readPktSize::6 386885 # Read request sizes (log2)
system.physmem.writePktSize::0 0 # Write request sizes (log2)
system.physmem.writePktSize::1 0 # Write request sizes (log2)
system.physmem.writePktSize::2 0 # Write request sizes (log2)
system.physmem.writePktSize::3 0 # Write request sizes (log2)
system.physmem.writePktSize::4 0 # Write request sizes (log2)
system.physmem.writePktSize::5 0 # Write request sizes (log2)
-system.physmem.writePktSize::6 293946 # Write request sizes (log2)
-system.physmem.rdQLenPdf::0 381427 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::1 4550 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::2 351 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::3 37 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::4 10 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::5 1 # What read queue length does an incoming req see
+system.physmem.writePktSize::6 293991 # Write request sizes (log2)
+system.physmem.rdQLenPdf::0 381599 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::1 4552 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::2 347 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::3 43 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::4 9 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::5 3 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see
@@ -144,33 +144,33 @@ system.physmem.wrQLenPdf::11 1 # Wh
system.physmem.wrQLenPdf::12 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14 1 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::15 6166 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::16 6575 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::17 16890 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::18 17473 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::19 17565 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::20 17579 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::21 17584 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::22 17592 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::23 17612 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::24 17616 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::25 17654 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::26 17597 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::27 17680 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::28 17600 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::29 17664 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::30 17861 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::31 17545 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::32 17481 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::33 59 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::34 36 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::35 26 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::36 19 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::37 18 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::38 15 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::39 10 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::40 7 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::41 5 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::15 6246 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::16 6677 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::17 16930 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::18 17476 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::19 17572 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::20 17558 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::21 17557 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::22 17577 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::23 17595 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::24 17611 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::25 17644 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::26 17593 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::27 17697 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::28 17591 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::29 17646 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::30 17825 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::31 17535 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::32 17475 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::33 52 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::34 31 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::35 24 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::36 17 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::37 14 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::38 14 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::39 9 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::40 5 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::41 3 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::42 2 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::43 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::44 0 # What write queue length does an incoming req see
@@ -193,40 +193,39 @@ system.physmem.wrQLenPdf::60 0 # Wh
system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see
-system.physmem.bytesPerActivate::samples 147768 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::mean 294.634833 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::gmean 174.118109 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::stdev 321.876505 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::0-127 54825 37.10% 37.10% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::128-255 40414 27.35% 64.45% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::256-383 13687 9.26% 73.71% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::384-511 7337 4.97% 78.68% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::512-639 5611 3.80% 82.48% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::640-767 4054 2.74% 85.22% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::768-895 2966 2.01% 87.23% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::896-1023 2800 1.89% 89.12% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::1024-1151 16074 10.88% 100.00% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::total 147768 # Bytes accessed per row activation
-system.physmem.rdPerTurnAround::samples 17438 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::mean 22.156612 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::stdev 209.316874 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::0-1023 17424 99.92% 99.92% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::1024-2047 9 0.05% 99.97% # Reads before turning the bus around for writes
+system.physmem.bytesPerActivate::samples 147989 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::mean 294.299928 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::gmean 173.923079 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::stdev 321.799681 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::0-127 54958 37.14% 37.14% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::128-255 40521 27.38% 64.52% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::256-383 13835 9.35% 73.87% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::384-511 7266 4.91% 78.78% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::512-639 5442 3.68% 82.45% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::640-767 4031 2.72% 85.18% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::768-895 3118 2.11% 87.28% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::896-1023 2726 1.84% 89.13% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::1024-1151 16092 10.87% 100.00% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::total 147989 # Bytes accessed per row activation
+system.physmem.rdPerTurnAround::samples 17431 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::mean 22.176123 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::stdev 209.527519 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::0-1023 17419 99.93% 99.93% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::1024-2047 7 0.04% 99.97% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::2048-3071 3 0.02% 99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::3072-4095 1 0.01% 99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::26624-27647 1 0.01% 100.00% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::total 17438 # Reads before turning the bus around for writes
-system.physmem.wrPerTurnAround::samples 17438 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::mean 16.855144 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::gmean 16.781564 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::stdev 2.520616 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::16-19 17233 98.82% 98.82% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::20-23 149 0.85% 99.68% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::24-27 26 0.15% 99.83% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::28-31 10 0.06% 99.89% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::32-35 2 0.01% 99.90% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::36-39 2 0.01% 99.91% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::40-43 1 0.01% 99.91% # Writes before turning the bus around for reads
+system.physmem.rdPerTurnAround::total 17431 # Reads before turning the bus around for writes
+system.physmem.wrPerTurnAround::samples 17430 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::mean 16.865060 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::gmean 16.791911 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::stdev 2.512995 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::16-19 17223 98.81% 98.81% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::20-23 149 0.85% 99.67% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::24-27 30 0.17% 99.84% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::28-31 9 0.05% 99.89% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::32-35 3 0.02% 99.91% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::36-39 1 0.01% 99.91% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::44-47 3 0.02% 99.93% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::52-55 1 0.01% 99.94% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::60-63 1 0.01% 99.94% # Writes before turning the bus around for reads
@@ -238,202 +237,202 @@ system.physmem.wrPerTurnAround::100-103 1 0.01% 99.98% # Wr
system.physmem.wrPerTurnAround::104-107 2 0.01% 99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::132-135 1 0.01% 99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::180-183 1 0.01% 100.00% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::total 17438 # Writes before turning the bus around for reads
-system.physmem.totQLat 4282128000 # Total ticks spent queuing
-system.physmem.totMemAccLat 11526678000 # Total ticks spent from burst creation until serviced by the DRAM
-system.physmem.totBusLat 1931880000 # Total ticks spent in databus transfers
-system.physmem.avgQLat 11082.80 # Average queueing delay per DRAM burst
-system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat 29832.80 # Average memory access latency per DRAM burst
-system.physmem.avgRdBW 54.31 # Average DRAM read bandwidth in MiByte/s
-system.physmem.avgWrBW 41.31 # Average achieved write bandwidth in MiByte/s
-system.physmem.avgRdBWSys 54.36 # Average system read bandwidth in MiByte/s
-system.physmem.avgWrBWSys 41.32 # Average system write bandwidth in MiByte/s
+system.physmem.wrPerTurnAround::total 17430 # Writes before turning the bus around for reads
+system.physmem.totQLat 4293065000 # Total ticks spent queuing
+system.physmem.totMemAccLat 11540915000 # Total ticks spent from burst creation until serviced by the DRAM
+system.physmem.totBusLat 1932760000 # Total ticks spent in databus transfers
+system.physmem.avgQLat 11106.02 # Average queueing delay per DRAM burst
+system.physmem.avgBusLat 4999.99 # Average bus latency per DRAM burst
+system.physmem.avgMemAccLat 29855.97 # Average memory access latency per DRAM burst
+system.physmem.avgRdBW 54.29 # Average DRAM read bandwidth in MiByte/s
+system.physmem.avgWrBW 41.28 # Average achieved write bandwidth in MiByte/s
+system.physmem.avgRdBWSys 54.33 # Average system read bandwidth in MiByte/s
+system.physmem.avgWrBWSys 41.29 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 0.75 # Data bus utilization in percentage
system.physmem.busUtilRead 0.42 # Data bus utilization in percentage for reads
system.physmem.busUtilWrite 0.32 # Data bus utilization in percentage for writes
system.physmem.avgRdQLen 1.03 # Average read queue length when enqueuing
-system.physmem.avgWrQLen 21.49 # Average write queue length when enqueuing
-system.physmem.readRowHits 317407 # Number of row buffer hits during reads
-system.physmem.writeRowHits 215108 # Number of row buffer hits during writes
-system.physmem.readRowHitRate 82.15 # Row buffer hit rate for reads
-system.physmem.writeRowHitRate 73.18 # Row buffer hit rate for writes
-system.physmem.avgGap 668911.55 # Average gap between requests
-system.physmem.pageHitRate 78.27 # Row buffer hit rate, read and write combined
-system.physmem_0.actEnergy 571588920 # Energy for activate commands per rank (pJ)
-system.physmem_0.preEnergy 311878875 # Energy for precharge commands per rank (pJ)
-system.physmem_0.readEnergy 1527575400 # Energy for read commands per rank (pJ)
-system.physmem_0.writeEnergy 977734800 # Energy for write commands per rank (pJ)
-system.physmem_0.refreshEnergy 29738046000 # Energy for refresh commands per rank (pJ)
-system.physmem_0.actBackEnergy 65814252570 # Energy for active background per rank (pJ)
-system.physmem_0.preBackEnergy 215448936750 # Energy for precharge background per rank (pJ)
-system.physmem_0.totalEnergy 314390013315 # Total energy per rank (pJ)
-system.physmem_0.averagePower 690.509916 # Core power per rank (mW)
-system.physmem_0.memoryStateTime::IDLE 357849000500 # Time in different power states
-system.physmem_0.memoryStateTime::REF 15203500000 # Time in different power states
+system.physmem.avgWrQLen 21.65 # Average write queue length when enqueuing
+system.physmem.readRowHits 317463 # Number of row buffer hits during reads
+system.physmem.writeRowHits 215067 # Number of row buffer hits during writes
+system.physmem.readRowHitRate 82.13 # Row buffer hit rate for reads
+system.physmem.writeRowHitRate 73.15 # Row buffer hit rate for writes
+system.physmem.avgGap 669307.21 # Average gap between requests
+system.physmem.pageHitRate 78.25 # Row buffer hit rate, read and write combined
+system.physmem_0.actEnergy 572420520 # Energy for activate commands per rank (pJ)
+system.physmem_0.preEnergy 312332625 # Energy for precharge commands per rank (pJ)
+system.physmem_0.readEnergy 1528355400 # Energy for read commands per rank (pJ)
+system.physmem_0.writeEnergy 977968080 # Energy for write commands per rank (pJ)
+system.physmem_0.refreshEnergy 29764999680 # Energy for refresh commands per rank (pJ)
+system.physmem_0.actBackEnergy 65726366265 # Energy for active background per rank (pJ)
+system.physmem_0.preBackEnergy 215773632750 # Energy for precharge background per rank (pJ)
+system.physmem_0.totalEnergy 314656075320 # Total energy per rank (pJ)
+system.physmem_0.averagePower 690.468461 # Core power per rank (mW)
+system.physmem_0.memoryStateTime::IDLE 358390621750 # Time in different power states
+system.physmem_0.memoryStateTime::REF 15217280000 # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_0.memoryStateTime::ACT 82248835500 # Time in different power states
+system.physmem_0.memoryStateTime::ACT 82106088250 # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.physmem_1.actEnergy 545280120 # Energy for activate commands per rank (pJ)
-system.physmem_1.preEnergy 297523875 # Energy for precharge commands per rank (pJ)
-system.physmem_1.readEnergy 1485736200 # Energy for read commands per rank (pJ)
-system.physmem_1.writeEnergy 926555760 # Energy for write commands per rank (pJ)
-system.physmem_1.refreshEnergy 29738046000 # Energy for refresh commands per rank (pJ)
-system.physmem_1.actBackEnergy 63167759955 # Energy for active background per rank (pJ)
-system.physmem_1.preBackEnergy 217770421500 # Energy for precharge background per rank (pJ)
-system.physmem_1.totalEnergy 313931323410 # Total energy per rank (pJ)
-system.physmem_1.averagePower 689.502473 # Core power per rank (mW)
-system.physmem_1.memoryStateTime::IDLE 361727973250 # Time in different power states
-system.physmem_1.memoryStateTime::REF 15203500000 # Time in different power states
+system.physmem_1.actEnergy 546247800 # Energy for activate commands per rank (pJ)
+system.physmem_1.preEnergy 298051875 # Energy for precharge commands per rank (pJ)
+system.physmem_1.readEnergy 1486602000 # Energy for read commands per rank (pJ)
+system.physmem_1.writeEnergy 926776080 # Energy for write commands per rank (pJ)
+system.physmem_1.refreshEnergy 29764999680 # Energy for refresh commands per rank (pJ)
+system.physmem_1.actBackEnergy 63297439515 # Energy for active background per rank (pJ)
+system.physmem_1.preBackEnergy 217904270250 # Energy for precharge background per rank (pJ)
+system.physmem_1.totalEnergy 314224387200 # Total energy per rank (pJ)
+system.physmem_1.averagePower 689.521182 # Core power per rank (mW)
+system.physmem_1.memoryStateTime::IDLE 361949321250 # Time in different power states
+system.physmem_1.memoryStateTime::REF 15217280000 # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_1.memoryStateTime::ACT 78369769250 # Time in different power states
+system.physmem_1.memoryStateTime::ACT 78547312500 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.cpu.branchPred.lookups 231646337 # Number of BP lookups
-system.cpu.branchPred.condPredicted 231646337 # Number of conditional branches predicted
-system.cpu.branchPred.condIncorrect 9741961 # Number of conditional branches incorrect
-system.cpu.branchPred.BTBLookups 132013407 # Number of BTB lookups
-system.cpu.branchPred.BTBHits 129322217 # Number of BTB hits
+system.cpu.branchPred.lookups 231695087 # Number of BP lookups
+system.cpu.branchPred.condPredicted 231695087 # Number of conditional branches predicted
+system.cpu.branchPred.condIncorrect 9749161 # Number of conditional branches incorrect
+system.cpu.branchPred.BTBLookups 132117764 # Number of BTB lookups
+system.cpu.branchPred.BTBHits 129359921 # Number of BTB hits
system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu.branchPred.BTBHitPct 97.961427 # BTB Hit Percentage
-system.cpu.branchPred.usedRAS 28025090 # Number of times the RAS was used to get a target.
-system.cpu.branchPred.RASInCorrect 1471468 # Number of incorrect RAS predictions.
+system.cpu.branchPred.BTBHitPct 97.912587 # BTB Hit Percentage
+system.cpu.branchPred.usedRAS 28019082 # Number of times the RAS was used to get a target.
+system.cpu.branchPred.RASInCorrect 1472513 # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks
system.cpu.workload.num_syscalls 551 # Number of system calls
-system.cpu.numCycles 910608093 # number of cpu cycles simulated
+system.cpu.numCycles 911430498 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.fetch.icacheStallCycles 186242841 # Number of cycles fetch is stalled on an Icache miss
-system.cpu.fetch.Insts 1278548490 # Number of instructions fetch has processed
-system.cpu.fetch.Branches 231646337 # Number of branches that fetch encountered
-system.cpu.fetch.predictedBranches 157347307 # Number of branches that fetch has predicted taken
-system.cpu.fetch.Cycles 713142960 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu.fetch.SquashCycles 20218451 # Number of cycles fetch has spent squashing
-system.cpu.fetch.TlbCycles 1278 # Number of cycles fetch has spent waiting for tlb
-system.cpu.fetch.MiscStallCycles 97934 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
-system.cpu.fetch.PendingTrapStallCycles 814720 # Number of stall cycles due to pending traps
-system.cpu.fetch.PendingQuiesceStallCycles 1319 # Number of stall cycles due to pending quiesce instructions
-system.cpu.fetch.IcacheWaitRetryStallCycles 68 # Number of stall cycles due to full MSHR
-system.cpu.fetch.CacheLines 180536939 # Number of cache lines fetched
-system.cpu.fetch.IcacheSquashes 2712428 # Number of outstanding Icache misses that were squashed
-system.cpu.fetch.ItlbSquashes 5 # Number of outstanding ITLB misses that were squashed
-system.cpu.fetch.rateDist::samples 910410345 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::mean 2.611396 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::stdev 3.336099 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.icacheStallCycles 186296226 # Number of cycles fetch is stalled on an Icache miss
+system.cpu.fetch.Insts 1278949517 # Number of instructions fetch has processed
+system.cpu.fetch.Branches 231695087 # Number of branches that fetch encountered
+system.cpu.fetch.predictedBranches 157379003 # Number of branches that fetch has predicted taken
+system.cpu.fetch.Cycles 713875771 # Number of cycles fetch has run and was not squashing or blocked
+system.cpu.fetch.SquashCycles 20236911 # Number of cycles fetch has spent squashing
+system.cpu.fetch.TlbCycles 843 # Number of cycles fetch has spent waiting for tlb
+system.cpu.fetch.MiscStallCycles 99453 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
+system.cpu.fetch.PendingTrapStallCycles 835728 # Number of stall cycles due to pending traps
+system.cpu.fetch.PendingQuiesceStallCycles 1660 # Number of stall cycles due to pending quiesce instructions
+system.cpu.fetch.IcacheWaitRetryStallCycles 72 # Number of stall cycles due to full MSHR
+system.cpu.fetch.CacheLines 180582964 # Number of cache lines fetched
+system.cpu.fetch.IcacheSquashes 2713511 # Number of outstanding Icache misses that were squashed
+system.cpu.fetch.ItlbSquashes 2 # Number of outstanding ITLB misses that were squashed
+system.cpu.fetch.rateDist::samples 911228208 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::mean 2.609913 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::stdev 3.335178 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::0 499900768 54.91% 54.91% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::1 34011801 3.74% 58.65% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::2 33310917 3.66% 62.30% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::3 33621227 3.69% 66.00% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::4 27137981 2.98% 68.98% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::5 27875262 3.06% 72.04% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::6 37328628 4.10% 76.14% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::7 33745133 3.71% 79.85% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::8 183478628 20.15% 100.00% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::0 500401689 54.92% 54.92% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::1 34125690 3.75% 58.66% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::2 33332463 3.66% 62.32% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::3 33617134 3.69% 66.01% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::4 27404429 3.01% 69.01% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::5 27784633 3.05% 72.06% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::6 37330287 4.10% 76.16% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::7 33792897 3.71% 79.87% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::8 183438986 20.13% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::total 910410345 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.branchRate 0.254386 # Number of branch fetches per cycle
-system.cpu.fetch.rate 1.404060 # Number of inst fetches per cycle
-system.cpu.decode.IdleCycles 127581888 # Number of cycles decode is idle
-system.cpu.decode.BlockedCycles 450063290 # Number of cycles decode is blocked
-system.cpu.decode.RunCycles 239948731 # Number of cycles decode is running
-system.cpu.decode.UnblockCycles 82707211 # Number of cycles decode is unblocking
-system.cpu.decode.SquashCycles 10109225 # Number of cycles decode is squashing
-system.cpu.decode.DecodedInsts 2232998831 # Number of instructions handled by decode
-system.cpu.rename.SquashCycles 10109225 # Number of cycles rename is squashing
-system.cpu.rename.IdleCycles 159900312 # Number of cycles rename is idle
-system.cpu.rename.BlockCycles 230280409 # Number of cycles rename is blocking
-system.cpu.rename.serializeStallCycles 34090 # count of cycles rename stalled for serializing inst
-system.cpu.rename.RunCycles 285603646 # Number of cycles rename is running
-system.cpu.rename.UnblockCycles 224482663 # Number of cycles rename is unblocking
-system.cpu.rename.RenamedInsts 2183077018 # Number of instructions processed by rename
-system.cpu.rename.ROBFullEvents 183617 # Number of times rename has blocked due to ROB full
-system.cpu.rename.IQFullEvents 140318739 # Number of times rename has blocked due to IQ full
-system.cpu.rename.LQFullEvents 24297006 # Number of times rename has blocked due to LQ full
-system.cpu.rename.SQFullEvents 48974479 # Number of times rename has blocked due to SQ full
-system.cpu.rename.RenamedOperands 2288425781 # Number of destination operands rename has renamed
-system.cpu.rename.RenameLookups 5524582783 # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups 3513207505 # Number of integer rename lookups
-system.cpu.rename.fp_rename_lookups 61088 # Number of floating rename lookups
+system.cpu.fetch.rateDist::total 911228208 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.branchRate 0.254210 # Number of branch fetches per cycle
+system.cpu.fetch.rate 1.403233 # Number of inst fetches per cycle
+system.cpu.decode.IdleCycles 127697766 # Number of cycles decode is idle
+system.cpu.decode.BlockedCycles 450696701 # Number of cycles decode is blocked
+system.cpu.decode.RunCycles 239651398 # Number of cycles decode is running
+system.cpu.decode.UnblockCycles 83063888 # Number of cycles decode is unblocking
+system.cpu.decode.SquashCycles 10118455 # Number of cycles decode is squashing
+system.cpu.decode.DecodedInsts 2233614820 # Number of instructions handled by decode
+system.cpu.rename.SquashCycles 10118455 # Number of cycles rename is squashing
+system.cpu.rename.IdleCycles 159982570 # Number of cycles rename is idle
+system.cpu.rename.BlockCycles 230664398 # Number of cycles rename is blocking
+system.cpu.rename.serializeStallCycles 40764 # count of cycles rename stalled for serializing inst
+system.cpu.rename.RunCycles 285690426 # Number of cycles rename is running
+system.cpu.rename.UnblockCycles 224731595 # Number of cycles rename is unblocking
+system.cpu.rename.RenamedInsts 2183551679 # Number of instructions processed by rename
+system.cpu.rename.ROBFullEvents 177689 # Number of times rename has blocked due to ROB full
+system.cpu.rename.IQFullEvents 141075901 # Number of times rename has blocked due to IQ full
+system.cpu.rename.LQFullEvents 24311507 # Number of times rename has blocked due to LQ full
+system.cpu.rename.SQFullEvents 48530126 # Number of times rename has blocked due to SQ full
+system.cpu.rename.RenamedOperands 2288986524 # Number of destination operands rename has renamed
+system.cpu.rename.RenameLookups 5525749346 # Number of register rename lookups that rename has made
+system.cpu.rename.int_rename_lookups 3513986925 # Number of integer rename lookups
+system.cpu.rename.fp_rename_lookups 64934 # Number of floating rename lookups
system.cpu.rename.CommittedMaps 1614040854 # Number of HB maps that are committed
-system.cpu.rename.UndoneMaps 674384927 # Number of HB maps that are undone due to squashing
-system.cpu.rename.serializingInsts 2376 # count of serializing insts renamed
-system.cpu.rename.tempSerializingInsts 2343 # count of temporary serializing insts renamed
-system.cpu.rename.skidInsts 427656429 # count of insts added to the skid buffer
-system.cpu.memDep0.insertedLoads 530632285 # Number of loads inserted to the mem dependence unit.
-system.cpu.memDep0.insertedStores 210400238 # Number of stores inserted to the mem dependence unit.
-system.cpu.memDep0.conflictingLoads 240350662 # Number of conflicting loads.
-system.cpu.memDep0.conflictingStores 72017394 # Number of conflicting stores.
-system.cpu.iq.iqInstsAdded 2112353898 # Number of instructions added to the IQ (excludes non-spec)
-system.cpu.iq.iqNonSpecInstsAdded 24976 # Number of non-speculative instructions added to the IQ
-system.cpu.iq.iqInstsIssued 1828941324 # Number of instructions issued
-system.cpu.iq.iqSquashedInstsIssued 423887 # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined 578689030 # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu.iq.iqSquashedOperandsExamined 1006760945 # Number of squashed operands that are examined and possibly removed from graph
-system.cpu.iq.iqSquashedNonSpecRemoved 24424 # Number of squashed non-spec instructions that were removed
-system.cpu.iq.issued_per_cycle::samples 910410345 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::mean 2.008920 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::stdev 2.068672 # Number of insts issued each cycle
+system.cpu.rename.UndoneMaps 674945670 # Number of HB maps that are undone due to squashing
+system.cpu.rename.serializingInsts 3353 # count of serializing insts renamed
+system.cpu.rename.tempSerializingInsts 3126 # count of temporary serializing insts renamed
+system.cpu.rename.skidInsts 428782866 # count of insts added to the skid buffer
+system.cpu.memDep0.insertedLoads 530734595 # Number of loads inserted to the mem dependence unit.
+system.cpu.memDep0.insertedStores 210445129 # Number of stores inserted to the mem dependence unit.
+system.cpu.memDep0.conflictingLoads 240719653 # Number of conflicting loads.
+system.cpu.memDep0.conflictingStores 72347559 # Number of conflicting stores.
+system.cpu.iq.iqInstsAdded 2112788093 # Number of instructions added to the IQ (excludes non-spec)
+system.cpu.iq.iqNonSpecInstsAdded 24468 # Number of non-speculative instructions added to the IQ
+system.cpu.iq.iqInstsIssued 1829137533 # Number of instructions issued
+system.cpu.iq.iqSquashedInstsIssued 426447 # Number of squashed instructions issued
+system.cpu.iq.iqSquashedInstsExamined 579133879 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu.iq.iqSquashedOperandsExamined 1007575077 # Number of squashed operands that are examined and possibly removed from graph
+system.cpu.iq.iqSquashedNonSpecRemoved 23916 # Number of squashed non-spec instructions that were removed
+system.cpu.iq.issued_per_cycle::samples 911228208 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::mean 2.007332 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::stdev 2.067633 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::0 325758066 35.78% 35.78% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::1 130835258 14.37% 50.15% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::2 120048462 13.19% 63.34% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::3 111501441 12.25% 75.59% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::4 91294731 10.03% 85.61% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::5 61344237 6.74% 92.35% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::6 43225981 4.75% 97.10% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::7 18968528 2.08% 99.18% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::8 7433641 0.82% 100.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::0 325992359 35.78% 35.78% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::1 131250522 14.40% 50.18% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::2 120537234 13.23% 63.41% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::3 111169469 12.20% 75.61% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::4 91475128 10.04% 85.65% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::5 61217160 6.72% 92.36% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::6 43196755 4.74% 97.10% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::7 18979354 2.08% 99.19% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::8 7410227 0.81% 100.00% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::total 910410345 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::total 911228208 # Number of insts issued each cycle
system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntAlu 11322546 42.44% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntMult 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntDiv 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatAdd 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatCmp 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatCvt 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatMult 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatDiv 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatSqrt 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAdd 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAlu 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdCmp 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdCvt 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMisc 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMult 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdShift 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdSqrt 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 42.44% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemRead 12279843 46.03% 88.48% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemWrite 3074079 11.52% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntAlu 11335968 42.56% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntMult 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntDiv 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatAdd 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCmp 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCvt 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMult 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatDiv 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatSqrt 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAdd 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAlu 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCmp 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCvt 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMisc 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMult 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShift 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdSqrt 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 42.56% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead 12226894 45.90% 88.46% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite 3075179 11.54% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
-system.cpu.iq.FU_type_0::No_OpClass 2717047 0.15% 0.15% # Type of FU issued
-system.cpu.iq.FU_type_0::IntAlu 1212867491 66.32% 66.46% # Type of FU issued
-system.cpu.iq.FU_type_0::IntMult 388152 0.02% 66.49% # Type of FU issued
-system.cpu.iq.FU_type_0::IntDiv 3881000 0.21% 66.70% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatAdd 102 0.00% 66.70% # Type of FU issued
+system.cpu.iq.FU_type_0::No_OpClass 2719775 0.15% 0.15% # Type of FU issued
+system.cpu.iq.FU_type_0::IntAlu 1213037771 66.32% 66.47% # Type of FU issued
+system.cpu.iq.FU_type_0::IntMult 388267 0.02% 66.49% # Type of FU issued
+system.cpu.iq.FU_type_0::IntDiv 3880871 0.21% 66.70% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatAdd 112 0.00% 66.70% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.70% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.70% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.70% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 66.70% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMult 48 0.00% 66.70% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatDiv 465 0.00% 66.70% # Type of FU issued
system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.70% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 66.70% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 66.70% # Type of FU issued
@@ -455,84 +454,84 @@ system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 66.70% # Ty
system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 66.70% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 66.70% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.70% # Type of FU issued
-system.cpu.iq.FU_type_0::MemRead 435396374 23.81% 90.50% # Type of FU issued
-system.cpu.iq.FU_type_0::MemWrite 173691158 9.50% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead 435424012 23.80% 90.50% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite 173686212 9.50% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::total 1828941324 # Type of FU issued
-system.cpu.iq.rate 2.008483 # Inst issue rate
-system.cpu.iq.fu_busy_cnt 26676468 # FU busy when requested
-system.cpu.iq.fu_busy_rate 0.014586 # FU busy rate (busy events/executed inst)
-system.cpu.iq.int_inst_queue_reads 4595362463 # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes 2691335659 # Number of integer instruction queue writes
-system.cpu.iq.int_inst_queue_wakeup_accesses 1799336607 # Number of integer instruction queue wakeup accesses
-system.cpu.iq.fp_inst_queue_reads 30885 # Number of floating instruction queue reads
-system.cpu.iq.fp_inst_queue_writes 66324 # Number of floating instruction queue writes
-system.cpu.iq.fp_inst_queue_wakeup_accesses 6516 # Number of floating instruction queue wakeup accesses
-system.cpu.iq.int_alu_accesses 1852886556 # Number of integer alu accesses
-system.cpu.iq.fp_alu_accesses 14189 # Number of floating point alu accesses
-system.cpu.iew.lsq.thread0.forwLoads 185525718 # Number of loads that had data forwarded from stores
+system.cpu.iq.FU_type_0::total 1829137533 # Type of FU issued
+system.cpu.iq.rate 2.006886 # Inst issue rate
+system.cpu.iq.fu_busy_cnt 26638041 # FU busy when requested
+system.cpu.iq.fu_busy_rate 0.014563 # FU busy rate (busy events/executed inst)
+system.cpu.iq.int_inst_queue_reads 4596535787 # Number of integer instruction queue reads
+system.cpu.iq.int_inst_queue_writes 2692210314 # Number of integer instruction queue writes
+system.cpu.iq.int_inst_queue_wakeup_accesses 1799537822 # Number of integer instruction queue wakeup accesses
+system.cpu.iq.fp_inst_queue_reads 31975 # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_writes 69900 # Number of floating instruction queue writes
+system.cpu.iq.fp_inst_queue_wakeup_accesses 6901 # Number of floating instruction queue wakeup accesses
+system.cpu.iq.int_alu_accesses 1853040947 # Number of integer alu accesses
+system.cpu.iq.fp_alu_accesses 14852 # Number of floating point alu accesses
+system.cpu.iew.lsq.thread0.forwLoads 185563330 # Number of loads that had data forwarded from stores
system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu.iew.lsq.thread0.squashedLoads 146532886 # Number of loads squashed
-system.cpu.iew.lsq.thread0.ignoredResponses 211598 # Number of memory responses ignored because the instruction is squashed
-system.cpu.iew.lsq.thread0.memOrderViolation 388823 # Number of memory ordering violations
-system.cpu.iew.lsq.thread0.squashedStores 61240052 # Number of stores squashed
+system.cpu.iew.lsq.thread0.squashedLoads 146635930 # Number of loads squashed
+system.cpu.iew.lsq.thread0.ignoredResponses 210802 # Number of memory responses ignored because the instruction is squashed
+system.cpu.iew.lsq.thread0.memOrderViolation 388472 # Number of memory ordering violations
+system.cpu.iew.lsq.thread0.squashedStores 61284943 # Number of stores squashed
system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu.iew.lsq.thread0.rescheduledLoads 19518 # Number of loads that were rescheduled
-system.cpu.iew.lsq.thread0.cacheBlocked 1112 # Number of times an access to memory failed due to the cache being blocked
+system.cpu.iew.lsq.thread0.rescheduledLoads 18850 # Number of loads that were rescheduled
+system.cpu.iew.lsq.thread0.cacheBlocked 952 # Number of times an access to memory failed due to the cache being blocked
system.cpu.iew.iewIdleCycles 0 # Number of cycles IEW is idle
-system.cpu.iew.iewSquashCycles 10109225 # Number of cycles IEW is squashing
-system.cpu.iew.iewBlockCycles 169308479 # Number of cycles IEW is blocking
-system.cpu.iew.iewUnblockCycles 10486289 # Number of cycles IEW is unblocking
-system.cpu.iew.iewDispatchedInsts 2112378874 # Number of instructions dispatched to IQ
-system.cpu.iew.iewDispSquashedInsts 393422 # Number of squashed instructions skipped by dispatch
-system.cpu.iew.iewDispLoadInsts 530635043 # Number of dispatched load instructions
-system.cpu.iew.iewDispStoreInsts 210400238 # Number of dispatched store instructions
-system.cpu.iew.iewDispNonSpecInsts 7587 # Number of dispatched non-speculative instructions
-system.cpu.iew.iewIQFullEvents 4508389 # Number of times the IQ has become full, causing a stall
-system.cpu.iew.iewLSQFullEvents 3837371 # Number of times the LSQ has become full, causing a stall
-system.cpu.iew.memOrderViolationEvents 388823 # Number of memory order violations
-system.cpu.iew.predictedTakenIncorrect 5739135 # Number of branches that were predicted taken incorrectly
-system.cpu.iew.predictedNotTakenIncorrect 4588886 # Number of branches that were predicted not taken incorrectly
-system.cpu.iew.branchMispredicts 10328021 # Number of branch mispredicts detected at execute
-system.cpu.iew.iewExecutedInsts 1807829650 # Number of executed instructions
-system.cpu.iew.iewExecLoadInsts 429333816 # Number of load instructions executed
-system.cpu.iew.iewExecSquashedInsts 21111674 # Number of squashed instructions skipped in execute
+system.cpu.iew.iewSquashCycles 10118455 # Number of cycles IEW is squashing
+system.cpu.iew.iewBlockCycles 169584093 # Number of cycles IEW is blocking
+system.cpu.iew.iewUnblockCycles 10386937 # Number of cycles IEW is unblocking
+system.cpu.iew.iewDispatchedInsts 2112812561 # Number of instructions dispatched to IQ
+system.cpu.iew.iewDispSquashedInsts 394512 # Number of squashed instructions skipped by dispatch
+system.cpu.iew.iewDispLoadInsts 530738087 # Number of dispatched load instructions
+system.cpu.iew.iewDispStoreInsts 210445129 # Number of dispatched store instructions
+system.cpu.iew.iewDispNonSpecInsts 7053 # Number of dispatched non-speculative instructions
+system.cpu.iew.iewIQFullEvents 4503089 # Number of times the IQ has become full, causing a stall
+system.cpu.iew.iewLSQFullEvents 3731660 # Number of times the LSQ has become full, causing a stall
+system.cpu.iew.memOrderViolationEvents 388472 # Number of memory order violations
+system.cpu.iew.predictedTakenIncorrect 5744189 # Number of branches that were predicted taken incorrectly
+system.cpu.iew.predictedNotTakenIncorrect 4593759 # Number of branches that were predicted not taken incorrectly
+system.cpu.iew.branchMispredicts 10337948 # Number of branch mispredicts detected at execute
+system.cpu.iew.iewExecutedInsts 1808033307 # Number of executed instructions
+system.cpu.iew.iewExecLoadInsts 429361199 # Number of load instructions executed
+system.cpu.iew.iewExecSquashedInsts 21104226 # Number of squashed instructions skipped in execute
system.cpu.iew.exec_swp 0 # number of swp insts executed
system.cpu.iew.exec_nop 0 # number of nop insts executed
-system.cpu.iew.exec_refs 599464610 # number of memory reference insts executed
-system.cpu.iew.exec_branches 171918385 # Number of branches executed
-system.cpu.iew.exec_stores 170130794 # Number of stores executed
-system.cpu.iew.exec_rate 1.985299 # Inst execution rate
-system.cpu.iew.wb_sent 1804630771 # cumulative count of insts sent to commit
-system.cpu.iew.wb_count 1799343123 # cumulative count of insts written-back
-system.cpu.iew.wb_producers 1369373146 # num instructions producing a value
-system.cpu.iew.wb_consumers 2092710816 # num instructions consuming a value
+system.cpu.iew.exec_refs 599489274 # number of memory reference insts executed
+system.cpu.iew.exec_branches 171937546 # Number of branches executed
+system.cpu.iew.exec_stores 170128075 # Number of stores executed
+system.cpu.iew.exec_rate 1.983731 # Inst execution rate
+system.cpu.iew.wb_sent 1804836297 # cumulative count of insts sent to commit
+system.cpu.iew.wb_count 1799544723 # cumulative count of insts written-back
+system.cpu.iew.wb_producers 1369264226 # num instructions producing a value
+system.cpu.iew.wb_consumers 2092761334 # num instructions consuming a value
system.cpu.iew.wb_penalized 0 # number of instrctions required to write to 'other' IQ
-system.cpu.iew.wb_rate 1.975980 # insts written-back per cycle
-system.cpu.iew.wb_fanout 0.654354 # average fanout of values written-back
+system.cpu.iew.wb_rate 1.974418 # insts written-back per cycle
+system.cpu.iew.wb_fanout 0.654286 # average fanout of values written-back
system.cpu.iew.wb_penalized_rate 0 # fraction of instructions written-back that wrote to 'other' IQ
-system.cpu.commit.commitSquashedInsts 583611522 # The number of squashed insts skipped by commit
+system.cpu.commit.commitSquashedInsts 584053108 # The number of squashed insts skipped by commit
system.cpu.commit.commitNonSpecStalls 552 # The number of times commit has been forced to stall to communicate backwards
-system.cpu.commit.branchMispredicts 9827684 # The number of times a branch was mispredicted
-system.cpu.commit.committed_per_cycle::samples 831323520 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::mean 1.839222 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::stdev 2.498579 # Number of insts commited each cycle
+system.cpu.commit.branchMispredicts 9837261 # The number of times a branch was mispredicted
+system.cpu.commit.committed_per_cycle::samples 832077003 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::mean 1.837557 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::stdev 2.497071 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::0 362694832 43.63% 43.63% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::1 175144101 21.07% 64.70% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::2 57358727 6.90% 71.60% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::3 86263805 10.38% 81.97% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::4 27150861 3.27% 85.24% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::5 27127713 3.26% 88.50% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::6 9862872 1.19% 89.69% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::7 8848382 1.06% 90.75% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::8 76872227 9.25% 100.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::0 362943344 43.62% 43.62% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::1 175693429 21.12% 64.73% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::2 57310072 6.89% 71.62% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::3 86390127 10.38% 82.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::4 27179123 3.27% 85.27% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::5 27109381 3.26% 88.53% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::6 9762579 1.17% 89.70% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::7 8845708 1.06% 90.76% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::8 76843240 9.24% 100.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::total 831323520 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::total 832077003 # Number of insts commited each cycle
system.cpu.commit.committedInsts 826877109 # Number of instructions committed
system.cpu.commit.committedOps 1528988701 # Number of ops (including micro ops) committed
system.cpu.commit.swp_count 0 # Number of s/w prefetches committed
@@ -578,338 +577,337 @@ system.cpu.commit.op_class_0::MemWrite 149160186 9.76% 100.00% # Cl
system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::total 1528988701 # Class of committed instruction
-system.cpu.commit.bw_lim_events 76872227 # number cycles where commit BW limit reached
-system.cpu.rob.rob_reads 2867051516 # The number of ROB reads
-system.cpu.rob.rob_writes 4304473794 # The number of ROB writes
-system.cpu.timesIdled 2567 # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu.idleCycles 197748 # Total number of cycles that the CPU has spent unscheduled due to idling
+system.cpu.commit.bw_lim_events 76843240 # number cycles where commit BW limit reached
+system.cpu.rob.rob_reads 2868275572 # The number of ROB reads
+system.cpu.rob.rob_writes 4305421890 # The number of ROB writes
+system.cpu.timesIdled 2629 # Number of times that the entire CPU went into an idle state and unscheduled itself
+system.cpu.idleCycles 202290 # Total number of cycles that the CPU has spent unscheduled due to idling
system.cpu.committedInsts 826877109 # Number of Instructions Simulated
system.cpu.committedOps 1528988701 # Number of Ops (including micro ops) Simulated
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-system.cpu.cpi_total 1.101262 # CPI: Total CPI of All Threads
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system.cpu.misc_regfile_writes 1 # number of misc regfile writes
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-system.cpu.dcache.demand_avg_miss_latency::total 24210.663200 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 24210.663200 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::total 24210.663200 # average overall miss latency
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system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
-system.cpu.dcache.writebacks::writebacks 2331685 # number of writebacks
-system.cpu.dcache.writebacks::total 2331685 # number of writebacks
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-system.cpu.dcache.demand_mshr_miss_latency::total 62161654438 # number of demand (read+write) MSHR miss cycles
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-system.cpu.dcache.overall_mshr_miss_latency::total 62161654438 # number of overall MSHR miss cycles
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system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.006466 # mshr miss rate for WriteReq accesses
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-system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 22768.627468 # average overall mshr miss latency
-system.cpu.dcache.demand_avg_mshr_miss_latency::total 22768.627468 # average overall mshr miss latency
-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 22768.627468 # average overall mshr miss latency
-system.cpu.dcache.overall_avg_mshr_miss_latency::total 22768.627468 # average overall mshr miss latency
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+system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 22773.979645 # average overall mshr miss latency
+system.cpu.dcache.overall_avg_mshr_miss_latency::total 22773.979645 # average overall mshr miss latency
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.icache.tags.replacements 6982 # number of replacements
-system.cpu.icache.tags.tagsinuse 1087.309225 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 180328938 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 8606 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 20953.862189 # Average number of references to valid blocks.
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+system.cpu.icache.tags.tagsinuse 1086.852590 # Cycle average of tags in use
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+system.cpu.icache.tags.avg_refs 20576.634383 # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1087.309225 # Average occupied blocks per requestor
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-system.cpu.icache.tags.age_task_id_blocks_1024::1 10 # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::2 58 # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::3 309 # Occupied blocks per task id
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-system.cpu.toL2Bus.trans_dist::ReadExResp 771021 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 211091 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 7791975 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count::total 8003066 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 553280 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 311561536 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size::total 312114816 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.snoops 193800 # Total snoops (count)
-system.cpu.toL2Bus.snoop_fanout::samples 5264276 # Request fanout histogram
+system.cpu.toL2Bus.trans_dist::ReadReq 1968231 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadResp 1968229 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::Writeback 2331746 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeReq 193701 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeResp 193701 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExReq 770992 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExResp 770992 # Transaction distribution
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 211398 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 7792376 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 8003774 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 562496 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 311575040 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size::total 312137536 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.snoops 193818 # Total snoops (count)
+system.cpu.toL2Bus.snoop_fanout::samples 5264670 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean 3 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::3 5264276 100.00% 100.00% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::3 5264670 100.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::total 5264276 # Request fanout histogram
-system.cpu.toL2Bus.reqLayer0.occupancy 4991831371 # Layer occupancy (ticks)
+system.cpu.toL2Bus.snoop_fanout::total 5264670 # Request fanout histogram
+system.cpu.toL2Bus.reqLayer0.occupancy 4991624303 # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization 1.1 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer0.occupancy 304197990 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.occupancy 304450990 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer1.occupancy 3984504311 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.occupancy 3984789765 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%)
-system.membus.trans_dist::ReadReq 179736 # Transaction distribution
-system.membus.trans_dist::ReadResp 179736 # Transaction distribution
-system.membus.trans_dist::Writeback 293946 # Transaction distribution
-system.membus.trans_dist::UpgradeReq 191861 # Transaction distribution
-system.membus.trans_dist::UpgradeResp 191861 # Transaction distribution
-system.membus.trans_dist::ReadExReq 206982 # Transaction distribution
-system.membus.trans_dist::ReadExResp 206982 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1451104 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1451104 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 1451104 # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43562496 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43562496 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 43562496 # Cumulative packet size per connected master and slave (bytes)
+system.membus.trans_dist::ReadReq 179922 # Transaction distribution
+system.membus.trans_dist::ReadResp 179921 # Transaction distribution
+system.membus.trans_dist::Writeback 293991 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 191853 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 191853 # Transaction distribution
+system.membus.trans_dist::ReadExReq 206963 # Transaction distribution
+system.membus.trans_dist::ReadExResp 206963 # Transaction distribution
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1451466 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1451466 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 1451466 # Packet count per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43576000 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43576000 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size::total 43576000 # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops 0 # Total snoops (count)
-system.membus.snoop_fanout::samples 872525 # Request fanout histogram
+system.membus.snoop_fanout::samples 872729 # Request fanout histogram
system.membus.snoop_fanout::mean 0 # Request fanout histogram
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::0 872525 100.00% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::0 872729 100.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
-system.membus.snoop_fanout::total 872525 # Request fanout histogram
-system.membus.reqLayer0.occupancy 2241314053 # Layer occupancy (ticks)
+system.membus.snoop_fanout::total 872729 # Request fanout histogram
+system.membus.reqLayer0.occupancy 2240390129 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.5 # Layer utilization (%)
-system.membus.respLayer1.occupancy 2430435187 # Layer occupancy (ticks)
+system.membus.respLayer1.occupancy 2431381451 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.5 # Layer utilization (%)
---------- End Simulation Statistics ----------
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 19:34:38 +0000