diff options
| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
| commit | 0cf36d94095aedef3c51447243c5a3cc14dd5d56 (patch) | |
| tree | c0ed9e35fbbc5512f7fedf2947d4ae2702214f8e /tests/long | |
| parent | a70a83155bfe4c3877894c29f9dea720beb40f9c (diff) | |
| download | gem5-0cf36d94095aedef3c51447243c5a3cc14dd5d56.tar.xz | |
stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
Diffstat (limited to 'tests/long')
123 files changed, 4515 insertions, 4452 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini index 9efbaffcd..aca399d8a 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini @@ -15,19 +15,20 @@ boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/dist/binaries/console +console=/home/stever/m5/m5_system_2.0b3/binaries/console eventq_index=0 init_param=0 -kernel=/dist/binaries/vmlinux +kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 -pal=/dist/binaries/ts_osfpal -readfile=/work/gem5.latest/tests/halt.sh +pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -149,7 +150,7 @@ dcache_port=system.cpu0.dcache.cpu_side icache_port=system.cpu0.icache.cpu_side [system.cpu0.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -163,7 +164,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu0.dcache] type=BaseCache @@ -171,6 +171,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -518,6 +519,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -655,7 +657,7 @@ dcache_port=system.cpu1.dcache.cpu_side icache_port=system.cpu1.icache.cpu_side [system.cpu1.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -669,7 +671,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu1.dcache] type=BaseCache @@ -677,6 +678,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -1024,6 +1026,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -1099,7 +1102,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.disk2] @@ -1122,7 +1125,7 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-bigswap2.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img read_only=true [system.dvfs_handler] @@ -1142,9 +1145,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.tsunami.pciconfig.pio master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma @@ -1155,6 +1160,7 @@ children=tags addr_ranges=0:134217727 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -1190,6 +1196,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -1224,11 +1231,14 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.physmem.port slave=system.system_port system.l2c.mem_side system.iocache.mem_side @@ -1278,7 +1288,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1338,7 +1348,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.terminal] @@ -1353,11 +1363,14 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout index c80d76784..7f9e2b29d 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout @@ -1,13 +1,14 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:12:51 -gem5 started Oct 29 2014 09:21:02 -gem5 executing on u200540-lin -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 09:01:06 +gem5 executing on phenom +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual + Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/binaries/vmlinux +info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... -info: Launching CPU 1 @ 119596000 -Exiting @ tick 1905067807000 because m5_exit instruction encountered +info: Launching CPU 1 @ 133655000 +Exiting @ tick 1904437574000 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt index a1e1dce04..5574bfb2b 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.904438 # Nu sim_ticks 1904437574000 # Number of ticks simulated final_tick 1904437574000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 150033 # Simulator instruction rate (inst/s) -host_op_rate 150033 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5049661741 # Simulator tick rate (ticks/s) -host_mem_usage 379720 # Number of bytes of host memory used -host_seconds 377.14 # Real time elapsed on the host +host_inst_rate 143053 # Simulator instruction rate (inst/s) +host_op_rate 143053 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 4814720142 # Simulator tick rate (ticks/s) +host_mem_usage 313028 # Number of bytes of host memory used +host_seconds 395.54 # Real time elapsed on the host sim_insts 56583768 # Number of instructions simulated sim_ops 56583768 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -437,7 +437,7 @@ system.cpu0.iq.iqInstsAdded 53110388 # Nu system.cpu0.iq.iqNonSpecInstsAdded 1887245 # Number of non-speculative instructions added to the IQ system.cpu0.iq.iqInstsIssued 52243998 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 50112 # Number of squashed instructions issued -system.cpu0.iq.iqSquashedInstsExamined 6322079 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu0.iq.iqSquashedInstsExamined 6621677 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu0.iq.iqSquashedOperandsExamined 2924940 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 1298251 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 110234726 # Number of insts issued each cycle @@ -530,10 +530,10 @@ system.cpu0.iq.rate 0.453068 # In system.cpu0.iq.fu_busy_cnt 970450 # FU busy when requested system.cpu0.iq.fu_busy_rate 0.018575 # FU busy rate (busy events/executed inst) system.cpu0.iq.int_inst_queue_reads 215148578 # Number of integer instruction queue reads -system.cpu0.iq.int_inst_queue_writes 61059123 # Number of integer instruction queue writes +system.cpu0.iq.int_inst_queue_writes 61357419 # Number of integer instruction queue writes system.cpu0.iq.int_inst_queue_wakeup_accesses 50866456 # Number of integer instruction queue wakeup accesses system.cpu0.iq.fp_inst_queue_reads 594706 # Number of floating instruction queue reads -system.cpu0.iq.fp_inst_queue_writes 278076 # Number of floating instruction queue writes +system.cpu0.iq.fp_inst_queue_writes 279378 # Number of floating instruction queue writes system.cpu0.iq.fp_inst_queue_wakeup_accesses 273817 # Number of floating instruction queue wakeup accesses system.cpu0.iq.int_alu_accesses 52889876 # Number of integer alu accesses system.cpu0.iq.fp_alu_accesses 320091 # Number of floating point alu accesses @@ -1032,7 +1032,7 @@ system.cpu1.iq.iqInstsAdded 9284732 # Nu system.cpu1.iq.iqNonSpecInstsAdded 487174 # Number of non-speculative instructions added to the IQ system.cpu1.iq.iqInstsIssued 9053277 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 20996 # Number of squashed instructions issued -system.cpu1.iq.iqSquashedInstsExamined 1498950 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu1.iq.iqSquashedInstsExamined 1564088 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu1.iq.iqSquashedOperandsExamined 731721 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 360528 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 13661307 # Number of insts issued each cycle @@ -1125,10 +1125,10 @@ system.cpu1.iq.rate 0.633233 # In system.cpu1.iq.fu_busy_cnt 251682 # FU busy when requested system.cpu1.iq.fu_busy_rate 0.027800 # FU busy rate (busy events/executed inst) system.cpu1.iq.int_inst_queue_reads 31870123 # Number of integer instruction queue reads -system.cpu1.iq.int_inst_queue_writes 11194643 # Number of integer instruction queue writes +system.cpu1.iq.int_inst_queue_writes 11259293 # Number of integer instruction queue writes system.cpu1.iq.int_inst_queue_wakeup_accesses 8718718 # Number of integer instruction queue wakeup accesses system.cpu1.iq.fp_inst_queue_reads 170415 # Number of floating instruction queue reads -system.cpu1.iq.fp_inst_queue_writes 80450 # Number of floating instruction queue writes +system.cpu1.iq.fp_inst_queue_writes 80938 # Number of floating instruction queue writes system.cpu1.iq.fp_inst_queue_wakeup_accesses 78899 # Number of floating instruction queue wakeup accesses system.cpu1.iq.int_alu_accesses 9210850 # Number of integer alu accesses system.cpu1.iq.fp_alu_accesses 91292 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal index 15c215278..7e0283697 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal @@ -27,7 +27,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
memcluster 1, usage 0, start 392, end 16384
freeing pages 1069:16384
reserving pages 1069:1070 -
4096K Bcache detected; load hit latency 30 cycles, load miss latency 140 cycles +
4096K Bcache detected; load hit latency 30 cycles, load miss latency 154 cycles
SMP: 2 CPUs probed -- cpu_present_mask = 3
Built 1 zonelists
Kernel command line: root=/dev/hda1 console=ttyS0 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini index bce635119..4de22817f 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini @@ -15,19 +15,20 @@ boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/dist/binaries/console +console=/home/stever/m5/m5_system_2.0b3/binaries/console eventq_index=0 init_param=0 -kernel=/dist/binaries/vmlinux +kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 -pal=/dist/binaries/ts_osfpal -readfile=/work/gem5.latest/tests/halt.sh +pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -149,7 +150,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -163,7 +164,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -171,6 +171,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -518,6 +519,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -567,6 +569,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -600,8 +603,11 @@ size=4194304 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -640,7 +646,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.disk2] @@ -663,7 +669,7 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-bigswap2.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img read_only=true [system.dvfs_handler] @@ -683,9 +689,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.tsunami.pciconfig.pio master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma @@ -696,6 +704,7 @@ children=tags addr_ranges=0:134217727 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -730,11 +739,14 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side @@ -784,7 +796,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -844,7 +856,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.terminal] diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout index 2666e2b50..25160cf8e 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:12:51 -gem5 started Oct 29 2014 09:20:51 -gem5 executing on u200540-lin -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:27:15 +gem5 executing on phenom +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 + Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/binaries/vmlinux +info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 1859038679000 because m5_exit instruction encountered +Exiting @ tick 1861005569500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt index 7568645aa..80e8bf1d4 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.861006 # Nu sim_ticks 1861005569500 # Number of ticks simulated final_tick 1861005569500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 153218 # Simulator instruction rate (inst/s) -host_op_rate 153218 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5386630373 # Simulator tick rate (ticks/s) -host_mem_usage 376136 # Number of bytes of host memory used -host_seconds 345.49 # Real time elapsed on the host +host_inst_rate 145313 # Simulator instruction rate (inst/s) +host_op_rate 145313 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5108711594 # Simulator tick rate (ticks/s) +host_mem_usage 309496 # Number of bytes of host memory used +host_seconds 364.28 # Real time elapsed on the host sim_insts 52934565 # Number of instructions simulated sim_ops 52934565 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -425,7 +425,7 @@ system.cpu.iq.iqInstsAdded 58622970 # Nu system.cpu.iq.iqNonSpecInstsAdded 2136022 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 57539781 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 62715 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 7497440 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 7824422 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 3554737 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 1474907 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 117014009 # Number of insts issued each cycle @@ -518,10 +518,10 @@ system.cpu.iq.rate 0.469435 # In system.cpu.iq.fu_busy_cnt 1115222 # FU busy when requested system.cpu.iq.fu_busy_rate 0.019382 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 232558247 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 67941522 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 68266797 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 55883323 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 713260 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 334790 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 336497 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 329169 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 58264568 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 383149 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal index 075c19401..008c44f37 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal @@ -24,7 +24,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
memcluster 1, usage 0, start 392, end 16384
freeing pages 1069:16384
reserving pages 1069:1070 -
4096K Bcache detected; load hit latency 30 cycles, load miss latency 140 cycles +
4096K Bcache detected; load hit latency 30 cycles, load miss latency 154 cycles
SMP: 1 CPUs probed -- cpu_present_mask = 1
Built 1 zonelists
Kernel command line: root=/dev/hda1 console=ttyS0 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini index 3940f534b..2d4d2bc38 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini @@ -15,19 +15,20 @@ boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/dist/binaries/console +console=/home/stever/m5/m5_system_2.0b3/binaries/console eventq_index=0 init_param=0 -kernel=/dist/binaries/vmlinux +kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic mem_ranges=0:134217727 memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 -pal=/dist/binaries/ts_osfpal -readfile=/work/gem5.latest/tests/halt.sh +pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -102,6 +103,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -142,6 +144,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -327,7 +330,7 @@ wbWidth=8 workload= [system.cpu2.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -341,7 +344,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu2.dtb] type=AlphaTLB @@ -697,7 +699,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.disk2] @@ -720,7 +722,7 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-bigswap2.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img read_only=true [system.dvfs_handler] @@ -740,9 +742,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.tsunami.pciconfig.pio master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma @@ -753,6 +757,7 @@ children=tags addr_ranges=0:134217727 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -788,6 +793,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -822,11 +828,14 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.physmem.port slave=system.system_port system.l2c.mem_side system.iocache.mem_side @@ -876,7 +885,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -936,7 +945,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.terminal] @@ -951,11 +960,14 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr index 518507880..ffff6ec3c 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr @@ -1,5 +1,53 @@ warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10136, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 11138, Bank: 3 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout index 9fb7b2d24..29e1e9099 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout @@ -1,9 +1,10 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:12:51 -gem5 started Oct 29 2014 09:24:03 -gem5 executing on u200540-lin -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:35:45 +gem5 executing on phenom +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full + Global frequency set at 1000000000000 ticks per second 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt index ff31246c1..438fcc2e5 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.841539 # Nu sim_ticks 1841538755500 # Number of ticks simulated final_tick 1841538755500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 221552 # Simulator instruction rate (inst/s) -host_op_rate 221552 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5785089232 # Simulator tick rate (ticks/s) -host_mem_usage 374344 # Number of bytes of host memory used -host_seconds 318.33 # Real time elapsed on the host +host_inst_rate 221247 # Simulator instruction rate (inst/s) +host_op_rate 221247 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5777125497 # Simulator tick rate (ticks/s) +host_mem_usage 308008 # Number of bytes of host memory used +host_seconds 318.76 # Real time elapsed on the host sim_insts 70525499 # Number of instructions simulated sim_ops 70525499 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -1109,7 +1109,7 @@ system.cpu2.iq.iqInstsAdded 32987424 # Nu system.cpu2.iq.iqNonSpecInstsAdded 681806 # Number of non-speculative instructions added to the IQ system.cpu2.iq.iqInstsIssued 32666998 # Number of instructions issued system.cpu2.iq.iqSquashedInstsIssued 16031 # Number of squashed instructions issued -system.cpu2.iq.iqSquashedInstsExamined 2457717 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu2.iq.iqSquashedInstsExamined 2569271 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu2.iq.iqSquashedOperandsExamined 1151235 # Number of squashed operands that are examined and possibly removed from graph system.cpu2.iq.iqSquashedNonSpecRemoved 487594 # Number of squashed non-spec instructions that were removed system.cpu2.iq.issued_per_cycle::samples 29124256 # Number of insts issued each cycle @@ -1202,10 +1202,10 @@ system.cpu2.iq.rate 1.063974 # In system.cpu2.iq.fu_busy_cnt 386915 # FU busy when requested system.cpu2.iq.fu_busy_rate 0.011844 # FU busy rate (busy events/executed inst) system.cpu2.iq.int_inst_queue_reads 94607462 # Number of integer instruction queue reads -system.cpu2.iq.int_inst_queue_writes 36013478 # Number of integer instruction queue writes +system.cpu2.iq.int_inst_queue_writes 36124516 # Number of integer instruction queue writes system.cpu2.iq.int_inst_queue_wakeup_accesses 32054290 # Number of integer instruction queue wakeup accesses system.cpu2.iq.fp_inst_queue_reads 253736 # Number of floating instruction queue reads -system.cpu2.iq.fp_inst_queue_writes 119374 # Number of floating instruction queue writes +system.cpu2.iq.fp_inst_queue_writes 119890 # Number of floating instruction queue writes system.cpu2.iq.fp_inst_queue_wakeup_accesses 117198 # Number of floating instruction queue wakeup accesses system.cpu2.iq.int_alu_accesses 32915380 # Number of integer alu accesses system.cpu2.iq.fp_alu_accesses 136083 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini index 9621b86d6..4dbc37659 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=134217728 -boot_loader=/dist/binaries/boot_emm.arm +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM mem_mode=timing mem_ranges=2147483648:2415919103 -memories=system.physmem system.realview.vram system.realview.nvmem +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.ext/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-aarch32-ael.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img read_only=true [system.clk_domain] @@ -189,7 +190,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -199,11 +200,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.checker] type=O3Checker @@ -245,6 +242,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.dtb [system.cpu.checker.dstage2_mmu.stage2_tlb] @@ -262,7 +260,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[9] [system.cpu.checker.dtb] type=ArmTLB @@ -279,7 +276,7 @@ eventq_index=0 is_stage2=false num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[7] +port=system.cpu.toL2Bus.slave[5] [system.cpu.checker.isa] type=ArmISA @@ -316,6 +313,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.itb [system.cpu.checker.istage2_mmu.stage2_tlb] @@ -333,7 +331,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[8] [system.cpu.checker.itb] type=ArmTLB @@ -350,7 +347,7 @@ eventq_index=0 is_stage2=false num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[6] +port=system.cpu.toL2Bus.slave[4] [system.cpu.checker.tracer] type=ExeTracer @@ -362,6 +359,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -396,6 +394,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -413,7 +412,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -703,6 +701,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -771,6 +770,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -788,7 +788,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -813,6 +812,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -846,13 +846,16 @@ size=4194304 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port system.cpu.checker.istage2_mmu.stage2_tlb.walker.port system.cpu.checker.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -883,9 +886,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -896,6 +901,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -930,13 +936,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -984,7 +993,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1288,7 +1297,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -1475,7 +1483,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -1657,7 +1665,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr index 44bde2ec3..07835b11a 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr @@ -16,7 +16,7 @@ warn: instruction 'mcr bpiallis' unimplemented warn: instruction 'mcr icialluis' unimplemented warn: instruction 'mcr dccimvac' unimplemented warn: Tried to read RealView I/O at offset 0x60 that doesn't exist -warn: 8445832500: Instruction results do not match! (Values may not actually be integers) Inst: 0xa, checker: 0 +warn: 8779058000: Instruction results do not match! (Values may not actually be integers) Inst: 0xa, checker: 0 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist @@ -32,7 +32,7 @@ warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4] warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0] -warn: 81667038500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000 +warn: 82000113500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000 warn: Returning zero for read from miscreg pmcr warn: Returning zero for read from miscreg pmcr warn: Ignoring write to miscreg pmcntenclr @@ -43,7 +43,6 @@ warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmcr warn: Ignoring write to miscreg pmcr -warn: CP14 unimplemented crn[12], opc1[5], crm[8], opc2[0] -warn: 404836653500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000 -warn: instruction 'mcr bpiall' unimplemented +warn: 405408467500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000 warn: instruction 'mcr dcisw' unimplemented +warn: instruction 'mcr bpiall' unimplemented diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout index f4b480e9e..5625a74d8 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout @@ -1,17 +1,18 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 31 2014 10:01:44 -gem5 started Oct 31 2014 11:29:21 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re /work/gem5.ext/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 10:59:45 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker + Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 - 0: system.cpu.checker.isa: ISA system set to: 0x4985680 0x4985680 - 0: system.cpu.isa: ISA system set to: 0x4985680 0x4985680 +info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 + 0: system.cpu.checker.isa: ISA system set to: 0x2d2a120 0x2d2a120 + 0: system.cpu.isa: ISA system set to: 0x2d2a120 0x2d2a120 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80008000 -info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000 +info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000 info: Entering event queue @ 0. Starting simulation... info: Read CNTFREQ_EL0 frequency info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 @@ -44,4 +45,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 -Exiting @ tick 2826844351500 because m5_exit instruction encountered +Exiting @ tick 2827616186000 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt index 40f18548e..6373b7480 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.827616 # Nu sim_ticks 2827616186000 # Number of ticks simulated final_tick 2827616186000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 69501 # Simulator instruction rate (inst/s) -host_op_rate 84304 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1736810486 # Simulator tick rate (ticks/s) -host_mem_usage 620504 # Number of bytes of host memory used -host_seconds 1628.05 # Real time elapsed on the host +host_inst_rate 73888 # Simulator instruction rate (inst/s) +host_op_rate 89625 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1846444734 # Simulator tick rate (ticks/s) +host_mem_usage 556020 # Number of bytes of host memory used +host_seconds 1531.38 # Real time elapsed on the host sim_insts 113151083 # Number of instructions simulated sim_ops 137250963 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -756,7 +756,7 @@ system.cpu.iq.iqInstsAdded 143540852 # Nu system.cpu.iq.iqNonSpecInstsAdded 2119167 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 143328299 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 272168 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 6274201 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 8409052 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 14689564 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 125312 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 256876545 # Number of insts issued each cycle @@ -849,10 +849,10 @@ system.cpu.iq.rate 0.544758 # In system.cpu.iq.fu_busy_cnt 22576275 # FU busy when requested system.cpu.iq.fu_busy_rate 0.157514 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 566346239 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 151939321 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 154074171 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 140211060 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 35347 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 13215 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 13216 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 11430 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 165879209 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 23028 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout index 4506577d0..d603a7ffb 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout @@ -1,15 +1,15 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Apr 20 2015 13:24:23 -gem5 started Apr 20 2015 13:24:39 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 15:52:40 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual Global frequency set at 1000000000000 ticks per second info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 - 0: system.cpu0.isa: ISA system set to: 0x4157820 0x4157820 - 0: system.cpu1.isa: ISA system set to: 0x4157820 0x4157820 + 0: system.cpu0.isa: ISA system set to: 0x4163810 0x4163810 + 0: system.cpu1.isa: ISA system set to: 0x4163810 0x4163810 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80008000 info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt index 19c12f6bf..bbbf5052b 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.625396 # Nu sim_ticks 2625395606000 # Number of ticks simulated final_tick 2625395606000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 105565 # Simulator instruction rate (inst/s) -host_op_rate 128079 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2303070285 # Simulator tick rate (ticks/s) -host_mem_usage 586092 # Number of bytes of host memory used -host_seconds 1139.95 # Real time elapsed on the host +host_inst_rate 91005 # Simulator instruction rate (inst/s) +host_op_rate 110413 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1985416078 # Simulator tick rate (ticks/s) +host_mem_usage 586088 # Number of bytes of host memory used +host_seconds 1322.34 # Real time elapsed on the host sim_insts 120339436 # Number of instructions simulated sim_ops 146004136 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -657,7 +657,7 @@ system.cpu0.iq.iqInstsAdded 129422072 # Nu system.cpu0.iq.iqNonSpecInstsAdded 1660998 # Number of non-speculative instructions added to the IQ system.cpu0.iq.iqInstsIssued 127592349 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 453825 # Number of squashed instructions issued -system.cpu0.iq.iqSquashedInstsExamined 8506052 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu0.iq.iqSquashedInstsExamined 10488941 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu0.iq.iqSquashedOperandsExamined 21267672 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 117222 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 189611039 # Number of insts issued each cycle @@ -750,7 +750,7 @@ system.cpu0.iq.rate 0.662094 # In system.cpu0.iq.fu_busy_cnt 23403648 # FU busy when requested system.cpu0.iq.fu_busy_rate 0.183425 # FU busy rate (busy events/executed inst) system.cpu0.iq.int_inst_queue_reads 468620138 # Number of integer instruction queue reads -system.cpu0.iq.int_inst_queue_writes 139596675 # Number of integer instruction queue writes +system.cpu0.iq.int_inst_queue_writes 141579564 # Number of integer instruction queue writes system.cpu0.iq.int_inst_queue_wakeup_accesses 124128658 # Number of integer instruction queue wakeup accesses system.cpu0.iq.fp_inst_queue_reads 33072 # Number of floating instruction queue reads system.cpu0.iq.fp_inst_queue_writes 11274 # Number of floating instruction queue writes @@ -1868,7 +1868,7 @@ system.cpu1.iq.iqInstsAdded 27759685 # Nu system.cpu1.iq.iqNonSpecInstsAdded 627473 # Number of non-speculative instructions added to the IQ system.cpu1.iq.iqInstsIssued 27258527 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 145234 # Number of squashed instructions issued -system.cpu1.iq.iqSquashedInstsExamined 2799528 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu1.iq.iqSquashedInstsExamined 2977146 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu1.iq.iqSquashedOperandsExamined 6943190 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 53970 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 42152917 # Number of insts issued each cycle @@ -1961,10 +1961,10 @@ system.cpu1.iq.rate 0.631965 # In system.cpu1.iq.fu_busy_cnt 6164373 # FU busy when requested system.cpu1.iq.fu_busy_rate 0.226145 # FU busy rate (busy events/executed inst) system.cpu1.iq.int_inst_queue_reads 102973934 # Number of integer instruction queue reads -system.cpu1.iq.int_inst_queue_writes 31195241 # Number of integer instruction queue writes +system.cpu1.iq.int_inst_queue_writes 31372858 # Number of integer instruction queue writes system.cpu1.iq.int_inst_queue_wakeup_accesses 26623969 # Number of integer instruction queue wakeup accesses system.cpu1.iq.fp_inst_queue_reads 5644 # Number of floating instruction queue reads -system.cpu1.iq.fp_inst_queue_writes 2049 # Number of floating instruction queue writes +system.cpu1.iq.fp_inst_queue_writes 2050 # Number of floating instruction queue writes system.cpu1.iq.fp_inst_queue_wakeup_accesses 1785 # Number of floating instruction queue wakeup accesses system.cpu1.iq.int_alu_accesses 33419259 # Number of integer alu accesses system.cpu1.iq.fp_alu_accesses 3574 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini index 6d0567284..67d41e91a 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=134217728 -boot_loader=/dist/binaries/boot_emm.arm +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM mem_mode=timing mem_ranges=2147483648:2415919103 -memories=system.realview.nvmem system.physmem system.realview.vram +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.ext/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-aarch32-ael.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img read_only=true [system.clk_domain] @@ -189,7 +190,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -199,11 +200,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -211,6 +208,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -245,6 +243,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -262,7 +261,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -552,6 +550,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -620,6 +619,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -637,7 +637,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -662,6 +661,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -695,13 +695,16 @@ size=4194304 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -732,9 +735,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -745,6 +750,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -779,13 +785,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -833,7 +842,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1137,7 +1146,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -1324,7 +1332,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -1506,7 +1514,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simerr index bd02ea892..ab972f12d 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simerr @@ -34,6 +34,5 @@ warn: Ignoring write to miscreg pmcntenclr warn: Ignoring write to miscreg pmintenclr warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmcr -warn: CP14 unimplemented crn[12], opc1[5], crm[8], opc2[0] -warn: instruction 'mcr bpiall' unimplemented warn: instruction 'mcr dcisw' unimplemented +warn: instruction 'mcr bpiall' unimplemented diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout index 4fa33566b..5250b0867 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout @@ -1,16 +1,17 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 31 2014 10:01:44 -gem5 started Oct 31 2014 11:28:40 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /work/gem5.ext/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:53:00 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 + Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 - 0: system.cpu.isa: ISA system set to: 0x443e680 0x443e680 +info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 + 0: system.cpu.isa: ISA system set to: 0x317f940 0x317f940 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80008000 -info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000 +info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000 info: Entering event queue @ 0. Starting simulation... info: Read CNTFREQ_EL0 frequency info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 @@ -28,4 +29,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 -Exiting @ tick 2826844351500 because m5_exit instruction encountered +Exiting @ tick 2827616186000 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt index c3d73effc..5de8c3a92 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.827616 # Nu sim_ticks 2827616186000 # Number of ticks simulated final_tick 2827616186000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 99248 # Simulator instruction rate (inst/s) -host_op_rate 120386 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2480177298 # Simulator tick rate (ticks/s) -host_mem_usage 619560 # Number of bytes of host memory used -host_seconds 1140.09 # Real time elapsed on the host +host_inst_rate 94820 # Simulator instruction rate (inst/s) +host_op_rate 115016 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2369528287 # Simulator tick rate (ticks/s) +host_mem_usage 555256 # Number of bytes of host memory used +host_seconds 1193.32 # Real time elapsed on the host sim_insts 113151083 # Number of instructions simulated sim_ops 137250963 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -617,7 +617,7 @@ system.cpu.iq.iqInstsAdded 143540852 # Nu system.cpu.iq.iqNonSpecInstsAdded 2119167 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 143328299 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 272168 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 6274201 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 8409052 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 14689564 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 125312 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 256876545 # Number of insts issued each cycle @@ -710,10 +710,10 @@ system.cpu.iq.rate 0.544758 # In system.cpu.iq.fu_busy_cnt 22576275 # FU busy when requested system.cpu.iq.fu_busy_rate 0.157514 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 566346239 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 151939321 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 154074171 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 140211060 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 35347 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 13215 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 13216 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 11430 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 165879209 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 23028 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/system.terminal index b3be0ec54..ad91d76dd 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/system.terminal @@ -193,7 +193,7 @@ oprofile: using timer interrupt. TCP: cubic registered
NET: Registered protocol family 10
NET: Registered protocol family 17
-rtc-pl031 1c170000.rtc: setting system clock to 2009-01-01 12:00:00 UTC (1230811200)
+rtc-pl031 1c170000.rtc: setting system clock to 2009-01-01 00:00:00 UTC (1230768000)
ALSA device list:
No soundcards found.
@@ -203,6 +203,6 @@ Freeing unused kernel memory: 292K (806aa000 - 806f3000)
init started: BusyBox v1.15.3 (2010-05-07 01:27:07 BST)
starting pid 673, tty '': '/etc/rc.d/rc.local'
warning: can't open /etc/mtab: No such file or directory
-Thu Jan 1 12:00:02 UTC 2009
+Thu Jan 1 00:00:02 UTC 2009
S: devpts
-Thu Jan 1 12:00:02 UTC 2009
+Thu Jan 1 00:00:02 UTC 2009
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simout index e3b97ab4a..34ebc3e81 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simout @@ -1,12 +1,12 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Apr 20 2015 13:24:23 -gem5 started Apr 20 2015 13:24:39 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 12:26:21 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full Global frequency set at 1000000000000 ticks per second - 0: system.cpu0.isa: ISA system set to: 0x2ceff00 0x2ceff00 - 0: system.cpu1.isa: ISA system set to: 0x2ceff00 0x2ceff00 - 0: system.cpu2.isa: ISA system set to: 0x2ceff00 0x2ceff00 + 0: system.cpu0.isa: ISA system set to: 0x305ef00 0x305ef00 + 0: system.cpu1.isa: ISA system set to: 0x305ef00 0x305ef00 + 0: system.cpu2.isa: ISA system set to: 0x305ef00 0x305ef00 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt index 3091cfc63..4a1673e29 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.817778 # Nu sim_ticks 2817777605000 # Number of ticks simulated final_tick 2817777605000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 307401 # Simulator instruction rate (inst/s) -host_op_rate 373266 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 6861547245 # Simulator tick rate (ticks/s) -host_mem_usage 555284 # Number of bytes of host memory used -host_seconds 410.66 # Real time elapsed on the host +host_inst_rate 278686 # Simulator instruction rate (inst/s) +host_op_rate 338399 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 6220604315 # Simulator tick rate (ticks/s) +host_mem_usage 555292 # Number of bytes of host memory used +host_seconds 452.98 # Real time elapsed on the host sim_insts 126237777 # Number of instructions simulated sim_ops 153286368 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -1517,7 +1517,7 @@ system.cpu2.iq.iqInstsAdded 54546075 # Nu system.cpu2.iq.iqNonSpecInstsAdded 673336 # Number of non-speculative instructions added to the IQ system.cpu2.iq.iqInstsIssued 51866821 # Number of instructions issued system.cpu2.iq.iqSquashedInstsIssued 68048 # Number of squashed instructions issued -system.cpu2.iq.iqSquashedInstsExamined 7293157 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu2.iq.iqSquashedInstsExamined 8110099 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu2.iq.iqSquashedOperandsExamined 18430167 # Number of squashed operands that are examined and possibly removed from graph system.cpu2.iq.iqSquashedNonSpecRemoved 68913 # Number of squashed non-spec instructions that were removed system.cpu2.iq.issued_per_cycle::samples 67809362 # Number of insts issued each cycle @@ -1610,10 +1610,10 @@ system.cpu2.iq.rate 0.745035 # In system.cpu2.iq.fu_busy_cnt 788590 # FU busy when requested system.cpu2.iq.fu_busy_rate 0.015204 # FU busy rate (busy events/executed inst) system.cpu2.iq.int_inst_queue_reads 172390251 # Number of integer instruction queue reads -system.cpu2.iq.int_inst_queue_writes 62545050 # Number of integer instruction queue writes +system.cpu2.iq.int_inst_queue_writes 63361989 # Number of integer instruction queue writes system.cpu2.iq.int_inst_queue_wakeup_accesses 50322136 # Number of integer instruction queue wakeup accesses system.cpu2.iq.fp_inst_queue_reads 9391 # Number of floating instruction queue reads -system.cpu2.iq.fp_inst_queue_writes 4963 # Number of floating instruction queue writes +system.cpu2.iq.fp_inst_queue_writes 4966 # Number of floating instruction queue writes system.cpu2.iq.fp_inst_queue_wakeup_accesses 4144 # Number of floating instruction queue wakeup accesses system.cpu2.iq.int_alu_accesses 52650258 # Number of integer alu accesses system.cpu2.iq.fp_alu_accesses 5051 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini index 8d6175787..1af28cf10 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=134217728 -boot_loader=/dist/binaries/boot_emm.arm +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM mem_mode=timing mem_ranges=2147483648:2415919103 -memories=system.realview.nvmem system.physmem system.realview.vram +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.ext/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-aarch32-ael.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img read_only=true [system.clk_domain] @@ -189,7 +190,7 @@ dcache_port=system.cpu0.dcache.cpu_side icache_port=system.cpu0.icache.cpu_side [system.cpu0.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -203,7 +204,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu0.dcache] type=BaseCache @@ -211,6 +211,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -245,6 +246,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.dtb [system.cpu0.dstage2_mmu.stage2_tlb] @@ -262,7 +264,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[5] [system.cpu0.dtb] type=ArmTLB @@ -594,6 +595,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -662,6 +664,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.itb [system.cpu0.istage2_mmu.stage2_tlb] @@ -679,7 +682,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[4] [system.cpu0.itb] type=ArmTLB @@ -792,7 +794,7 @@ wbWidth=8 workload= [system.cpu1.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -806,13 +808,13 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu1.dstage2_mmu] type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.dtb [system.cpu1.dstage2_mmu.stage2_tlb] @@ -1189,6 +1191,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.itb [system.cpu1.istage2_mmu.stage2_tlb] @@ -1252,9 +1255,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -1265,6 +1270,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -1300,6 +1306,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -1334,13 +1341,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -1388,7 +1398,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1692,7 +1702,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -1879,7 +1888,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -2061,7 +2070,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory @@ -2099,13 +2108,16 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side -slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port [system.vncserver] type=VncServer diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr index 154a76987..750274093 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr @@ -4,6 +4,7 @@ warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections warn: Existing EnergyCtrl, but no enabled DVFSHandler found. warn: Not doing anything for miscreg ACTLR +warn: Not doing anything for miscreg ACTLR warn: Not doing anything for write of miscreg ACTLR warn: The clidr register always reports 0 caches. warn: clidr LoUIS field of 0b001 to match current ARM implementations. @@ -25,8 +26,7 @@ warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist -warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[4] -warn: CP14 unimplemented crn[8], opc1[4], crm[12], opc2[0] +warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[3] warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] @@ -34,21 +34,17 @@ warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4] warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0] warn: CP14 unimplemented crn[0], opc1[4], crm[8], opc2[1] -warn: CP14 unimplemented crn[0], opc1[4], crm[0], opc2[5] -warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[1] +warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[3] +warn: CP14 unimplemented crn[6], opc1[5], crm[4], opc2[3] warn: Returning zero for read from miscreg pmcr warn: Ignoring write to miscreg pmcntenclr warn: Ignoring write to miscreg pmintenclr warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmcr -warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[6] +warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[2] warn: CP14 unimplemented crn[0], opc1[4], crm[12], opc2[2] -warn: CP14 unimplemented crn[4], opc1[5], crm[12], opc2[1] -warn: CP14 unimplemented crn[5], opc1[4], crm[8], opc2[1] -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR +warn: CP14 unimplemented crn[15], opc1[0], crm[8], opc2[0] +warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[2] warn: instruction 'mcr bpiall' unimplemented warn: User mode does not have SPSR warn: User mode does not have SPSR diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout index ade00a610..8b56b1fe5 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout @@ -1,10 +1,11 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 31 2014 10:01:44 -gem5 started Oct 31 2014 11:48:14 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 -re /work/gem5.ext/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:13:13 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 + Global frequency set at 1000000000000 ticks per second - 0: system.cpu0.isa: ISA system set to: 0x4f45680 0x4f45680 - 0: system.cpu1.isa: ISA system set to: 0x4f45680 0x4f45680 + 0: system.cpu0.isa: ISA system set to: 0x351fd50 0x351fd50 + 0: system.cpu1.isa: ISA system set to: 0x351fd50 0x351fd50 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt index e32fa2c8d..220af110d 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.804323 # Nu sim_ticks 2804323403500 # Number of ticks simulated final_tick 2804323403500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 111168 # Simulator instruction rate (inst/s) -host_op_rate 134929 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2664755466 # Simulator tick rate (ticks/s) -host_mem_usage 625128 # Number of bytes of host memory used -host_seconds 1052.38 # Real time elapsed on the host +host_inst_rate 105186 # Simulator instruction rate (inst/s) +host_op_rate 127668 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2521360773 # Simulator tick rate (ticks/s) +host_mem_usage 559780 # Number of bytes of host memory used +host_seconds 1112.23 # Real time elapsed on the host sim_insts 116990114 # Number of instructions simulated sim_ops 141995948 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -643,7 +643,7 @@ system.cpu0.iq.iqInstsAdded 79153572 # Nu system.cpu0.iq.iqNonSpecInstsAdded 1058697 # Number of non-speculative instructions added to the IQ system.cpu0.iq.iqInstsIssued 75784801 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 96696 # Number of squashed instructions issued -system.cpu0.iq.iqSquashedInstsExamined 10015024 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu0.iq.iqSquashedInstsExamined 11308863 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu0.iq.iqSquashedOperandsExamined 24599963 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 115562 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 103806101 # Number of insts issued each cycle @@ -736,10 +736,10 @@ system.cpu0.iq.rate 0.712423 # In system.cpu0.iq.fu_busy_cnt 1102720 # FU busy when requested system.cpu0.iq.fu_busy_rate 0.014551 # FU busy rate (busy events/executed inst) system.cpu0.iq.int_inst_queue_reads 256560915 # Number of integer instruction queue reads -system.cpu0.iq.int_inst_queue_writes 90272679 # Number of integer instruction queue writes +system.cpu0.iq.int_inst_queue_writes 91566516 # Number of integer instruction queue writes system.cpu0.iq.int_inst_queue_wakeup_accesses 73457837 # Number of integer instruction queue wakeup accesses system.cpu0.iq.fp_inst_queue_reads 14204 # Number of floating instruction queue reads -system.cpu0.iq.fp_inst_queue_writes 7628 # Number of floating instruction queue writes +system.cpu0.iq.fp_inst_queue_writes 7630 # Number of floating instruction queue writes system.cpu0.iq.fp_inst_queue_wakeup_accesses 6340 # Number of floating instruction queue wakeup accesses system.cpu0.iq.int_alu_accesses 76877738 # Number of integer alu accesses system.cpu0.iq.fp_alu_accesses 7597 # Number of floating point alu accesses @@ -1569,7 +1569,7 @@ system.cpu1.iq.iqInstsAdded 83375619 # Nu system.cpu1.iq.iqNonSpecInstsAdded 1158159 # Number of non-speculative instructions added to the IQ system.cpu1.iq.iqInstsIssued 79910900 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 92494 # Number of squashed instructions issued -system.cpu1.iq.iqSquashedInstsExamined 10129412 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu1.iq.iqSquashedInstsExamined 11441232 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu1.iq.iqSquashedOperandsExamined 25615832 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 107265 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 106194794 # Number of insts issued each cycle @@ -1662,10 +1662,10 @@ system.cpu1.iq.rate 0.734775 # In system.cpu1.iq.fu_busy_cnt 1139082 # FU busy when requested system.cpu1.iq.fu_busy_rate 0.014254 # FU busy rate (busy events/executed inst) system.cpu1.iq.int_inst_queue_reads 267236211 # Number of integer instruction queue reads -system.cpu1.iq.int_inst_queue_writes 94707265 # Number of integer instruction queue writes +system.cpu1.iq.int_inst_queue_writes 96019084 # Number of integer instruction queue writes system.cpu1.iq.int_inst_queue_wakeup_accesses 77543645 # Number of integer instruction queue wakeup accesses system.cpu1.iq.fp_inst_queue_reads 11959 # Number of floating instruction queue reads -system.cpu1.iq.fp_inst_queue_writes 6289 # Number of floating instruction queue writes +system.cpu1.iq.fp_inst_queue_writes 6290 # Number of floating instruction queue writes system.cpu1.iq.fp_inst_queue_wakeup_accesses 5191 # Number of floating instruction queue wakeup accesses system.cpu1.iq.int_alu_accesses 81043378 # Number of integer alu accesses system.cpu1.iq.fp_alu_accesses 6453 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/system.terminal index b3be0ec54..ad91d76dd 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/system.terminal @@ -193,7 +193,7 @@ oprofile: using timer interrupt. TCP: cubic registered
NET: Registered protocol family 10
NET: Registered protocol family 17
-rtc-pl031 1c170000.rtc: setting system clock to 2009-01-01 12:00:00 UTC (1230811200)
+rtc-pl031 1c170000.rtc: setting system clock to 2009-01-01 00:00:00 UTC (1230768000)
ALSA device list:
No soundcards found.
@@ -203,6 +203,6 @@ Freeing unused kernel memory: 292K (806aa000 - 806f3000)
init started: BusyBox v1.15.3 (2010-05-07 01:27:07 BST)
starting pid 673, tty '': '/etc/rc.d/rc.local'
warning: can't open /etc/mtab: No such file or directory
-Thu Jan 1 12:00:02 UTC 2009
+Thu Jan 1 00:00:02 UTC 2009
S: devpts
-Thu Jan 1 12:00:02 UTC 2009
+Thu Jan 1 00:00:02 UTC 2009
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini index a07bdbdd3..4d2b2f309 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=134217728 -boot_loader=/projects/pd/randd/dist/binaries/boot_emm.arm64 +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm64 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM64 mem_mode=timing mem_ranges=2147483648:2415919103 -memories=system.realview.vram system.physmem system.realview.nvmem +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.latest/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/projects/pd/randd/dist/disks/linaro-minimal-aarch64.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linaro-minimal-aarch64.img read_only=true [system.clk_domain] @@ -189,7 +190,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -199,11 +200,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.checker] type=O3Checker @@ -245,6 +242,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.dtb [system.cpu.checker.dstage2_mmu.stage2_tlb] @@ -262,7 +260,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[9] [system.cpu.checker.dtb] type=ArmTLB @@ -279,7 +276,7 @@ eventq_index=0 is_stage2=false num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[7] +port=system.cpu.toL2Bus.slave[5] [system.cpu.checker.isa] type=ArmISA @@ -316,6 +313,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.itb [system.cpu.checker.istage2_mmu.stage2_tlb] @@ -333,7 +331,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[8] [system.cpu.checker.itb] type=ArmTLB @@ -350,7 +347,7 @@ eventq_index=0 is_stage2=false num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[6] +port=system.cpu.toL2Bus.slave[4] [system.cpu.checker.tracer] type=ExeTracer @@ -362,6 +359,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -396,6 +394,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -413,7 +412,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -703,6 +701,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -771,6 +770,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -788,7 +788,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -813,6 +812,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -846,13 +846,16 @@ size=4194304 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port system.cpu.checker.istage2_mmu.stage2_tlb.walker.port system.cpu.checker.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -883,9 +886,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -896,6 +901,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -930,13 +936,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -984,7 +993,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1288,7 +1297,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -1475,7 +1483,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -1657,7 +1665,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simerr index 8d34f421c..c2a0ed9be 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simerr @@ -7,85 +7,95 @@ warn: Existing EnergyCtrl, but no enabled DVFSHandler found. warn: SCReg: Writing 0 to dcc0:site0:pos0:fn7:dev0 warn: Tried to read RealView I/O at offset 0x60 that doesn't exist warn: Tried to read RealView I/O at offset 0x48 that doesn't exist +warn: 12458605972000: Instruction results do not match! (Values may not actually be integers) Inst: 0xffffffc00d07d780, checker: 0 +warn: 12458609273000: Instruction results do not match! (Values may not actually be integers) Inst: 0xffffffc00d07d7c0, checker: 0 warn: Tried to read RealView I/O at offset 0x8 that doesn't exist warn: Tried to read RealView I/O at offset 0x48 that doesn't exist -warn: 13842443212000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 13881966762000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 13882255463000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 13882829689000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 13883384376000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 13883639881500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 13885195478000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14119823023500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14121701098000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14127958169500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14128186290500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14128405933500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14128812861500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14129226204500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14167422773000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14205629937000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 -warn: 14448292905000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14448293175500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14456513700500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14456513960000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14464465597000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14464465877500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14464466467500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14464466743000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14464466981000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14472409559000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14472410152500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14472410415000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14472410653000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14472410900000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14477663411000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14483940515000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14483940774000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14493678366500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14504940200000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14504941281500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14504941528000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14514859454000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14514859717500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14530591953000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14530592212000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14535730342000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14535730633500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14535731223500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14535731486000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14535731724000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14542816759000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14542817022500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14553011613000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14553012206500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14553012482000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14553012757000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14553013043000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14617580022000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14617580304000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14677231930000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14677232200000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 -warn: 14798881767000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14798974404500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14798974754500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799704795000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799705056000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x42 -warn: 14799705260500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799777436500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91 -warn: 14799777691500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799777962500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf1 -warn: 14799778533000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799778788500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91 -warn: 14799779012000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799779301000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799779810000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799780873500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799781372500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14799781674500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 -warn: 14848040219000: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1 -warn: 14848040537000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14848040839000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14848041113000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14848041396500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 -warn: 14848041675500: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1 +warn: 13847380989000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13886976040500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13909524462000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13910098545500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13910493556500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13910725565500: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13910949758000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13919499191000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 13969109987000: Instruction results do not match! (Values may not actually be integers) Inst: 0x1, checker: 0 +warn: 14211548964500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14211549180000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14219621260500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14227403410000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14227403653500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14227403893000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14227404099500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14235187327500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14235187571000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14235187810500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14235188017000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14240340342500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14240340582000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14246517945500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14246518185000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14256052185500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14256052714000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14256052957500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14256053197000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14256053403500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14267019457500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14267019664000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14276718921000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14276719431500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14276719666000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14276719896500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14276720103000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14292023524000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14292024562000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14292024768500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14297044932500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14297045442000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14297045676000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14297045906000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14297046112500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14313983409500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14313983919000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14313984153000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14313984383000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14313984589500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14376592133500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14376592349000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14434071886000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14434072706000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14434072954500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14434073170000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14562296155000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562381650500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14562381898500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14562382116000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562382402000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf1 +warn: 14562382961000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562383216500: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x93 +warn: 14562383439500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562383728500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562384237500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562385304500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562385789500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14562386108000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563103347000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563103608000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x42 +warn: 14563103812500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563174588000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91 +warn: 14563174798000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563175069000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf1 +warn: 14563175639500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563175895000: Instruction results do not match! (Values may not actually be integers) Inst: 0x90, checker: 0x91 +warn: 14563176118500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563176407500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563176916500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563177979500: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563178471000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14563178773000: Instruction results do not match! (Values may not actually be integers) Inst: 0xf0, checker: 0xf3 +warn: 14611314421000: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1 +warn: 14611314697500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14611314949500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14611315194000: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14611315463500: Instruction results do not match! (Values may not actually be integers) Inst: 0x40, checker: 0x41 +warn: 14611315702500: Instruction results do not match! (Values may not actually be integers) Inst: 0, checker: 0x1 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout index 4029bb1c2..2ecb92535 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/simout @@ -1,17 +1,18 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:18:22 -gem5 started Oct 29 2014 10:38:57 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 14:36:18 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-checker + Selected 64-bit ARM architecture, updating default disk image... Global frequency set at 1000000000000 ticks per second -info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 - 0: system.cpu.checker.isa: ISA system set to: 0x48ecb00 0x48ecb00 - 0: system.cpu.isa: ISA system set to: 0x48ecb00 0x48ecb00 +info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 + 0: system.cpu.checker.isa: ISA system set to: 0x35ea180 0x35ea180 + 0: system.cpu.isa: ISA system set to: 0x35ea180 0x35ea180 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80080000 -info: Loading DTB file: /projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 +info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 51557114994500 because m5_exit instruction encountered +Exiting @ tick 51320468905000 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/stats.txt index efb9175e6..ace9880b6 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/stats.txt @@ -4,11 +4,11 @@ sim_seconds 51.320469 # Nu sim_ticks 51320468905000 # Number of ticks simulated final_tick 51320468905000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 78766 # Simulator instruction rate (inst/s) -host_op_rate 92549 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 4725007878 # Simulator tick rate (ticks/s) -host_mem_usage 722788 # Number of bytes of host memory used -host_seconds 10861.46 # Real time elapsed on the host +host_inst_rate 88986 # Simulator instruction rate (inst/s) +host_op_rate 104557 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5338089020 # Simulator tick rate (ticks/s) +host_mem_usage 657992 # Number of bytes of host memory used +host_seconds 9614.02 # Real time elapsed on the host sim_insts 855512158 # Number of instructions simulated sim_ops 1005211605 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -767,7 +767,7 @@ system.cpu.iq.iqInstsAdded 1038303468 # Nu system.cpu.iq.iqNonSpecInstsAdded 27624460 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 1054196021 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 3299994 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 53804457 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 60716319 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 33847358 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 315461 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 1530420621 # Number of insts issued each cycle @@ -860,10 +860,10 @@ system.cpu.iq.rate 0.666896 # In system.cpu.iq.fu_busy_cnt 165876174 # FU busy when requested system.cpu.iq.fu_busy_rate 0.157349 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 3805514237 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 1118931433 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 1125839347 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 1036122901 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 2474593 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 942754 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 946702 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 909865 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 1218517790 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 1554348 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/system.terminal index 3a264e168..671c12990 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/system.terminal @@ -32,135 +32,135 @@ [ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] Architected cp15 timer(s) running at 100.00MHz (phys).
[ 0.000000] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 2748779069440ns
-[ 0.000018] Console: colour dummy device 80x25
-[ 0.000020] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
-[ 0.000021] pid_max: default: 32768 minimum: 301
+[ 0.000019] Console: colour dummy device 80x25
+[ 0.000021] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
+[ 0.000022] pid_max: default: 32768 minimum: 301
[ 0.000031] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000032] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000117] hw perfevents: no hardware support available
+[ 0.000033] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000120] hw perfevents: no hardware support available
[ 1.060065] CPU1: failed to come online
[ 2.080127] CPU2: failed to come online
[ 3.100189] CPU3: failed to come online
-[ 3.100191] Brought up 1 CPUs
-[ 3.100192] SMP: Total of 1 processors activated.
-[ 3.100238] devtmpfs: initialized
-[ 3.100703] atomic64_test: passed
-[ 3.100741] regulator-dummy: no parameters
-[ 3.101092] NET: Registered protocol family 16
-[ 3.101209] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
-[ 3.101216] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
-[ 3.101375] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
-[ 3.101377] Serial: AMBA PL011 UART driver
-[ 3.101527] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
-[ 3.101555] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
-[ 3.102087] console [ttyAMA0] enabled
-[ 3.102142] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
-[ 3.102172] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
-[ 3.102202] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
-[ 3.102230] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
-[ 3.130466] 3V3: 3300 mV
-[ 3.130502] vgaarb: loaded
-[ 3.130544] SCSI subsystem initialized
-[ 3.130580] libata version 3.00 loaded.
-[ 3.130622] usbcore: registered new interface driver usbfs
-[ 3.130638] usbcore: registered new interface driver hub
-[ 3.130668] usbcore: registered new device driver usb
-[ 3.130692] pps_core: LinuxPPS API ver. 1 registered
-[ 3.130701] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
-[ 3.130718] PTP clock support registered
-[ 3.130823] Switched to clocksource arch_sys_counter
-[ 3.131812] NET: Registered protocol family 2
-[ 3.131877] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
-[ 3.131892] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
-[ 3.131910] TCP: Hash tables configured (established 2048 bind 2048)
-[ 3.131925] TCP: reno registered
-[ 3.131931] UDP hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131944] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131977] NET: Registered protocol family 1
-[ 3.132021] RPC: Registered named UNIX socket transport module.
-[ 3.132031] RPC: Registered udp transport module.
-[ 3.132039] RPC: Registered tcp transport module.
-[ 3.132046] RPC: Registered tcp NFSv4.1 backchannel transport module.
-[ 3.132058] PCI: CLS 0 bytes, default 64
-[ 3.132196] futex hash table entries: 1024 (order: 4, 65536 bytes)
-[ 3.132285] HugeTLB registered 2 MB page size, pre-allocated 0 pages
-[ 3.133917] fuse init (API version 7.23)
-[ 3.133997] msgmni has been set to 469
-[ 3.136058] io scheduler noop registered
-[ 3.136109] io scheduler cfq registered (default)
-[ 3.136437] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
-[ 3.136449] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
-[ 3.136460] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
-[ 3.136471] pci_bus 0000:00: root bus resource [bus 00-ff]
-[ 3.136481] pci_bus 0000:00: scanning bus
-[ 3.136490] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
-[ 3.136502] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
-[ 3.136515] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.136549] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
-[ 3.136561] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
-[ 3.136571] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
-[ 3.136581] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
-[ 3.136591] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
-[ 3.136601] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
-[ 3.136612] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.136645] pci_bus 0000:00: fixups for bus
-[ 3.136653] pci_bus 0000:00: bus scan returning with max=00
-[ 3.136664] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
-[ 3.136680] pci 0000:00:00.0: fixup irq: got 33
-[ 3.136688] pci 0000:00:00.0: assigning IRQ 33
-[ 3.136698] pci 0000:00:01.0: fixup irq: got 34
-[ 3.136706] pci 0000:00:01.0: assigning IRQ 34
-[ 3.136716] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
-[ 3.136728] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
-[ 3.136741] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
-[ 3.136753] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
-[ 3.136764] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
-[ 3.136774] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
-[ 3.136785] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
-[ 3.136796] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
-[ 3.137238] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-[ 3.137470] ata_piix 0000:00:01.0: version 2.13
-[ 3.137479] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
-[ 3.137497] ata_piix 0000:00:01.0: enabling bus mastering
-[ 3.137745] scsi0 : ata_piix
-[ 3.137833] scsi1 : ata_piix
-[ 3.137862] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
-[ 3.137874] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
-[ 3.137967] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
-[ 3.137978] e1000: Copyright (c) 1999-2006 Intel Corporation.
-[ 3.137992] e1000 0000:00:00.0: enabling device (0000 -> 0002)
-[ 3.138003] e1000 0000:00:00.0: enabling bus mastering
-[ 3.290845] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
-[ 3.290854] ata1.00: 2096640 sectors, multi 0: LBA
-[ 3.290879] ata1.00: configured for UDMA/33
-[ 3.290918] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
-[ 3.291021] sd 0:0:0:0: Attached scsi generic sg0 type 0
-[ 3.291044] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
-[ 3.291080] sd 0:0:0:0: [sda] Write Protect is off
-[ 3.291088] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
-[ 3.291107] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
-[ 3.291217] sda: sda1
-[ 3.291322] sd 0:0:0:0: [sda] Attached SCSI disk
-[ 3.411114] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
-[ 3.411126] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
-[ 3.411145] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
-[ 3.411155] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
-[ 3.411174] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
-[ 3.411185] igb: Copyright (c) 2007-2014 Intel Corporation.
-[ 3.411250] usbcore: registered new interface driver usb-storage
-[ 3.411299] mousedev: PS/2 mouse device common for all mice
-[ 3.411439] usbcore: registered new interface driver usbhid
-[ 3.411448] usbhid: USB HID core driver
-[ 3.411475] TCP: cubic registered
-[ 3.411481] NET: Registered protocol family 17
- -[ 3.411814] devtmpfs: mounted
+[ 3.100192] Brought up 1 CPUs
+[ 3.100193] SMP: Total of 1 processors activated.
+[ 3.100239] devtmpfs: initialized
+[ 3.100662] atomic64_test: passed
+[ 3.100699] regulator-dummy: no parameters
+[ 3.101056] NET: Registered protocol family 16
+[ 3.101171] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
+[ 3.101179] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
+[ 3.101397] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
+[ 3.101401] Serial: AMBA PL011 UART driver
+[ 3.101568] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
+[ 3.101599] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
+[ 3.102135] console [ttyAMA0] enabled
+[ 3.102203] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
+[ 3.102233] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
+[ 3.102264] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
+[ 3.102292] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
+[ 3.130476] 3V3: 3300 mV
+[ 3.130514] vgaarb: loaded
+[ 3.130556] SCSI subsystem initialized
+[ 3.130592] libata version 3.00 loaded.
+[ 3.130632] usbcore: registered new interface driver usbfs
+[ 3.130649] usbcore: registered new interface driver hub
+[ 3.130678] usbcore: registered new device driver usb
+[ 3.130702] pps_core: LinuxPPS API ver. 1 registered
+[ 3.130710] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+[ 3.130727] PTP clock support registered
+[ 3.130832] Switched to clocksource arch_sys_counter
+[ 3.131787] NET: Registered protocol family 2
+[ 3.131853] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
+[ 3.131868] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
+[ 3.131886] TCP: Hash tables configured (established 2048 bind 2048)
+[ 3.131900] TCP: reno registered
+[ 3.131907] UDP hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131920] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131953] NET: Registered protocol family 1
+[ 3.131998] RPC: Registered named UNIX socket transport module.
+[ 3.132008] RPC: Registered udp transport module.
+[ 3.132015] RPC: Registered tcp transport module.
+[ 3.132023] RPC: Registered tcp NFSv4.1 backchannel transport module.
+[ 3.132035] PCI: CLS 0 bytes, default 64
+[ 3.132170] futex hash table entries: 1024 (order: 4, 65536 bytes)
+[ 3.132259] HugeTLB registered 2 MB page size, pre-allocated 0 pages
+[ 3.133755] fuse init (API version 7.23)
+[ 3.133830] msgmni has been set to 469
+[ 3.135876] io scheduler noop registered
+[ 3.135924] io scheduler cfq registered (default)
+[ 3.136253] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
+[ 3.136265] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
+[ 3.136276] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
+[ 3.136288] pci_bus 0000:00: root bus resource [bus 00-ff]
+[ 3.136297] pci_bus 0000:00: scanning bus
+[ 3.136307] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
+[ 3.136319] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
+[ 3.136332] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.136366] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
+[ 3.136377] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
+[ 3.136387] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
+[ 3.136397] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
+[ 3.136408] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
+[ 3.136418] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
+[ 3.136428] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.136460] pci_bus 0000:00: fixups for bus
+[ 3.136468] pci_bus 0000:00: bus scan returning with max=00
+[ 3.136479] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
+[ 3.136497] pci 0000:00:00.0: fixup irq: got 33
+[ 3.136505] pci 0000:00:00.0: assigning IRQ 33
+[ 3.136514] pci 0000:00:01.0: fixup irq: got 34
+[ 3.136522] pci 0000:00:01.0: assigning IRQ 34
+[ 3.136533] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
+[ 3.136545] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
+[ 3.136557] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
+[ 3.136570] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
+[ 3.136580] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
+[ 3.136591] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
+[ 3.136602] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
+[ 3.136613] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
+[ 3.137039] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+[ 3.137263] ata_piix 0000:00:01.0: version 2.13
+[ 3.137273] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
+[ 3.137291] ata_piix 0000:00:01.0: enabling bus mastering
+[ 3.137539] scsi0 : ata_piix
+[ 3.137625] scsi1 : ata_piix
+[ 3.137652] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
+[ 3.137663] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
+[ 3.137754] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
+[ 3.137765] e1000: Copyright (c) 1999-2006 Intel Corporation.
+[ 3.137780] e1000 0000:00:00.0: enabling device (0000 -> 0002)
+[ 3.137791] e1000 0000:00:00.0: enabling bus mastering
+[ 3.290854] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
+[ 3.290863] ata1.00: 2096640 sectors, multi 0: LBA
+[ 3.290888] ata1.00: configured for UDMA/33
+[ 3.290928] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
+[ 3.291027] sd 0:0:0:0: Attached scsi generic sg0 type 0
+[ 3.291049] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
+[ 3.291085] sd 0:0:0:0: [sda] Write Protect is off
+[ 3.291094] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+[ 3.291113] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
+[ 3.291218] sda: sda1
+[ 3.291320] sd 0:0:0:0: [sda] Attached SCSI disk
+[ 3.411119] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
+[ 3.411132] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
+[ 3.411151] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
+[ 3.411161] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
+[ 3.411179] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
+[ 3.411190] igb: Copyright (c) 2007-2014 Intel Corporation.
+[ 3.411252] usbcore: registered new interface driver usb-storage
+[ 3.411300] mousedev: PS/2 mouse device common for all mice
+[ 3.411434] usbcore: registered new interface driver usbhid
+[ 3.411443] usbhid: USB HID core driver
+[ 3.411470] TCP: cubic registered
+[ 3.411477] NET: Registered protocol family 17
+ +[ 3.411812] devtmpfs: mounted
[ 3.411835] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
-[ 3.450268] udevd[607]: starting version 182
+[ 3.450156] udevd[607]: starting version 182
Starting Bootlog daemon: bootlogd.
-[ 3.603357] random: dd urandom read with 21 bits of entropy available
+[ 3.543301] random: dd urandom read with 19 bits of entropy available
Populating dev cache
net.ipv4.conf.default.rp_filter = 1
net.ipv4.conf.all.rp_filter = 1
@@ -168,8 +168,8 @@ hwclock: can't open '/dev/misc/rtc': No such file or directory Mon Jan 27 08:00:00 UTC 2014
hwclock: can't open '/dev/misc/rtc': No such file or directory
INIT: Entering runlevel: 5
-Configuring network interfaces... udhcpc (v1.21.1) started
-[ 3.741050] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+Configuring network interfaces... [ 3.671060] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+udhcpc (v1.21.1) started
Sending discover...
Sending discover...
Sending discover...
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini index 7c36695c6..05f59cec5 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=134217728 -boot_loader=/projects/pd/randd/dist/binaries/boot_emm.arm64 +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm64 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM64 mem_mode=timing mem_ranges=2147483648:2415919103 -memories=system.realview.nvmem system.physmem system.realview.vram +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.latest/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/projects/pd/randd/dist/disks/linaro-minimal-aarch64.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linaro-minimal-aarch64.img read_only=true [system.clk_domain] @@ -189,7 +190,7 @@ dcache_port=system.cpu0.dcache.cpu_side icache_port=system.cpu0.icache.cpu_side [system.cpu0.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -199,11 +200,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu0.dcache] type=BaseCache @@ -211,6 +208,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -245,6 +243,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.dtb [system.cpu0.dstage2_mmu.stage2_tlb] @@ -262,7 +261,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu0.toL2Bus.slave[5] [system.cpu0.dtb] type=ArmTLB @@ -552,8 +550,9 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -620,6 +619,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.itb [system.cpu0.istage2_mmu.stage2_tlb] @@ -637,7 +637,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu0.toL2Bus.slave[4] [system.cpu0.itb] type=ArmTLB @@ -662,6 +661,7 @@ children=prefetcher tags addr_ranges=0:18446744073709551615 assoc=16 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=12 @@ -683,19 +683,27 @@ mem_side=system.toL2Bus.slave[0] [system.cpu0.l2cache.prefetcher] type=StridePrefetcher +cache_snoop=false clk_domain=system.cpu_clk_domain -cross_pages=false -data_accesses_only=false degree=8 eventq_index=0 -inst_tagged=true latency=1 -on_miss_only=false -on_prefetch=true -on_read_only=false -serial_squash=false -size=100 +max_conf=7 +min_conf=0 +on_data=true +on_inst=true +on_miss=false +on_read=true +on_write=true +queue_filter=true +queue_size=32 +queue_squash=true +start_conf=4 sys=system +table_assoc=4 +table_sets=16 +tag_prefetch=true +thresh_conf=4 use_master_id=true [system.cpu0.l2cache.tags] @@ -712,13 +720,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu0.l2cache.cpu_side -slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port [system.cpu0.tracer] type=ExeTracer @@ -816,7 +827,7 @@ dcache_port=system.cpu1.dcache.cpu_side icache_port=system.cpu1.icache.cpu_side [system.cpu1.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -826,11 +837,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu1.dcache] type=BaseCache @@ -838,6 +845,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -872,6 +880,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.dtb [system.cpu1.dstage2_mmu.stage2_tlb] @@ -889,7 +898,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu1.toL2Bus.slave[5] [system.cpu1.dtb] type=ArmTLB @@ -1179,8 +1187,9 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -1247,6 +1256,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.itb [system.cpu1.istage2_mmu.stage2_tlb] @@ -1264,7 +1274,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu1.toL2Bus.slave[4] [system.cpu1.itb] type=ArmTLB @@ -1289,6 +1298,7 @@ children=prefetcher tags addr_ranges=0:18446744073709551615 assoc=16 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=12 @@ -1310,19 +1320,27 @@ mem_side=system.toL2Bus.slave[1] [system.cpu1.l2cache.prefetcher] type=StridePrefetcher +cache_snoop=false clk_domain=system.cpu_clk_domain -cross_pages=false -data_accesses_only=false degree=8 eventq_index=0 -inst_tagged=true latency=1 -on_miss_only=false -on_prefetch=true -on_read_only=false -serial_squash=false -size=100 +max_conf=7 +min_conf=0 +on_data=true +on_inst=true +on_miss=false +on_read=true +on_write=true +queue_filter=true +queue_size=32 +queue_squash=true +start_conf=4 sys=system +table_assoc=4 +table_sets=16 +tag_prefetch=true +thresh_conf=4 use_master_id=true [system.cpu1.l2cache.tags] @@ -1339,13 +1357,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu1.l2cache.cpu_side -slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.istage2_mmu.stage2_tlb.walker.port system.cpu1.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port [system.cpu1.tracer] type=ExeTracer @@ -1376,9 +1397,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -1389,6 +1412,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -1424,6 +1448,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -1458,13 +1483,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -1512,7 +1540,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1816,7 +1844,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -2003,7 +2030,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -2185,7 +2212,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory @@ -2223,11 +2250,14 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simerr index bbb1cd360..fa6d20798 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simerr @@ -7,6 +7,6 @@ warn: Existing EnergyCtrl, but no enabled DVFSHandler found. warn: SCReg: Writing 0 to dcc0:site0:pos0:fn7:dev0 warn: Tried to read RealView I/O at offset 0x60 that doesn't exist warn: Tried to read RealView I/O at offset 0x48 that doesn't exist -warn: allocating bonus target for snoop warn: Tried to read RealView I/O at offset 0x8 that doesn't exist warn: Tried to read RealView I/O at offset 0x48 that doesn't exist +warn: allocating bonus target for snoop diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simout index c9871ea6d..3913964ad 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/simout @@ -1,17 +1,18 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:18:22 -gem5 started Oct 29 2014 11:56:54 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 13:01:24 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3-dual + Selected 64-bit ARM architecture, updating default disk image... Global frequency set at 1000000000000 ticks per second -info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 - 0: system.cpu0.isa: ISA system set to: 0x5878b00 0x5878b00 - 0: system.cpu1.isa: ISA system set to: 0x5878b00 0x5878b00 +info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 + 0: system.cpu0.isa: ISA system set to: 0x305baa0 0x305baa0 + 0: system.cpu1.isa: ISA system set to: 0x305baa0 0x305baa0 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80080000 -info: Loading DTB file: /projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 +info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 47379674621500 because m5_exit instruction encountered +Exiting @ tick 47305566199500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/stats.txt index 8729ed0b6..417d3b817 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 47.305566 # Nu sim_ticks 47305566199500 # Number of ticks simulated final_tick 47305566199500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 109110 # Simulator instruction rate (inst/s) -host_op_rate 128307 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5804669404 # Simulator tick rate (ticks/s) -host_mem_usage 767140 # Number of bytes of host memory used -host_seconds 8149.57 # Real time elapsed on the host +host_inst_rate 108918 # Simulator instruction rate (inst/s) +host_op_rate 128082 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5794473291 # Simulator tick rate (ticks/s) +host_mem_usage 707548 # Number of bytes of host memory used +host_seconds 8163.91 # Real time elapsed on the host sim_insts 889196991 # Number of instructions simulated sim_ops 1045647845 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -640,7 +640,7 @@ system.cpu0.iq.iqInstsAdded 585335843 # Nu system.cpu0.iq.iqNonSpecInstsAdded 14506928 # Number of non-speculative instructions added to the IQ system.cpu0.iq.iqInstsIssued 587846614 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 2739409 # Number of squashed instructions issued -system.cpu0.iq.iqSquashedInstsExamined 51306825 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu0.iq.iqSquashedInstsExamined 54557687 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu0.iq.iqSquashedOperandsExamined 35502721 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 263475 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 706084889 # Number of insts issued each cycle @@ -733,10 +733,10 @@ system.cpu0.iq.rate 0.806867 # In system.cpu0.iq.fu_busy_cnt 134946779 # FU busy when requested system.cpu0.iq.fu_busy_rate 0.229561 # FU busy rate (busy events/executed inst) system.cpu0.iq.int_inst_queue_reads 2018256641 # Number of integer instruction queue reads -system.cpu0.iq.int_inst_queue_writes 650811943 # Number of integer instruction queue writes +system.cpu0.iq.int_inst_queue_writes 654059965 # Number of integer instruction queue writes system.cpu0.iq.int_inst_queue_wakeup_accesses 571438682 # Number of integer instruction queue wakeup accesses system.cpu0.iq.fp_inst_queue_reads 1207660 # Number of floating instruction queue reads -system.cpu0.iq.fp_inst_queue_writes 476069 # Number of floating instruction queue writes +system.cpu0.iq.fp_inst_queue_writes 478909 # Number of floating instruction queue writes system.cpu0.iq.fp_inst_queue_wakeup_accesses 443638 # Number of floating instruction queue wakeup accesses system.cpu0.iq.int_alu_accesses 722040340 # Number of integer alu accesses system.cpu0.iq.fp_alu_accesses 753051 # Number of floating point alu accesses @@ -1888,7 +1888,7 @@ system.cpu1.iq.iqInstsAdded 535459998 # Nu system.cpu1.iq.iqNonSpecInstsAdded 14979383 # Number of non-speculative instructions added to the IQ system.cpu1.iq.iqInstsIssued 539826932 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 2475624 # Number of squashed instructions issued -system.cpu1.iq.iqSquashedInstsExamined 46992661 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu1.iq.iqSquashedInstsExamined 50076597 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu1.iq.iqSquashedOperandsExamined 32301398 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 273094 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 643136774 # Number of insts issued each cycle @@ -1981,10 +1981,10 @@ system.cpu1.iq.rate 0.818910 # In system.cpu1.iq.fu_busy_cnt 122894739 # FU busy when requested system.cpu1.iq.fu_busy_rate 0.227656 # FU busy rate (busy events/executed inst) system.cpu1.iq.int_inst_queue_reads 1846883379 # Number of integer instruction queue reads -system.cpu1.iq.int_inst_queue_writes 597058317 # Number of integer instruction queue writes +system.cpu1.iq.int_inst_queue_writes 600138356 # Number of integer instruction queue writes system.cpu1.iq.int_inst_queue_wakeup_accesses 524462260 # Number of integer instruction queue wakeup accesses system.cpu1.iq.fp_inst_queue_reads 1277620 # Number of floating instruction queue reads -system.cpu1.iq.fp_inst_queue_writes 514947 # Number of floating instruction queue writes +system.cpu1.iq.fp_inst_queue_writes 518844 # Number of floating instruction queue writes system.cpu1.iq.fp_inst_queue_wakeup_accesses 476158 # Number of floating instruction queue wakeup accesses system.cpu1.iq.int_alu_accesses 661932910 # Number of integer alu accesses system.cpu1.iq.fp_alu_accesses 788750 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/system.terminal index 76059ddbc..106828a6d 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/system.terminal @@ -32,135 +32,135 @@ [ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] Architected cp15 timer(s) running at 100.00MHz (phys).
[ 0.000000] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 2748779069440ns
-[ 0.000013] Console: colour dummy device 80x25
-[ 0.000014] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
-[ 0.000015] pid_max: default: 32768 minimum: 301
-[ 0.000022] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000023] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000089] hw perfevents: no hardware support available
-[ 0.060023] CPU1: Booted secondary processor
-[ 1.080047] CPU2: failed to come online
-[ 2.100092] CPU3: failed to come online
-[ 2.100094] Brought up 2 CPUs
-[ 2.100095] SMP: Total of 2 processors activated.
-[ 2.100128] devtmpfs: initialized
-[ 2.100481] atomic64_test: passed
-[ 2.100508] regulator-dummy: no parameters
-[ 2.100743] NET: Registered protocol family 16
-[ 2.100826] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
-[ 2.100832] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
-[ 2.100987] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
-[ 2.100989] Serial: AMBA PL011 UART driver
-[ 2.101098] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
-[ 2.101119] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
-[ 2.101667] console [ttyAMA0] enabled
-[ 2.101715] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
-[ 2.101742] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
-[ 2.101769] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
-[ 2.101795] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
-[ 2.140191] 3V3: 3300 mV
-[ 2.140222] vgaarb: loaded
-[ 2.140252] SCSI subsystem initialized
-[ 2.140281] libata version 3.00 loaded.
-[ 2.140314] usbcore: registered new interface driver usbfs
-[ 2.140329] usbcore: registered new interface driver hub
-[ 2.140353] usbcore: registered new device driver usb
-[ 2.140373] pps_core: LinuxPPS API ver. 1 registered
-[ 2.140381] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
-[ 2.140399] PTP clock support registered
-[ 2.140483] Switched to clocksource arch_sys_counter
-[ 2.141463] NET: Registered protocol family 2
-[ 2.141511] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
-[ 2.141525] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
-[ 2.141539] TCP: Hash tables configured (established 2048 bind 2048)
-[ 2.141554] TCP: reno registered
-[ 2.141560] UDP hash table entries: 256 (order: 1, 8192 bytes)
-[ 2.141571] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
-[ 2.141596] NET: Registered protocol family 1
-[ 2.141634] RPC: Registered named UNIX socket transport module.
-[ 2.141644] RPC: Registered udp transport module.
-[ 2.141652] RPC: Registered tcp transport module.
-[ 2.141660] RPC: Registered tcp NFSv4.1 backchannel transport module.
-[ 2.141671] PCI: CLS 0 bytes, default 64
-[ 2.141775] futex hash table entries: 1024 (order: 4, 65536 bytes)
-[ 2.141842] HugeTLB registered 2 MB page size, pre-allocated 0 pages
-[ 2.143024] fuse init (API version 7.23)
-[ 2.143086] msgmni has been set to 469
-[ 2.143317] io scheduler noop registered
-[ 2.143357] io scheduler cfq registered (default)
-[ 2.143581] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
-[ 2.143593] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
-[ 2.143603] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
-[ 2.143615] pci_bus 0000:00: root bus resource [bus 00-ff]
-[ 2.143624] pci_bus 0000:00: scanning bus
-[ 2.143633] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
-[ 2.143644] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
-[ 2.143657] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 2.143684] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
-[ 2.143695] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
-[ 2.143705] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
-[ 2.143715] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
-[ 2.143725] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
-[ 2.143735] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
-[ 2.143745] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 2.143773] pci_bus 0000:00: fixups for bus
-[ 2.143780] pci_bus 0000:00: bus scan returning with max=00
-[ 2.143791] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
-[ 2.143806] pci 0000:00:00.0: fixup irq: got 33
-[ 2.143814] pci 0000:00:00.0: assigning IRQ 33
-[ 2.143823] pci 0000:00:01.0: fixup irq: got 34
-[ 2.143831] pci 0000:00:01.0: assigning IRQ 34
-[ 2.143840] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
-[ 2.143852] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
-[ 2.143864] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
-[ 2.143876] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
-[ 2.143886] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
-[ 2.143897] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
-[ 2.143907] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
-[ 2.143918] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
-[ 2.144227] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-[ 2.144396] ata_piix 0000:00:01.0: version 2.13
-[ 2.144405] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
-[ 2.144421] ata_piix 0000:00:01.0: enabling bus mastering
-[ 2.144591] scsi0 : ata_piix
-[ 2.144642] scsi1 : ata_piix
-[ 2.144665] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
-[ 2.144676] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
-[ 2.144749] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
-[ 2.144761] e1000: Copyright (c) 1999-2006 Intel Corporation.
-[ 2.144773] e1000 0000:00:00.0: enabling device (0000 -> 0002)
-[ 2.144784] e1000 0000:00:00.0: enabling bus mastering
-[ 2.290504] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
-[ 2.290514] ata1.00: 2096640 sectors, multi 0: LBA
-[ 2.290536] ata1.00: configured for UDMA/33
-[ 2.290567] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
-[ 2.290643] sd 0:0:0:0: Attached scsi generic sg0 type 0
-[ 2.290644] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
-[ 2.290661] sd 0:0:0:0: [sda] Write Protect is off
-[ 2.290661] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
-[ 2.290669] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
-[ 2.290760] sda: sda1
-[ 2.290840] sd 0:0:0:0: [sda] Attached SCSI disk
-[ 2.410758] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
-[ 2.410769] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
-[ 2.410788] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
-[ 2.410798] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
-[ 2.410814] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
-[ 2.410826] igb: Copyright (c) 2007-2014 Intel Corporation.
-[ 2.410876] usbcore: registered new interface driver usb-storage
-[ 2.410921] mousedev: PS/2 mouse device common for all mice
-[ 2.411032] usbcore: registered new interface driver usbhid
-[ 2.411041] usbhid: USB HID core driver
-[ 2.411064] TCP: cubic registered
-[ 2.411070] NET: Registered protocol family 17
- -[ 2.411367] devtmpfs: mounted
-[ 2.411386] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
+[ 0.000015] Console: colour dummy device 80x25
+[ 0.000017] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
+[ 0.000018] pid_max: default: 32768 minimum: 301
+[ 0.000025] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000026] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000102] hw perfevents: no hardware support available
+[ 0.060025] CPU1: Booted secondary processor
+[ 1.080050] CPU2: failed to come online
+[ 2.100095] CPU3: failed to come online
+[ 2.100098] Brought up 2 CPUs
+[ 2.100098] SMP: Total of 2 processors activated.
+[ 2.100138] devtmpfs: initialized
+[ 2.100444] atomic64_test: passed
+[ 2.100472] regulator-dummy: no parameters
+[ 2.100696] NET: Registered protocol family 16
+[ 2.100779] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
+[ 2.100786] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
+[ 2.100981] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
+[ 2.100984] Serial: AMBA PL011 UART driver
+[ 2.101110] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
+[ 2.101135] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
+[ 2.101687] console [ttyAMA0] enabled
+[ 2.101755] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
+[ 2.101783] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
+[ 2.101810] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
+[ 2.101836] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
+[ 2.140205] 3V3: 3300 mV
+[ 2.140237] vgaarb: loaded
+[ 2.140268] SCSI subsystem initialized
+[ 2.140296] libata version 3.00 loaded.
+[ 2.140328] usbcore: registered new interface driver usbfs
+[ 2.140342] usbcore: registered new interface driver hub
+[ 2.140362] usbcore: registered new device driver usb
+[ 2.140381] pps_core: LinuxPPS API ver. 1 registered
+[ 2.140390] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+[ 2.140408] PTP clock support registered
+[ 2.140494] Switched to clocksource arch_sys_counter
+[ 2.141571] NET: Registered protocol family 2
+[ 2.141633] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
+[ 2.141647] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
+[ 2.141662] TCP: Hash tables configured (established 2048 bind 2048)
+[ 2.141678] TCP: reno registered
+[ 2.141685] UDP hash table entries: 256 (order: 1, 8192 bytes)
+[ 2.141696] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+[ 2.141722] NET: Registered protocol family 1
+[ 2.141756] RPC: Registered named UNIX socket transport module.
+[ 2.141766] RPC: Registered udp transport module.
+[ 2.141774] RPC: Registered tcp transport module.
+[ 2.141782] RPC: Registered tcp NFSv4.1 backchannel transport module.
+[ 2.141794] PCI: CLS 0 bytes, default 64
+[ 2.141902] futex hash table entries: 1024 (order: 4, 65536 bytes)
+[ 2.141968] HugeTLB registered 2 MB page size, pre-allocated 0 pages
+[ 2.143005] fuse init (API version 7.23)
+[ 2.143061] msgmni has been set to 469
+[ 2.143642] io scheduler noop registered
+[ 2.143678] io scheduler cfq registered (default)
+[ 2.143908] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
+[ 2.143920] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
+[ 2.143930] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
+[ 2.143942] pci_bus 0000:00: root bus resource [bus 00-ff]
+[ 2.143952] pci_bus 0000:00: scanning bus
+[ 2.143961] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
+[ 2.143973] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
+[ 2.143986] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 2.144013] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
+[ 2.144024] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
+[ 2.144034] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
+[ 2.144044] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
+[ 2.144054] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
+[ 2.144064] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
+[ 2.144074] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 2.144101] pci_bus 0000:00: fixups for bus
+[ 2.144108] pci_bus 0000:00: bus scan returning with max=00
+[ 2.144119] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
+[ 2.144135] pci 0000:00:00.0: fixup irq: got 33
+[ 2.144143] pci 0000:00:00.0: assigning IRQ 33
+[ 2.144152] pci 0000:00:01.0: fixup irq: got 34
+[ 2.144160] pci 0000:00:01.0: assigning IRQ 34
+[ 2.144170] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
+[ 2.144182] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
+[ 2.144195] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
+[ 2.144207] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
+[ 2.144217] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
+[ 2.144228] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
+[ 2.144239] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
+[ 2.144249] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
+[ 2.144543] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+[ 2.144706] ata_piix 0000:00:01.0: version 2.13
+[ 2.144715] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
+[ 2.144733] ata_piix 0000:00:01.0: enabling bus mastering
+[ 2.144903] scsi0 : ata_piix
+[ 2.144950] scsi1 : ata_piix
+[ 2.144971] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
+[ 2.144983] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
+[ 2.145053] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
+[ 2.145065] e1000: Copyright (c) 1999-2006 Intel Corporation.
+[ 2.145077] e1000 0000:00:00.0: enabling device (0000 -> 0002)
+[ 2.145088] e1000 0000:00:00.0: enabling bus mastering
+[ 2.290511] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
+[ 2.290521] ata1.00: 2096640 sectors, multi 0: LBA
+[ 2.290544] ata1.00: configured for UDMA/33
+[ 2.290580] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
+[ 2.290654] sd 0:0:0:0: Attached scsi generic sg0 type 0
+[ 2.290656] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
+[ 2.290672] sd 0:0:0:0: [sda] Write Protect is off
+[ 2.290673] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+[ 2.290680] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
+[ 2.290769] sda: sda1
+[ 2.290844] sd 0:0:0:0: [sda] Attached SCSI disk
+[ 2.410782] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
+[ 2.410795] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
+[ 2.410817] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
+[ 2.410828] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
+[ 2.410848] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
+[ 2.410861] igb: Copyright (c) 2007-2014 Intel Corporation.
+[ 2.410941] usbcore: registered new interface driver usb-storage
+[ 2.410988] mousedev: PS/2 mouse device common for all mice
+[ 2.411093] usbcore: registered new interface driver usbhid
+[ 2.411103] usbhid: USB HID core driver
+[ 2.411126] TCP: cubic registered
+[ 2.411133] NET: Registered protocol family 17
+ +[ 2.411442] devtmpfs: mounted
+[ 2.411462] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
-[ 2.447368] udevd[609]: starting version 182
+[ 2.447379] udevd[609]: starting version 182
Starting Bootlog daemon: bootlogd.
-[ 2.532352] random: dd urandom read with 18 bits of entropy available
+[ 2.532355] random: dd urandom read with 17 bits of entropy available
Populating dev cache
net.ipv4.conf.default.rp_filter = 1
net.ipv4.conf.all.rp_filter = 1
@@ -169,7 +169,7 @@ Mon Jan 27 08:00:00 UTC 2014 hwclock: can't open '/dev/misc/rtc': No such file or directory
INIT: Entering runlevel: 5
Configuring network interfaces... udhcpc (v1.21.1) started
-[ 2.640707] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+[ 2.640722] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
Sending discover...
Sending discover...
Sending discover...
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/config.ini index 53191049f..852c1bc63 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=134217728 -boot_loader=/projects/pd/randd/dist/binaries/boot_emm.arm64 +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm64 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM64 mem_mode=timing mem_ranges=2147483648:2415919103 -memories=system.realview.nvmem system.physmem system.realview.vram +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.latest/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/projects/pd/randd/dist/disks/linaro-minimal-aarch64.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linaro-minimal-aarch64.img read_only=true [system.clk_domain] @@ -189,7 +190,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -199,11 +200,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -211,6 +208,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -245,6 +243,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -262,7 +261,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -552,6 +550,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -620,6 +619,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -637,7 +637,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -662,6 +661,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -695,13 +695,16 @@ size=4194304 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -732,9 +735,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -745,6 +750,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -779,13 +785,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -833,7 +842,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1137,7 +1146,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -1324,7 +1332,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -1506,7 +1514,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simerr index 744db2c76..744db2c76 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simerr diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simout index ade67f17c..11e1245f8 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/simout @@ -1,16 +1,17 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:18:22 -gem5 started Oct 29 2014 10:37:59 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3 -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 12:58:50 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-o3 + Selected 64-bit ARM architecture, updating default disk image... Global frequency set at 1000000000000 ticks per second -info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 - 0: system.cpu.isa: ISA system set to: 0x43dfb00 0x43dfb00 +info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 + 0: system.cpu.isa: ISA system set to: 0x41ceb00 0x41ceb00 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80080000 -info: Loading DTB file: /projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 +info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 51557114994500 because m5_exit instruction encountered +Exiting @ tick 51320468905000 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/stats.txt index e43ffb8c7..b4cf0acf8 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 51.320469 # Nu sim_ticks 51320468905000 # Number of ticks simulated final_tick 51320468905000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 114377 # Simulator instruction rate (inst/s) -host_op_rate 134391 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 6861255780 # Simulator tick rate (ticks/s) -host_mem_usage 720736 # Number of bytes of host memory used -host_seconds 7479.75 # Real time elapsed on the host +host_inst_rate 112338 # Simulator instruction rate (inst/s) +host_op_rate 131995 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 6738935517 # Simulator tick rate (ticks/s) +host_mem_usage 657468 # Number of bytes of host memory used +host_seconds 7615.52 # Real time elapsed on the host sim_insts 855512158 # Number of instructions simulated sim_ops 1005211605 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -628,7 +628,7 @@ system.cpu.iq.iqInstsAdded 1038303468 # Nu system.cpu.iq.iqNonSpecInstsAdded 27624460 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 1054196021 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 3299994 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 53804457 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 60716319 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 33847358 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 315461 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 1530420621 # Number of insts issued each cycle @@ -721,10 +721,10 @@ system.cpu.iq.rate 0.666896 # In system.cpu.iq.fu_busy_cnt 165876174 # FU busy when requested system.cpu.iq.fu_busy_rate 0.157349 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 3805514237 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 1118931433 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 1125839347 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 1036122901 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 2474593 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 942754 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 946702 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 909865 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 1218517790 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 1554348 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/system.terminal index 3a264e168..671c12990 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3/system.terminal @@ -32,135 +32,135 @@ [ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] Architected cp15 timer(s) running at 100.00MHz (phys).
[ 0.000000] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 2748779069440ns
-[ 0.000018] Console: colour dummy device 80x25
-[ 0.000020] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
-[ 0.000021] pid_max: default: 32768 minimum: 301
+[ 0.000019] Console: colour dummy device 80x25
+[ 0.000021] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
+[ 0.000022] pid_max: default: 32768 minimum: 301
[ 0.000031] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000032] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000117] hw perfevents: no hardware support available
+[ 0.000033] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000120] hw perfevents: no hardware support available
[ 1.060065] CPU1: failed to come online
[ 2.080127] CPU2: failed to come online
[ 3.100189] CPU3: failed to come online
-[ 3.100191] Brought up 1 CPUs
-[ 3.100192] SMP: Total of 1 processors activated.
-[ 3.100238] devtmpfs: initialized
-[ 3.100703] atomic64_test: passed
-[ 3.100741] regulator-dummy: no parameters
-[ 3.101092] NET: Registered protocol family 16
-[ 3.101209] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
-[ 3.101216] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
-[ 3.101375] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
-[ 3.101377] Serial: AMBA PL011 UART driver
-[ 3.101527] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
-[ 3.101555] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
-[ 3.102087] console [ttyAMA0] enabled
-[ 3.102142] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
-[ 3.102172] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
-[ 3.102202] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
-[ 3.102230] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
-[ 3.130466] 3V3: 3300 mV
-[ 3.130502] vgaarb: loaded
-[ 3.130544] SCSI subsystem initialized
-[ 3.130580] libata version 3.00 loaded.
-[ 3.130622] usbcore: registered new interface driver usbfs
-[ 3.130638] usbcore: registered new interface driver hub
-[ 3.130668] usbcore: registered new device driver usb
-[ 3.130692] pps_core: LinuxPPS API ver. 1 registered
-[ 3.130701] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
-[ 3.130718] PTP clock support registered
-[ 3.130823] Switched to clocksource arch_sys_counter
-[ 3.131812] NET: Registered protocol family 2
-[ 3.131877] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
-[ 3.131892] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
-[ 3.131910] TCP: Hash tables configured (established 2048 bind 2048)
-[ 3.131925] TCP: reno registered
-[ 3.131931] UDP hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131944] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131977] NET: Registered protocol family 1
-[ 3.132021] RPC: Registered named UNIX socket transport module.
-[ 3.132031] RPC: Registered udp transport module.
-[ 3.132039] RPC: Registered tcp transport module.
-[ 3.132046] RPC: Registered tcp NFSv4.1 backchannel transport module.
-[ 3.132058] PCI: CLS 0 bytes, default 64
-[ 3.132196] futex hash table entries: 1024 (order: 4, 65536 bytes)
-[ 3.132285] HugeTLB registered 2 MB page size, pre-allocated 0 pages
-[ 3.133917] fuse init (API version 7.23)
-[ 3.133997] msgmni has been set to 469
-[ 3.136058] io scheduler noop registered
-[ 3.136109] io scheduler cfq registered (default)
-[ 3.136437] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
-[ 3.136449] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
-[ 3.136460] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
-[ 3.136471] pci_bus 0000:00: root bus resource [bus 00-ff]
-[ 3.136481] pci_bus 0000:00: scanning bus
-[ 3.136490] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
-[ 3.136502] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
-[ 3.136515] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.136549] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
-[ 3.136561] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
-[ 3.136571] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
-[ 3.136581] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
-[ 3.136591] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
-[ 3.136601] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
-[ 3.136612] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.136645] pci_bus 0000:00: fixups for bus
-[ 3.136653] pci_bus 0000:00: bus scan returning with max=00
-[ 3.136664] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
-[ 3.136680] pci 0000:00:00.0: fixup irq: got 33
-[ 3.136688] pci 0000:00:00.0: assigning IRQ 33
-[ 3.136698] pci 0000:00:01.0: fixup irq: got 34
-[ 3.136706] pci 0000:00:01.0: assigning IRQ 34
-[ 3.136716] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
-[ 3.136728] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
-[ 3.136741] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
-[ 3.136753] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
-[ 3.136764] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
-[ 3.136774] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
-[ 3.136785] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
-[ 3.136796] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
-[ 3.137238] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-[ 3.137470] ata_piix 0000:00:01.0: version 2.13
-[ 3.137479] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
-[ 3.137497] ata_piix 0000:00:01.0: enabling bus mastering
-[ 3.137745] scsi0 : ata_piix
-[ 3.137833] scsi1 : ata_piix
-[ 3.137862] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
-[ 3.137874] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
-[ 3.137967] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
-[ 3.137978] e1000: Copyright (c) 1999-2006 Intel Corporation.
-[ 3.137992] e1000 0000:00:00.0: enabling device (0000 -> 0002)
-[ 3.138003] e1000 0000:00:00.0: enabling bus mastering
-[ 3.290845] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
-[ 3.290854] ata1.00: 2096640 sectors, multi 0: LBA
-[ 3.290879] ata1.00: configured for UDMA/33
-[ 3.290918] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
-[ 3.291021] sd 0:0:0:0: Attached scsi generic sg0 type 0
-[ 3.291044] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
-[ 3.291080] sd 0:0:0:0: [sda] Write Protect is off
-[ 3.291088] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
-[ 3.291107] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
-[ 3.291217] sda: sda1
-[ 3.291322] sd 0:0:0:0: [sda] Attached SCSI disk
-[ 3.411114] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
-[ 3.411126] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
-[ 3.411145] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
-[ 3.411155] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
-[ 3.411174] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
-[ 3.411185] igb: Copyright (c) 2007-2014 Intel Corporation.
-[ 3.411250] usbcore: registered new interface driver usb-storage
-[ 3.411299] mousedev: PS/2 mouse device common for all mice
-[ 3.411439] usbcore: registered new interface driver usbhid
-[ 3.411448] usbhid: USB HID core driver
-[ 3.411475] TCP: cubic registered
-[ 3.411481] NET: Registered protocol family 17
- -[ 3.411814] devtmpfs: mounted
+[ 3.100192] Brought up 1 CPUs
+[ 3.100193] SMP: Total of 1 processors activated.
+[ 3.100239] devtmpfs: initialized
+[ 3.100662] atomic64_test: passed
+[ 3.100699] regulator-dummy: no parameters
+[ 3.101056] NET: Registered protocol family 16
+[ 3.101171] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
+[ 3.101179] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
+[ 3.101397] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
+[ 3.101401] Serial: AMBA PL011 UART driver
+[ 3.101568] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
+[ 3.101599] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
+[ 3.102135] console [ttyAMA0] enabled
+[ 3.102203] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
+[ 3.102233] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
+[ 3.102264] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
+[ 3.102292] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
+[ 3.130476] 3V3: 3300 mV
+[ 3.130514] vgaarb: loaded
+[ 3.130556] SCSI subsystem initialized
+[ 3.130592] libata version 3.00 loaded.
+[ 3.130632] usbcore: registered new interface driver usbfs
+[ 3.130649] usbcore: registered new interface driver hub
+[ 3.130678] usbcore: registered new device driver usb
+[ 3.130702] pps_core: LinuxPPS API ver. 1 registered
+[ 3.130710] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+[ 3.130727] PTP clock support registered
+[ 3.130832] Switched to clocksource arch_sys_counter
+[ 3.131787] NET: Registered protocol family 2
+[ 3.131853] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
+[ 3.131868] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
+[ 3.131886] TCP: Hash tables configured (established 2048 bind 2048)
+[ 3.131900] TCP: reno registered
+[ 3.131907] UDP hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131920] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131953] NET: Registered protocol family 1
+[ 3.131998] RPC: Registered named UNIX socket transport module.
+[ 3.132008] RPC: Registered udp transport module.
+[ 3.132015] RPC: Registered tcp transport module.
+[ 3.132023] RPC: Registered tcp NFSv4.1 backchannel transport module.
+[ 3.132035] PCI: CLS 0 bytes, default 64
+[ 3.132170] futex hash table entries: 1024 (order: 4, 65536 bytes)
+[ 3.132259] HugeTLB registered 2 MB page size, pre-allocated 0 pages
+[ 3.133755] fuse init (API version 7.23)
+[ 3.133830] msgmni has been set to 469
+[ 3.135876] io scheduler noop registered
+[ 3.135924] io scheduler cfq registered (default)
+[ 3.136253] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
+[ 3.136265] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
+[ 3.136276] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
+[ 3.136288] pci_bus 0000:00: root bus resource [bus 00-ff]
+[ 3.136297] pci_bus 0000:00: scanning bus
+[ 3.136307] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
+[ 3.136319] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
+[ 3.136332] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.136366] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
+[ 3.136377] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
+[ 3.136387] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
+[ 3.136397] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
+[ 3.136408] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
+[ 3.136418] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
+[ 3.136428] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.136460] pci_bus 0000:00: fixups for bus
+[ 3.136468] pci_bus 0000:00: bus scan returning with max=00
+[ 3.136479] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
+[ 3.136497] pci 0000:00:00.0: fixup irq: got 33
+[ 3.136505] pci 0000:00:00.0: assigning IRQ 33
+[ 3.136514] pci 0000:00:01.0: fixup irq: got 34
+[ 3.136522] pci 0000:00:01.0: assigning IRQ 34
+[ 3.136533] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
+[ 3.136545] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
+[ 3.136557] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
+[ 3.136570] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
+[ 3.136580] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
+[ 3.136591] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
+[ 3.136602] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
+[ 3.136613] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
+[ 3.137039] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+[ 3.137263] ata_piix 0000:00:01.0: version 2.13
+[ 3.137273] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
+[ 3.137291] ata_piix 0000:00:01.0: enabling bus mastering
+[ 3.137539] scsi0 : ata_piix
+[ 3.137625] scsi1 : ata_piix
+[ 3.137652] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
+[ 3.137663] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
+[ 3.137754] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
+[ 3.137765] e1000: Copyright (c) 1999-2006 Intel Corporation.
+[ 3.137780] e1000 0000:00:00.0: enabling device (0000 -> 0002)
+[ 3.137791] e1000 0000:00:00.0: enabling bus mastering
+[ 3.290854] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
+[ 3.290863] ata1.00: 2096640 sectors, multi 0: LBA
+[ 3.290888] ata1.00: configured for UDMA/33
+[ 3.290928] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
+[ 3.291027] sd 0:0:0:0: Attached scsi generic sg0 type 0
+[ 3.291049] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
+[ 3.291085] sd 0:0:0:0: [sda] Write Protect is off
+[ 3.291094] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+[ 3.291113] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
+[ 3.291218] sda: sda1
+[ 3.291320] sd 0:0:0:0: [sda] Attached SCSI disk
+[ 3.411119] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
+[ 3.411132] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
+[ 3.411151] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
+[ 3.411161] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
+[ 3.411179] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
+[ 3.411190] igb: Copyright (c) 2007-2014 Intel Corporation.
+[ 3.411252] usbcore: registered new interface driver usb-storage
+[ 3.411300] mousedev: PS/2 mouse device common for all mice
+[ 3.411434] usbcore: registered new interface driver usbhid
+[ 3.411443] usbhid: USB HID core driver
+[ 3.411470] TCP: cubic registered
+[ 3.411477] NET: Registered protocol family 17
+ +[ 3.411812] devtmpfs: mounted
[ 3.411835] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
-[ 3.450268] udevd[607]: starting version 182
+[ 3.450156] udevd[607]: starting version 182
Starting Bootlog daemon: bootlogd.
-[ 3.603357] random: dd urandom read with 21 bits of entropy available
+[ 3.543301] random: dd urandom read with 19 bits of entropy available
Populating dev cache
net.ipv4.conf.default.rp_filter = 1
net.ipv4.conf.all.rp_filter = 1
@@ -168,8 +168,8 @@ hwclock: can't open '/dev/misc/rtc': No such file or directory Mon Jan 27 08:00:00 UTC 2014
hwclock: can't open '/dev/misc/rtc': No such file or directory
INIT: Entering runlevel: 5
-Configuring network interfaces... udhcpc (v1.21.1) started
-[ 3.741050] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+Configuring network interfaces... [ 3.671060] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+udhcpc (v1.21.1) started
Sending discover...
Sending discover...
Sending discover...
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini index 810832a32..7bee47df1 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=134217728 -boot_loader=/projects/pd/randd/dist/binaries/boot_emm.arm64 +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm64 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM64 mem_mode=atomic mem_ranges=2147483648:2415919103 -memories=system.realview.vram system.physmem system.realview.nvmem +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.latest/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/projects/pd/randd/dist/disks/linaro-minimal-aarch64.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linaro-minimal-aarch64.img read_only=true [system.clk_domain] @@ -142,6 +143,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -176,6 +178,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.dtb [system.cpu0.dstage2_mmu.stage2_tlb] @@ -193,7 +196,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[5] [system.cpu0.dtb] type=ArmTLB @@ -218,6 +220,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -286,6 +289,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.itb [system.cpu0.istage2_mmu.stage2_tlb] @@ -303,7 +307,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[4] [system.cpu0.itb] type=ArmTLB @@ -364,6 +367,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.dtb [system.cpu1.dstage2_mmu.stage2_tlb] @@ -433,6 +437,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.itb [system.cpu1.istage2_mmu.stage2_tlb] @@ -561,7 +566,7 @@ wbWidth=8 workload= [system.cpu2.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -575,13 +580,13 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu2.dstage2_mmu] type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu2.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu2.dtb [system.cpu2.dstage2_mmu.stage2_tlb] @@ -958,6 +963,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu2.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu2.itb [system.cpu2.istage2_mmu.stage2_tlb] @@ -1021,9 +1027,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -1034,6 +1042,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -1069,6 +1078,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -1103,13 +1113,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -1157,7 +1170,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1461,7 +1474,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -1648,7 +1660,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -1830,7 +1842,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory @@ -1868,13 +1880,16 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side -slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port [system.vncserver] type=VncServer diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr index 5d5102fce..ce311b5c7 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr @@ -5,14 +5,64 @@ warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections warn: Existing EnergyCtrl, but no enabled DVFSHandler found. warn: SCReg: Writing 0 to dcc0:site0:pos0:fn7:dev0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: Tried to read RealView I/O at offset 0x60 that doesn't exist warn: Tried to read RealView I/O at offset 0x48 that doesn't exist +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 11898, Bank: 3 +WARNING: Bank is already active! +Command: 0, Timestamp: 8890, Bank: 1 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: Tried to read RealView I/O at offset 0x8 that doesn't exist warn: Tried to read RealView I/O at offset 0x48 that doesn't exist +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10682, Bank: 5 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -21,10 +71,16 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -37,6 +93,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -45,10 +105,18 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -57,6 +125,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -69,14 +141,30 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -85,6 +173,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -93,14 +185,24 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -109,34 +211,76 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 7910, Bank: 6 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6501, Bank: 1 +WARNING: Bank is already active! +Command: 0, Timestamp: 9251, Bank: 5 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 7678, Bank: 1 +WARNING: Bank is already active! +Command: 0, Timestamp: 6735, Bank: 1 +WARNING: Bank is already active! +Command: 0, Timestamp: 7557, Bank: 6 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -149,6 +293,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -157,6 +305,8 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -165,26 +315,50 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 6448, Bank: 1 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 6448, Bank: 3 +WARNING: Bank is already active! +Command: 0, Timestamp: 6449, Bank: 1 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 11346, Bank: 6 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -193,10 +367,24 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6718, Bank: 7 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -205,22 +393,48 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 8596, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 9274, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 8427, Bank: 5 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7189, Bank: 3 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -229,10 +443,18 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 10975, Bank: 5 +WARNING: Bank is already active! +Command: 0, Timestamp: 11256, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -241,10 +463,18 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -253,26 +483,64 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6729, Bank: 3 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 12439, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -289,6 +557,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -297,6 +569,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -309,6 +585,14 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 11356, Bank: 5 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -317,6 +601,14 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 9054, Bank: 7 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -325,10 +617,22 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6571, Bank: 6 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -337,6 +641,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -345,18 +653,38 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -365,14 +693,36 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7539, Bank: 3 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -381,22 +731,54 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -405,18 +787,52 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7983, Bank: 5 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7384, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10124, Bank: 1 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -425,22 +841,56 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6448, Bank: 3 +WARNING: Bank is already active! +Command: 0, Timestamp: 6758, Bank: 2 +WARNING: Bank is already active! +Command: 0, Timestamp: 8359, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6936, Bank: 1 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -449,10 +899,38 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -461,46 +939,140 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -509,6 +1081,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -517,14 +1093,34 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -533,6 +1129,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -541,14 +1141,26 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -557,10 +1169,18 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -577,10 +1197,18 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -589,6 +1217,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 8631, Bank: 7 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -601,6 +1233,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -613,6 +1249,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -621,14 +1261,26 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -637,26 +1289,82 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 7482, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 8240, Bank: 5 +WARNING: Bank is already active! +Command: 0, Timestamp: 6884, Bank: 4 +WARNING: Bank is already active! +Command: 0, Timestamp: 7065, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7992, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6448, Bank: 6 +WARNING: Bank is already active! +Command: 0, Timestamp: 6861, Bank: 4 +WARNING: Bank is already active! +Command: 0, Timestamp: 6994, Bank: 7 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7102, Bank: 2 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -665,6 +1373,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -673,6 +1385,102 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 9034, Bank: 2 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10338, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simout index 622975a2a..76fd76bdb 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:18:22 -gem5 started Oct 29 2014 11:58:52 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-full -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-full +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 14:18:06 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-full + Selected 64-bit ARM architecture, updating default disk image... Global frequency set at 1000000000000 ticks per second - 0: system.cpu0.isa: ISA system set to: 0x563eb00 0x563eb00 - 0: system.cpu1.isa: ISA system set to: 0x563eb00 0x563eb00 - 0: system.cpu2.isa: ISA system set to: 0x563eb00 0x563eb00 + 0: system.cpu0.isa: ISA system set to: 0x47f6c80 0x47f6c80 + 0: system.cpu1.isa: ISA system set to: 0x47f6c80 0x47f6c80 + 0: system.cpu2.isa: ISA system set to: 0x47f6c80 0x47f6c80 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt index d441549f2..753b1a595 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt @@ -4,11 +4,11 @@ sim_seconds 51.274696 # Nu sim_ticks 51274696167500 # Number of ticks simulated final_tick 51274696167500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 298693 # Simulator instruction rate (inst/s) -host_op_rate 350975 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 17280969451 # Simulator tick rate (ticks/s) -host_mem_usage 723560 # Number of bytes of host memory used -host_seconds 2967.12 # Real time elapsed on the host +host_inst_rate 281052 # Simulator instruction rate (inst/s) +host_op_rate 330247 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 16260391227 # Simulator tick rate (ticks/s) +host_mem_usage 656704 # Number of bytes of host memory used +host_seconds 3153.35 # Real time elapsed on the host sim_insts 886256415 # Number of instructions simulated sim_ops 1041383802 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -1608,7 +1608,7 @@ system.cpu2.iq.iqInstsAdded 437555873 # Nu system.cpu2.iq.iqNonSpecInstsAdded 10088471 # Number of non-speculative instructions added to the IQ system.cpu2.iq.iqInstsIssued 436351243 # Number of instructions issued system.cpu2.iq.iqSquashedInstsIssued 628919 # Number of squashed instructions issued -system.cpu2.iq.iqSquashedInstsExamined 55749778 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu2.iq.iqSquashedInstsExamined 60028880 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu2.iq.iqSquashedOperandsExamined 38531819 # Number of squashed operands that are examined and possibly removed from graph system.cpu2.iq.iqSquashedNonSpecRemoved 239828 # Number of squashed non-spec instructions that were removed system.cpu2.iq.issued_per_cycle::samples 444504807 # Number of insts issued each cycle @@ -1701,10 +1701,10 @@ system.cpu2.iq.rate 0.948308 # In system.cpu2.iq.fu_busy_cnt 8613137 # FU busy when requested system.cpu2.iq.fu_busy_rate 0.019739 # FU busy rate (busy events/executed inst) system.cpu2.iq.int_inst_queue_reads 1325660566 # Number of integer instruction queue reads -system.cpu2.iq.int_inst_queue_writes 503495404 # Number of integer instruction queue writes +system.cpu2.iq.int_inst_queue_writes 507771301 # Number of integer instruction queue writes system.cpu2.iq.int_inst_queue_wakeup_accesses 420349481 # Number of integer instruction queue wakeup accesses system.cpu2.iq.fp_inst_queue_reads 788783 # Number of floating instruction queue reads -system.cpu2.iq.fp_inst_queue_writes 388209 # Number of floating instruction queue writes +system.cpu2.iq.fp_inst_queue_writes 391414 # Number of floating instruction queue writes system.cpu2.iq.fp_inst_queue_wakeup_accesses 352523 # Number of floating instruction queue wakeup accesses system.cpu2.iq.int_alu_accesses 444542452 # Number of integer alu accesses system.cpu2.iq.fp_alu_accesses 421908 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal index 6be888131..2a2b64567 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal @@ -32,135 +32,135 @@ [ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] Architected cp15 timer(s) running at 100.00MHz (phys).
[ 0.000000] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 2748779069440ns
-[ 0.000011] Console: colour dummy device 80x25
-[ 0.000012] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
-[ 0.000013] pid_max: default: 32768 minimum: 301
-[ 0.000020] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000021] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000065] hw perfevents: no hardware support available
+[ 0.000013] Console: colour dummy device 80x25
+[ 0.000014] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
+[ 0.000015] pid_max: default: 32768 minimum: 301
+[ 0.000022] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000023] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000066] hw perfevents: no hardware support available
[ 1.060050] CPU1: failed to come online
[ 2.080101] CPU2: failed to come online
[ 3.100152] CPU3: failed to come online
[ 3.100153] Brought up 1 CPUs
[ 3.100154] SMP: Total of 1 processors activated.
[ 3.100181] devtmpfs: initialized
-[ 3.100733] atomic64_test: passed
-[ 3.100762] regulator-dummy: no parameters
-[ 3.100994] NET: Registered protocol family 16
-[ 3.101088] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
-[ 3.101091] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
-[ 3.101130] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
-[ 3.101132] Serial: AMBA PL011 UART driver
-[ 3.101419] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
-[ 3.101439] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
+[ 3.100715] atomic64_test: passed
+[ 3.100742] regulator-dummy: no parameters
+[ 3.100963] NET: Registered protocol family 16
+[ 3.101057] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
+[ 3.101060] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
+[ 3.101099] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
+[ 3.101101] Serial: AMBA PL011 UART driver
+[ 3.101342] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
+[ 3.101409] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
[ 3.101679] console [ttyAMA0] enabled
[ 3.101713] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
[ 3.101727] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
-[ 3.101742] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
+[ 3.101741] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
[ 3.101754] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
[ 3.130360] 3V3: 3300 mV
-[ 3.130380] vgaarb: loaded
-[ 3.130424] SCSI subsystem initialized
-[ 3.130496] libata version 3.00 loaded.
-[ 3.130585] usbcore: registered new interface driver usbfs
-[ 3.130613] usbcore: registered new interface driver hub
-[ 3.130660] usbcore: registered new device driver usb
-[ 3.130680] pps_core: LinuxPPS API ver. 1 registered
-[ 3.130688] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
-[ 3.130704] PTP clock support registered
-[ 3.130779] Switched to clocksource arch_sys_counter
-[ 3.131645] NET: Registered protocol family 2
-[ 3.131698] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
-[ 3.131703] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
-[ 3.131708] TCP: Hash tables configured (established 2048 bind 2048)
-[ 3.131711] TCP: reno registered
-[ 3.131712] UDP hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131715] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131729] NET: Registered protocol family 1
-[ 3.131759] RPC: Registered named UNIX socket transport module.
-[ 3.131760] RPC: Registered udp transport module.
-[ 3.131761] RPC: Registered tcp transport module.
-[ 3.131761] RPC: Registered tcp NFSv4.1 backchannel transport module.
-[ 3.131763] PCI: CLS 0 bytes, default 64
-[ 3.131861] futex hash table entries: 1024 (order: 4, 65536 bytes)
-[ 3.131904] HugeTLB registered 2 MB page size, pre-allocated 0 pages
-[ 3.133537] fuse init (API version 7.23)
-[ 3.133689] msgmni has been set to 469
-[ 3.135434] io scheduler noop registered
-[ 3.135470] io scheduler cfq registered (default)
-[ 3.135849] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
-[ 3.135863] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
-[ 3.135875] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
-[ 3.135888] pci_bus 0000:00: root bus resource [bus 00-ff]
-[ 3.135899] pci_bus 0000:00: scanning bus
-[ 3.135912] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
-[ 3.135926] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
-[ 3.135942] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.135970] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
-[ 3.135981] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
-[ 3.135990] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
-[ 3.136000] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
-[ 3.136009] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
-[ 3.136018] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
-[ 3.136028] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.136055] pci_bus 0000:00: fixups for bus
-[ 3.136062] pci_bus 0000:00: bus scan returning with max=00
-[ 3.136072] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
-[ 3.136087] pci 0000:00:00.0: fixup irq: got 33
-[ 3.136095] pci 0000:00:00.0: assigning IRQ 33
-[ 3.136103] pci 0000:00:01.0: fixup irq: got 34
-[ 3.136111] pci 0000:00:01.0: assigning IRQ 34
-[ 3.136120] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
-[ 3.136131] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
-[ 3.136143] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
-[ 3.136154] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
-[ 3.136164] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
-[ 3.136174] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
-[ 3.136185] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
-[ 3.136194] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
-[ 3.136544] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-[ 3.136816] ata_piix 0000:00:01.0: version 2.13
-[ 3.136825] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
-[ 3.136841] ata_piix 0000:00:01.0: enabling bus mastering
-[ 3.137006] scsi0 : ata_piix
-[ 3.137060] scsi1 : ata_piix
-[ 3.137078] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
-[ 3.137079] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
-[ 3.137140] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
-[ 3.137141] e1000: Copyright (c) 1999-2006 Intel Corporation.
-[ 3.137145] e1000 0000:00:00.0: enabling device (0000 -> 0002)
-[ 3.137147] e1000 0000:00:00.0: enabling bus mastering
-[ 3.290784] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
-[ 3.290786] ata1.00: 2096640 sectors, multi 0: LBA
-[ 3.290792] ata1.00: configured for UDMA/33
-[ 3.290809] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
-[ 3.290870] sd 0:0:0:0: Attached scsi generic sg0 type 0
-[ 3.290878] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
-[ 3.290892] sd 0:0:0:0: [sda] Write Protect is off
-[ 3.290893] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
-[ 3.290900] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
-[ 3.290953] sda: sda1
-[ 3.291015] sd 0:0:0:0: [sda] Attached SCSI disk
-[ 3.411076] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
-[ 3.411091] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
-[ 3.411122] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
-[ 3.411133] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
-[ 3.411166] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
-[ 3.411178] igb: Copyright (c) 2007-2014 Intel Corporation.
-[ 3.411294] usbcore: registered new interface driver usb-storage
-[ 3.411333] mousedev: PS/2 mouse device common for all mice
-[ 3.411438] usbcore: registered new interface driver usbhid
-[ 3.411447] usbhid: USB HID core driver
-[ 3.411468] TCP: cubic registered
-[ 3.411474] NET: Registered protocol family 17
- -[ 3.411668] devtmpfs: mounted
-[ 3.411676] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
+[ 3.130381] vgaarb: loaded
+[ 3.130421] SCSI subsystem initialized
+[ 3.130490] libata version 3.00 loaded.
+[ 3.130570] usbcore: registered new interface driver usbfs
+[ 3.130596] usbcore: registered new interface driver hub
+[ 3.130650] usbcore: registered new device driver usb
+[ 3.130669] pps_core: LinuxPPS API ver. 1 registered
+[ 3.130677] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+[ 3.130694] PTP clock support registered
+[ 3.130766] Switched to clocksource arch_sys_counter
+[ 3.131600] NET: Registered protocol family 2
+[ 3.131646] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
+[ 3.131660] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
+[ 3.131666] TCP: Hash tables configured (established 2048 bind 2048)
+[ 3.131669] TCP: reno registered
+[ 3.131670] UDP hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131673] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131687] NET: Registered protocol family 1
+[ 3.131717] RPC: Registered named UNIX socket transport module.
+[ 3.131718] RPC: Registered udp transport module.
+[ 3.131719] RPC: Registered tcp transport module.
+[ 3.131720] RPC: Registered tcp NFSv4.1 backchannel transport module.
+[ 3.131721] PCI: CLS 0 bytes, default 64
+[ 3.131820] futex hash table entries: 1024 (order: 4, 65536 bytes)
+[ 3.131862] HugeTLB registered 2 MB page size, pre-allocated 0 pages
+[ 3.133297] fuse init (API version 7.23)
+[ 3.133349] msgmni has been set to 469
+[ 3.135215] io scheduler noop registered
+[ 3.135250] io scheduler cfq registered (default)
+[ 3.135478] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
+[ 3.135480] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
+[ 3.135481] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
+[ 3.135483] pci_bus 0000:00: root bus resource [bus 00-ff]
+[ 3.135484] pci_bus 0000:00: scanning bus
+[ 3.135486] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
+[ 3.135488] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
+[ 3.135491] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.135508] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
+[ 3.135510] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
+[ 3.135511] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
+[ 3.135513] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
+[ 3.135515] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
+[ 3.135516] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
+[ 3.135518] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.135536] pci_bus 0000:00: fixups for bus
+[ 3.135537] pci_bus 0000:00: bus scan returning with max=00
+[ 3.135539] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
+[ 3.135543] pci 0000:00:00.0: fixup irq: got 33
+[ 3.135545] pci 0000:00:00.0: assigning IRQ 33
+[ 3.135547] pci 0000:00:01.0: fixup irq: got 34
+[ 3.135549] pci 0000:00:01.0: assigning IRQ 34
+[ 3.135551] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
+[ 3.135553] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
+[ 3.135554] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
+[ 3.135556] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
+[ 3.135558] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
+[ 3.135559] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
+[ 3.135561] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
+[ 3.135563] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
+[ 3.136019] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+[ 3.136176] ata_piix 0000:00:01.0: version 2.13
+[ 3.136185] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
+[ 3.136198] ata_piix 0000:00:01.0: enabling bus mastering
+[ 3.136386] scsi0 : ata_piix
+[ 3.136441] scsi1 : ata_piix
+[ 3.136483] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
+[ 3.136496] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
+[ 3.136684] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
+[ 3.136696] e1000: Copyright (c) 1999-2006 Intel Corporation.
+[ 3.136709] e1000 0000:00:00.0: enabling device (0000 -> 0002)
+[ 3.136719] e1000 0000:00:00.0: enabling bus mastering
+[ 3.290771] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
+[ 3.290772] ata1.00: 2096640 sectors, multi 0: LBA
+[ 3.290779] ata1.00: configured for UDMA/33
+[ 3.290796] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
+[ 3.290857] sd 0:0:0:0: Attached scsi generic sg0 type 0
+[ 3.290865] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
+[ 3.290879] sd 0:0:0:0: [sda] Write Protect is off
+[ 3.290880] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+[ 3.290887] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
+[ 3.290940] sda: sda1
+[ 3.291002] sd 0:0:0:0: [sda] Attached SCSI disk
+[ 3.411060] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
+[ 3.411075] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
+[ 3.411103] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
+[ 3.411114] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
+[ 3.411144] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
+[ 3.411156] igb: Copyright (c) 2007-2014 Intel Corporation.
+[ 3.411274] usbcore: registered new interface driver usb-storage
+[ 3.411311] mousedev: PS/2 mouse device common for all mice
+[ 3.411407] usbcore: registered new interface driver usbhid
+[ 3.411416] usbhid: USB HID core driver
+[ 3.411437] TCP: cubic registered
+[ 3.411444] NET: Registered protocol family 17
+ +[ 3.411640] devtmpfs: mounted
+[ 3.411648] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
-[ 3.449328] udevd[607]: starting version 182
+[ 3.449130] udevd[607]: starting version 182
Starting Bootlog daemon: bootlogd.
-[ 3.543161] random: dd urandom read with 19 bits of entropy available
+[ 3.543090] random: dd urandom read with 19 bits of entropy available
Populating dev cache
net.ipv4.conf.default.rp_filter = 1
net.ipv4.conf.all.rp_filter = 1
@@ -169,7 +169,7 @@ Mon Jan 27 08:00:00 UTC 2014 hwclock: can't open '/dev/misc/rtc': No such file or directory
INIT: Entering runlevel: 5
Configuring network interfaces... udhcpc (v1.21.1) started
-[ 3.661005] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+[ 3.660992] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
Sending discover...
Sending discover...
Sending discover...
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/config.ini index c85927ad5..7721c6927 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/config.ini @@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=134217728 -boot_loader=/projects/pd/randd/dist/binaries/boot_emm.arm64 +boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm64 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain -dtb_filename=/projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb +dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 @@ -30,20 +30,21 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 +kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821 kernel_addr_check=true load_addr_mask=268435455 load_offset=2147483648 machine_type=VExpress_EMM64 mem_mode=timing mem_ranges=2147483648:2415919103 -memories=system.realview.vram system.physmem system.realview.nvmem +memories=system.physmem system.realview.nvmem system.realview.vram +mmap_using_noreserve=false multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/work/gem5.latest/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -86,7 +87,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/projects/pd/randd/dist/disks/linaro-minimal-aarch64.img +image_file=/home/stever/m5/aarch-system-2014-10/disks/linaro-minimal-aarch64.img read_only=true [system.clk_domain] @@ -189,7 +190,7 @@ dcache_port=system.cpu0.dcache.cpu_side icache_port=system.cpu0.icache.cpu_side [system.cpu0.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -203,7 +204,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu0.dcache] type=BaseCache @@ -211,6 +211,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -245,6 +246,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.dtb [system.cpu0.dstage2_mmu.stage2_tlb] @@ -262,7 +264,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[5] [system.cpu0.dtb] type=ArmTLB @@ -594,6 +595,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -662,6 +664,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu0.itb [system.cpu0.istage2_mmu.stage2_tlb] @@ -679,7 +682,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.toL2Bus.slave[4] [system.cpu0.itb] type=ArmTLB @@ -792,7 +794,7 @@ wbWidth=8 workload= [system.cpu1.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -806,13 +808,13 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu1.dstage2_mmu] type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.dtb [system.cpu1.dstage2_mmu.stage2_tlb] @@ -1189,6 +1191,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu1.itb [system.cpu1.istage2_mmu.stage2_tlb] @@ -1252,9 +1255,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.realview.pciconfig.pio master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma @@ -1265,6 +1270,7 @@ children=tags addr_ranges=2147483648:2415919103 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -1300,6 +1306,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -1334,13 +1341,16 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio -master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port +master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side [system.membus.badaddr_responder] @@ -1388,7 +1398,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1692,7 +1702,6 @@ dist_pio_delay=10000 eventq_index=0 int_latency=10000 it_lines=128 -msix_addr=0 platform=system.realview system=system pio=system.membus.master[2] @@ -1879,7 +1888,7 @@ int_num_watchdog=30 pio_addr=738721792 pio_latency=100000 system=system -pio=system.membus.master[3] +pio=system.membus.master[4] [system.realview.mmc_fake] type=AmbaFake @@ -2061,7 +2070,7 @@ platform=system.realview ppint=25 system=system vcpu_addr=738222080 -pio=system.membus.master[4] +pio=system.membus.master[3] [system.realview.vram] type=SimpleMemory @@ -2099,13 +2108,16 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side -slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port [system.vncserver] type=VncServer diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simerr index c5b003261..68af87dfe 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simerr @@ -433,31 +433,3 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simout index 0143bb788..e7cd8038d 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/simout @@ -1,11 +1,12 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 15:46:15 -gem5 started Oct 29 2014 19:59:19 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-o3 -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-o3 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 15:04:42 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-o3 + Selected 64-bit ARM architecture, updating default disk image... Global frequency set at 1000000000000 ticks per second - 0: system.cpu0.isa: ISA system set to: 0x42b8b00 0x42b8b00 - 0: system.cpu1.isa: ISA system set to: 0x42b8b00 0x42b8b00 + 0: system.cpu0.isa: ISA system set to: 0x40189d0 0x40189d0 + 0: system.cpu1.isa: ISA system set to: 0x40189d0 0x40189d0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/stats.txt index 02f99a8e5..ad85907fd 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 51.318118 # Nu sim_ticks 51318118168000 # Number of ticks simulated final_tick 51318118168000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 134411 # Simulator instruction rate (inst/s) -host_op_rate 157933 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 7593762336 # Simulator tick rate (ticks/s) -host_mem_usage 732664 # Number of bytes of host memory used -host_seconds 6757.93 # Real time elapsed on the host +host_inst_rate 135924 # Simulator instruction rate (inst/s) +host_op_rate 159711 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 7679227340 # Simulator tick rate (ticks/s) +host_mem_usage 666876 # Number of bytes of host memory used +host_seconds 6682.72 # Real time elapsed on the host sim_insts 908340493 # Number of instructions simulated sim_ops 1067303522 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -665,7 +665,7 @@ system.cpu0.iq.iqInstsAdded 598113520 # Nu system.cpu0.iq.iqNonSpecInstsAdded 15856672 # Number of non-speculative instructions added to the IQ system.cpu0.iq.iqInstsIssued 599090036 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 857856 # Number of squashed instructions issued -system.cpu0.iq.iqSquashedInstsExamined 76035125 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu0.iq.iqSquashedInstsExamined 81807793 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu0.iq.iqSquashedOperandsExamined 52627296 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 360655 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 646873994 # Number of insts issued each cycle @@ -758,10 +758,10 @@ system.cpu0.iq.rate 0.893155 # In system.cpu0.iq.fu_busy_cnt 11885426 # FU busy when requested system.cpu0.iq.fu_busy_rate 0.019839 # FU busy rate (busy events/executed inst) system.cpu0.iq.int_inst_queue_reads 1856813329 # Number of integer instruction queue reads -system.cpu0.iq.int_inst_queue_writes 690194574 # Number of integer instruction queue writes +system.cpu0.iq.int_inst_queue_writes 695962848 # Number of integer instruction queue writes system.cpu0.iq.int_inst_queue_wakeup_accesses 576693438 # Number of integer instruction queue wakeup accesses system.cpu0.iq.fp_inst_queue_reads 984019 # Number of floating instruction queue reads -system.cpu0.iq.fp_inst_queue_writes 484790 # Number of floating instruction queue writes +system.cpu0.iq.fp_inst_queue_writes 489184 # Number of floating instruction queue writes system.cpu0.iq.fp_inst_queue_wakeup_accesses 438468 # Number of floating instruction queue wakeup accesses system.cpu0.iq.int_alu_accesses 610449620 # Number of integer alu accesses system.cpu0.iq.fp_alu_accesses 525838 # Number of floating point alu accesses @@ -1639,7 +1639,7 @@ system.cpu1.iq.iqInstsAdded 601797044 # Nu system.cpu1.iq.iqNonSpecInstsAdded 15287986 # Number of non-speculative instructions added to the IQ system.cpu1.iq.iqInstsIssued 601499543 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 865295 # Number of squashed instructions issued -system.cpu1.iq.iqSquashedInstsExamined 76155843 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu1.iq.iqSquashedInstsExamined 81943902 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu1.iq.iqSquashedOperandsExamined 52376442 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 362406 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 643871402 # Number of insts issued each cycle @@ -1732,10 +1732,10 @@ system.cpu1.iq.rate 0.900945 # In system.cpu1.iq.fu_busy_cnt 11593896 # FU busy when requested system.cpu1.iq.fu_busy_rate 0.019275 # FU busy rate (busy events/executed inst) system.cpu1.iq.int_inst_queue_reads 1858238935 # Number of integer instruction queue reads -system.cpu1.iq.int_inst_queue_writes 693444958 # Number of integer instruction queue writes +system.cpu1.iq.int_inst_queue_writes 699228429 # Number of integer instruction queue writes system.cpu1.iq.int_inst_queue_wakeup_accesses 579923061 # Number of integer instruction queue wakeup accesses system.cpu1.iq.fp_inst_queue_reads 1090744 # Number of floating instruction queue reads -system.cpu1.iq.fp_inst_queue_writes 536293 # Number of floating instruction queue writes +system.cpu1.iq.fp_inst_queue_writes 540881 # Number of floating instruction queue writes system.cpu1.iq.fp_inst_queue_wakeup_accesses 488146 # Number of floating instruction queue wakeup accesses system.cpu1.iq.int_alu_accesses 612510547 # Number of integer alu accesses system.cpu1.iq.fp_alu_accesses 582891 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/system.terminal index 32a8214fd..c5c4d146b 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-o3/system.terminal @@ -34,133 +34,133 @@ [ 0.000000] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 2748779069440ns
[ 0.000011] Console: colour dummy device 80x25
[ 0.000013] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
-[ 0.000013] pid_max: default: 32768 minimum: 301
+[ 0.000014] pid_max: default: 32768 minimum: 301
[ 0.000020] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
[ 0.000021] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000090] hw perfevents: no hardware support available
+[ 0.000091] hw perfevents: no hardware support available
[ 1.060050] CPU1: failed to come online
[ 2.080096] CPU2: failed to come online
[ 3.100142] CPU3: failed to come online
-[ 3.100144] Brought up 1 CPUs
+[ 3.100145] Brought up 1 CPUs
[ 3.100145] SMP: Total of 1 processors activated.
-[ 3.100180] devtmpfs: initialized
-[ 3.100498] atomic64_test: passed
-[ 3.100526] regulator-dummy: no parameters
-[ 3.100758] NET: Registered protocol family 16
-[ 3.100838] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
-[ 3.100845] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
-[ 3.101001] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
-[ 3.101002] Serial: AMBA PL011 UART driver
-[ 3.101107] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
-[ 3.101127] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
-[ 3.101646] console [ttyAMA0] enabled
-[ 3.101688] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
-[ 3.101712] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
-[ 3.101737] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
-[ 3.101761] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
-[ 3.130353] 3V3: 3300 mV
-[ 3.130382] vgaarb: loaded
-[ 3.130412] SCSI subsystem initialized
-[ 3.130441] libata version 3.00 loaded.
-[ 3.130473] usbcore: registered new interface driver usbfs
-[ 3.130487] usbcore: registered new interface driver hub
-[ 3.130511] usbcore: registered new device driver usb
-[ 3.130530] pps_core: LinuxPPS API ver. 1 registered
-[ 3.130538] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
-[ 3.130554] PTP clock support registered
-[ 3.130630] Switched to clocksource arch_sys_counter
-[ 3.131365] NET: Registered protocol family 2
-[ 3.131410] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
-[ 3.131424] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
-[ 3.131439] TCP: Hash tables configured (established 2048 bind 2048)
-[ 3.131453] TCP: reno registered
-[ 3.131459] UDP hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131470] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131496] NET: Registered protocol family 1
-[ 3.131539] RPC: Registered named UNIX socket transport module.
-[ 3.131548] RPC: Registered udp transport module.
-[ 3.131555] RPC: Registered tcp transport module.
-[ 3.131563] RPC: Registered tcp NFSv4.1 backchannel transport module.
-[ 3.131574] PCI: CLS 0 bytes, default 64
-[ 3.131673] futex hash table entries: 1024 (order: 4, 65536 bytes)
-[ 3.131735] HugeTLB registered 2 MB page size, pre-allocated 0 pages
-[ 3.132928] fuse init (API version 7.23)
-[ 3.132989] msgmni has been set to 469
-[ 3.134506] io scheduler noop registered
-[ 3.134546] io scheduler cfq registered (default)
-[ 3.134769] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
-[ 3.134780] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
-[ 3.134790] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
-[ 3.134801] pci_bus 0000:00: root bus resource [bus 00-ff]
-[ 3.134810] pci_bus 0000:00: scanning bus
-[ 3.134819] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
-[ 3.134830] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
-[ 3.134842] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.134869] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
-[ 3.134880] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
-[ 3.134889] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
-[ 3.134899] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
-[ 3.134908] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
-[ 3.134918] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
-[ 3.134928] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.134955] pci_bus 0000:00: fixups for bus
-[ 3.134962] pci_bus 0000:00: bus scan returning with max=00
-[ 3.134972] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
-[ 3.134987] pci 0000:00:00.0: fixup irq: got 33
-[ 3.134995] pci 0000:00:00.0: assigning IRQ 33
-[ 3.135003] pci 0000:00:01.0: fixup irq: got 34
-[ 3.135011] pci 0000:00:01.0: assigning IRQ 34
-[ 3.135020] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
-[ 3.135031] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
-[ 3.135043] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
-[ 3.135054] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
-[ 3.135065] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
-[ 3.135075] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
-[ 3.135085] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
-[ 3.135095] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
-[ 3.135422] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-[ 3.135591] ata_piix 0000:00:01.0: version 2.13
-[ 3.135600] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
-[ 3.135616] ata_piix 0000:00:01.0: enabling bus mastering
-[ 3.135788] scsi0 : ata_piix
-[ 3.135855] scsi1 : ata_piix
-[ 3.135877] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
-[ 3.135888] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
-[ 3.135958] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
-[ 3.135969] e1000: Copyright (c) 1999-2006 Intel Corporation.
-[ 3.135982] e1000 0000:00:00.0: enabling device (0000 -> 0002)
-[ 3.135992] e1000 0000:00:00.0: enabling bus mastering
-[ 3.290650] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
+[ 3.100181] devtmpfs: initialized
+[ 3.100445] atomic64_test: passed
+[ 3.100472] regulator-dummy: no parameters
+[ 3.100688] NET: Registered protocol family 16
+[ 3.100765] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
+[ 3.100772] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
+[ 3.100985] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
+[ 3.100989] Serial: AMBA PL011 UART driver
+[ 3.101109] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
+[ 3.101131] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
+[ 3.101654] console [ttyAMA0] enabled
+[ 3.101707] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
+[ 3.101732] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
+[ 3.101757] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
+[ 3.101781] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
+[ 3.130360] 3V3: 3300 mV
+[ 3.130388] vgaarb: loaded
+[ 3.130419] SCSI subsystem initialized
+[ 3.130448] libata version 3.00 loaded.
+[ 3.130477] usbcore: registered new interface driver usbfs
+[ 3.130491] usbcore: registered new interface driver hub
+[ 3.130515] usbcore: registered new device driver usb
+[ 3.130533] pps_core: LinuxPPS API ver. 1 registered
+[ 3.130542] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+[ 3.130558] PTP clock support registered
+[ 3.130631] Switched to clocksource arch_sys_counter
+[ 3.131314] NET: Registered protocol family 2
+[ 3.131359] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
+[ 3.131373] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
+[ 3.131388] TCP: Hash tables configured (established 2048 bind 2048)
+[ 3.131401] TCP: reno registered
+[ 3.131407] UDP hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131418] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131445] NET: Registered protocol family 1
+[ 3.131486] RPC: Registered named UNIX socket transport module.
+[ 3.131496] RPC: Registered udp transport module.
+[ 3.131503] RPC: Registered tcp transport module.
+[ 3.131511] RPC: Registered tcp NFSv4.1 backchannel transport module.
+[ 3.131522] PCI: CLS 0 bytes, default 64
+[ 3.131616] futex hash table entries: 1024 (order: 4, 65536 bytes)
+[ 3.131677] HugeTLB registered 2 MB page size, pre-allocated 0 pages
+[ 3.132690] fuse init (API version 7.23)
+[ 3.132744] msgmni has been set to 469
+[ 3.134228] io scheduler noop registered
+[ 3.134263] io scheduler cfq registered (default)
+[ 3.134485] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
+[ 3.134497] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
+[ 3.134507] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
+[ 3.134518] pci_bus 0000:00: root bus resource [bus 00-ff]
+[ 3.134527] pci_bus 0000:00: scanning bus
+[ 3.134536] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
+[ 3.134547] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
+[ 3.134559] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.134585] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
+[ 3.134596] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
+[ 3.134605] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
+[ 3.134615] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
+[ 3.134624] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
+[ 3.134634] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
+[ 3.134644] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.134669] pci_bus 0000:00: fixups for bus
+[ 3.134676] pci_bus 0000:00: bus scan returning with max=00
+[ 3.134687] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
+[ 3.134702] pci 0000:00:00.0: fixup irq: got 33
+[ 3.134710] pci 0000:00:00.0: assigning IRQ 33
+[ 3.134718] pci 0000:00:01.0: fixup irq: got 34
+[ 3.134726] pci 0000:00:01.0: assigning IRQ 34
+[ 3.134735] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
+[ 3.134747] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
+[ 3.134759] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
+[ 3.134770] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
+[ 3.134780] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
+[ 3.134790] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
+[ 3.134801] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
+[ 3.134811] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
+[ 3.135117] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+[ 3.135275] ata_piix 0000:00:01.0: version 2.13
+[ 3.135284] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
+[ 3.135300] ata_piix 0000:00:01.0: enabling bus mastering
+[ 3.135469] scsi0 : ata_piix
+[ 3.135531] scsi1 : ata_piix
+[ 3.135551] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
+[ 3.135562] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
+[ 3.135629] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
+[ 3.135640] e1000: Copyright (c) 1999-2006 Intel Corporation.
+[ 3.135652] e1000 0000:00:00.0: enabling device (0000 -> 0002)
+[ 3.135662] e1000 0000:00:00.0: enabling bus mastering
+[ 3.290651] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
[ 3.290659] ata1.00: 2096640 sectors, multi 0: LBA
-[ 3.290681] ata1.00: configured for UDMA/33
-[ 3.290713] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
-[ 3.290793] sd 0:0:0:0: Attached scsi generic sg0 type 0
-[ 3.290812] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
-[ 3.290843] sd 0:0:0:0: [sda] Write Protect is off
-[ 3.290851] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
-[ 3.290867] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
-[ 3.290956] sda: sda1
-[ 3.291038] sd 0:0:0:0: [sda] Attached SCSI disk
-[ 3.410906] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
-[ 3.410918] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
-[ 3.410934] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
-[ 3.410944] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
-[ 3.410960] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
-[ 3.410970] igb: Copyright (c) 2007-2014 Intel Corporation.
-[ 3.411019] usbcore: registered new interface driver usb-storage
-[ 3.411058] mousedev: PS/2 mouse device common for all mice
-[ 3.411163] usbcore: registered new interface driver usbhid
-[ 3.411172] usbhid: USB HID core driver
-[ 3.411193] TCP: cubic registered
-[ 3.411200] NET: Registered protocol family 17
- -[ 3.411454] devtmpfs: mounted
-[ 3.411473] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
+[ 3.290682] ata1.00: configured for UDMA/33
+[ 3.290714] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
+[ 3.290788] sd 0:0:0:0: Attached scsi generic sg0 type 0
+[ 3.290807] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
+[ 3.290836] sd 0:0:0:0: [sda] Write Protect is off
+[ 3.290845] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+[ 3.290861] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
+[ 3.290945] sda: sda1
+[ 3.291020] sd 0:0:0:0: [sda] Attached SCSI disk
+[ 3.410902] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
+[ 3.410913] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
+[ 3.410930] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
+[ 3.410939] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
+[ 3.410954] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
+[ 3.410965] igb: Copyright (c) 2007-2014 Intel Corporation.
+[ 3.411010] usbcore: registered new interface driver usb-storage
+[ 3.411047] mousedev: PS/2 mouse device common for all mice
+[ 3.411142] usbcore: registered new interface driver usbhid
+[ 3.411151] usbhid: USB HID core driver
+[ 3.411173] TCP: cubic registered
+[ 3.411179] NET: Registered protocol family 17
+ +[ 3.411432] devtmpfs: mounted
+[ 3.411453] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
-[ 3.448022] udevd[607]: starting version 182
+[ 3.447823] udevd[607]: starting version 182
Starting Bootlog daemon: bootlogd.
-[ 3.542571] random: dd urandom read with 19 bits of entropy available
+[ 3.542531] random: dd urandom read with 19 bits of entropy available
Populating dev cache
net.ipv4.conf.default.rp_filter = 1
net.ipv4.conf.all.rp_filter = 1
@@ -169,7 +169,7 @@ Mon Jan 27 08:00:00 UTC 2014 hwclock: can't open '/dev/misc/rtc': No such file or directory
INIT: Entering runlevel: 5
Configuring network interfaces... udhcpc (v1.21.1) started
-[ 3.660858] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+[ 3.660859] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
Sending discover...
Sending discover...
Sending discover...
diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout index 7670d16aa..24624d6a1 100755 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout @@ -1,8 +1,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Apr 20 2015 13:24:00 -gem5 started Apr 20 2015 13:25:09 +gem5 compiled Apr 22 2015 08:10:29 +gem5 started Apr 22 2015 10:12:51 gem5 executing on phenom command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt index ca071852e..4d9a437d0 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 5.154240 # Nu sim_ticks 5154239928000 # Number of ticks simulated final_tick 5154239928000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 179131 # Simulator instruction rate (inst/s) -host_op_rate 354077 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2263170239 # Simulator tick rate (ticks/s) -host_mem_usage 759084 # Number of bytes of host memory used -host_seconds 2277.44 # Real time elapsed on the host +host_inst_rate 159835 # Simulator instruction rate (inst/s) +host_op_rate 315937 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2019388964 # Simulator tick rate (ticks/s) +host_mem_usage 759104 # Number of bytes of host memory used +host_seconds 2552.38 # Real time elapsed on the host sim_insts 407959851 # Number of instructions simulated sim_ops 806389826 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -389,7 +389,7 @@ system.cpu.iq.iqInstsAdded 829469634 # Nu system.cpu.iq.iqNonSpecInstsAdded 1196558 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 824230120 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 243416 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 23349289 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 24276361 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 36028466 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 151024 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 449344124 # Number of insts issued each cycle @@ -482,10 +482,10 @@ system.cpu.iq.rate 1.823454 # In system.cpu.iq.fu_busy_cnt 2760609 # FU busy when requested system.cpu.iq.fu_busy_rate 0.003349 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 2100807897 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 854027763 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 854954817 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 819692227 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 491 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 488 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 506 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 172 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 826700185 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 236 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini index dab7e71e5..44a91aeb4 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini @@ -20,15 +20,16 @@ eventq_index=0 init_param=0 intel_mp_pointer=system.intel_mp_pointer intel_mp_table=system.intel_mp_table -kernel=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9 +kernel=/home/stever/m5/m5_system_2.0b3/binaries/x86_64-vmlinux-2.6.22.9 kernel_addr_check=true load_addr_mask=18446744073709551615 load_offset=0 mem_mode=atomic mem_ranges=0:134217727 memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 -readfile=/usr/local/google/home/gabeblack/gem5/hg/gem5/tests/halt.sh +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh smbios_table=system.smbios_table symbolfile= work_begin_ckpt_count=0 @@ -409,7 +410,7 @@ wbWidth=8 workload= [system.cpu2.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -423,7 +424,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu2.dtb] type=X86TLB @@ -1212,9 +1212,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=false -width=8 +width=16 default=system.pc.pciconfig.pio master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist1.pio system.pc.i_dont_exist2.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master @@ -1296,11 +1298,14 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.cpu0.interrupts.pio system.cpu0.interrupts.int_slave system.physmem.port slave=system.apicbridge.master system.system_port system.l2c.mem_side system.cpu0.interrupts.int_master system.iocache.mem_side @@ -1638,7 +1643,7 @@ table_size=65536 [system.pc.south_bridge.ide.disks0.image.child] type=RawDiskImage eventq_index=0 -image_file=/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-x86.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-x86.img read_only=true [system.pc.south_bridge.ide.disks1] @@ -1661,7 +1666,7 @@ table_size=65536 [system.pc.south_bridge.ide.disks1.image.child] type=RawDiskImage eventq_index=0 -image_file=/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-bigswap2.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img read_only=true [system.pc.south_bridge.int_lines0] @@ -1876,7 +1881,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1953,11 +1958,14 @@ version= type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json index a259a8af3..8d20c23c9 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json @@ -2,55 +2,8 @@ "name": null, "sim_quantum": 0, "system": { - "kernel": "/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9", - "l2c": { - "is_top_level": false, - "prefetcher": null, - "clk_domain": "system.cpu_clk_domain", - "write_buffers": 8, - "response_latency": 20, - "cxx_class": "BaseCache", - "size": 4194304, - "tags": { - "name": "tags", - "eventq_index": 0, - "hit_latency": 20, - "clk_domain": "system.cpu_clk_domain", - "sequential_access": false, - "assoc": 8, - "cxx_class": "LRU", - "path": "system.l2c.tags", - "block_size": 64, - "type": "LRU", - "size": 4194304 - }, - "system": "system", - "max_miss_count": 0, - "eventq_index": 0, - "mem_side": { - "peer": "system.membus.slave[2]", - "role": "MASTER" - }, - "mshrs": 20, - "forward_snoops": true, - "hit_latency": 20, - "demand_mshr_reserve": 1, - "tgts_per_mshr": 12, - "addr_ranges": [ - "0:18446744073709551615" - ], - "assoc": 8, - "prefetch_on_access": false, - "path": "system.l2c", - "name": "l2c", - "type": "BaseCache", - "sequential_access": false, - "cpu_side": { - "peer": "system.toL2Bus.master[0]", - "role": "SLAVE" - }, - "two_queue": false - }, + "kernel": "/home/stever/m5/m5_system_2.0b3/binaries/x86_64-vmlinux-2.6.22.9", + "mmap_using_noreserve": false, "kernel_addr_check": true, "bridge": { "ranges": [ @@ -90,9 +43,9 @@ "peer": "system.pc.pciconfig.pio", "role": "MASTER" }, + "forward_latency": 1, "clk_domain": "system.clk_domain", - "header_cycles": 1, - "width": 8, + "width": 16, "eventq_index": 0, "master": { "peer": [ @@ -119,10 +72,12 @@ ], "role": "MASTER" }, + "response_latency": 2, "cxx_class": "NoncoherentXBar", "path": "system.iobus", "type": "NoncoherentXBar", - "use_default_range": false + "use_default_range": false, + "frontend_latency": 2 }, "apicbridge": { "ranges": [ @@ -147,7 +102,55 @@ "type": "Bridge" }, "symbolfile": "", - "readfile": "/usr/local/google/home/gabeblack/gem5/hg/gem5/tests/halt.sh", + "l2c": { + "is_top_level": false, + "prefetcher": null, + "clk_domain": "system.cpu_clk_domain", + "write_buffers": 8, + "response_latency": 20, + "cxx_class": "BaseCache", + "size": 4194304, + "tags": { + "name": "tags", + "eventq_index": 0, + "hit_latency": 20, + "clk_domain": "system.cpu_clk_domain", + "sequential_access": false, + "assoc": 8, + "cxx_class": "LRU", + "path": "system.l2c.tags", + "block_size": 64, + "type": "LRU", + "size": 4194304 + }, + "system": "system", + "max_miss_count": 0, + "eventq_index": 0, + "mem_side": { + "peer": "system.membus.slave[2]", + "role": "MASTER" + }, + "mshrs": 20, + "forward_snoops": true, + "hit_latency": 20, + "demand_mshr_reserve": 1, + "tgts_per_mshr": 12, + "addr_ranges": [ + "0:18446744073709551615" + ], + "assoc": 8, + "prefetch_on_access": false, + "path": "system.l2c", + "name": "l2c", + "type": "BaseCache", + "sequential_access": false, + "cpu_side": { + "peer": "system.toL2Bus.master[0]", + "role": "SLAVE" + }, + "two_queue": false + }, + "readfile": "/home/stever/hg/m5sim.org/gem5/tests/halt.sh", "intel_mp_table": { "oem_table_addr": 0, "name": "intel_mp_table", @@ -768,10 +771,10 @@ "ret_data16": 65535 }, "snoop_filter": null, + "forward_latency": 4, "clk_domain": "system.clk_domain", - "header_cycles": 1, "system": "system", - "width": 8, + "width": 16, "eventq_index": 0, "master": { "peer": [ @@ -782,10 +785,13 @@ ], "role": "MASTER" }, + "response_latency": 2, "cxx_class": "CoherentXBar", "path": "system.membus", + "snoop_response_latency": 4, "type": "CoherentXBar", - "use_default_range": false + "use_default_range": false, + "frontend_latency": 3 }, "pc": { "fake_com_4": { @@ -1179,7 +1185,7 @@ "eventq_index": 0, "cxx_class": "RawDiskImage", "path": "system.pc.south_bridge.ide.disks0.image.child", - "image_file": "/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-x86.img", + "image_file": "/home/stever/m5/m5_system_2.0b3/disks/linux-x86.img", "type": "RawDiskImage" }, "path": "system.pc.south_bridge.ide.disks0.image", @@ -1207,7 +1213,7 @@ "eventq_index": 0, "cxx_class": "RawDiskImage", "path": "system.pc.south_bridge.ide.disks1.image.child", - "image_file": "/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-bigswap2.img", + "image_file": "/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img", "type": "RawDiskImage" }, "path": "system.pc.south_bridge.ide.disks1.image", @@ -1650,7 +1656,7 @@ "path": "system.physmem", "tXP": 0, "tXS": 0, - "addr_mapping": "RoRaBaChCo", + "addr_mapping": "RoRaBaCoCh", "IDD3P0": "0.0", "IDD3P1": "0.0", "IDD3N": "0.057", @@ -1701,10 +1707,10 @@ }, "name": "toL2Bus", "snoop_filter": null, + "forward_latency": 0, "clk_domain": "system.cpu_clk_domain", - "header_cycles": 1, "system": "system", - "width": 8, + "width": 32, "eventq_index": 0, "master": { "peer": [ @@ -1712,10 +1718,13 @@ ], "role": "MASTER" }, + "response_latency": 1, "cxx_class": "CoherentXBar", "path": "system.toL2Bus", + "snoop_response_latency": 1, "type": "CoherentXBar", - "use_default_range": false + "use_default_range": false, + "frontend_latency": 1 }, "work_end_ckpt_count": 0, "mem_mode": "atomic", @@ -2555,11 +2564,10 @@ "eventq_index": 0, "BTBTagSize": 16, "BTBEntries": 4096, - "cxx_class": "BPredUnit", + "cxx_class": "TournamentBP", "path": "system.cpu2.branchPred", "localPredictorSize": 2048, - "type": "BranchPredictor", - "predType": "tournament", + "type": "TournamentBP", "RASSize": 16, "globalPredictorSize": 8192 }, diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simerr b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simerr index c98b760d2..edbd8626d 100755 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simerr +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simerr @@ -3,6 +3,7 @@ warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections warn: Reading current count from inactive timer. warn: Don't know what interrupt to clear for console. +warn: x86 cpuid: unknown family 0xbacc WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -18,28 +19,28 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6448, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 11155, Bank: 3 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: Bank is already active! -Command: 0, Timestamp: 10068, Bank: 3 +Command: 0, Timestamp: 8139, Bank: 7 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7686, Bank: 3 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 11067, Bank: 2 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 6494, Bank: 3 -WARNING: Bank is already active! -Command: 0, Timestamp: 6532, Bank: 6 -WARNING: Bank is already active! -Command: 0, Timestamp: 6448, Bank: 5 -WARNING: Bank is already active! -Command: 0, Timestamp: 6448, Bank: 2 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -49,11 +50,7 @@ Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: Bank is already active! -Command: 0, Timestamp: 11102, Bank: 3 -WARNING: Bank is already active! -Command: 0, Timestamp: 7271, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 8628, Bank: 5 +Command: 0, Timestamp: 10283, Bank: 3 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -72,14 +69,36 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -warn: Tried to clear PCI interrupt 14 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -warn: Unknown mouse command 0xe1. WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: Tried to clear PCI interrupt 14 +WARNING: Bank is already active! +Command: 0, Timestamp: 7809, Bank: 2 +WARNING: Bank is already active! +Command: 0, Timestamp: 12253, Bank: 7 +WARNING: Bank is already active! +Command: 0, Timestamp: 7886, Bank: 4 +warn: Unknown mouse command 0xe1. warn: instruction 'wbinvd' unimplemented WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is not active! +Command: 1, Timestamp: 1481, Bank: 4 +WARNING: Bank is not active! +Command: 1, Timestamp: 2142, Bank: 4 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simout b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simout index 7bea79dd6..d5a88ab7b 100755 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simout +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/simout @@ -1,9 +1,10 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 6 2015 22:19:56 -gem5 started Jan 6 2015 22:27:08 -gem5 executing on gabeblackz620.mtv.corp.google.com -command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full -re /usr/local/google/home/gabeblack/gem5/hg/gem5/tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full +gem5 compiled Apr 22 2015 08:10:29 +gem5 started Apr 22 2015 10:40:08 +gem5 executing on phenom +command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full + Global frequency set at 1000000000000 ticks per second 0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012 diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/stats.txt index fbb8e7287..345b39cdc 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/stats.txt @@ -4,11 +4,11 @@ sim_seconds 5.134221 # Nu sim_ticks 5134220888000 # Number of ticks simulated final_tick 5134220888000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 274165 # Simulator instruction rate (inst/s) -host_op_rate 545049 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5772363280 # Simulator tick rate (ticks/s) -host_mem_usage 1013712 # Number of bytes of host memory used -host_seconds 889.45 # Real time elapsed on the host +host_inst_rate 243170 # Simulator instruction rate (inst/s) +host_op_rate 483430 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5119785775 # Simulator tick rate (ticks/s) +host_mem_usage 964244 # Number of bytes of host memory used +host_seconds 1002.82 # Real time elapsed on the host sim_insts 243855553 # Number of instructions simulated sim_ops 484792888 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -895,7 +895,7 @@ system.cpu2.iq.iqInstsAdded 279698877 # Nu system.cpu2.iq.iqNonSpecInstsAdded 432383 # Number of non-speculative instructions added to the IQ system.cpu2.iq.iqInstsIssued 277466645 # Number of instructions issued system.cpu2.iq.iqSquashedInstsIssued 109952 # Number of squashed instructions issued -system.cpu2.iq.iqSquashedInstsExamined 9178493 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu2.iq.iqSquashedInstsExamined 9552955 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu2.iq.iqSquashedOperandsExamined 14257252 # Number of squashed operands that are examined and possibly removed from graph system.cpu2.iq.iqSquashedNonSpecRemoved 68980 # Number of squashed non-spec instructions that were removed system.cpu2.iq.issued_per_cycle::samples 154648109 # Number of insts issued each cycle @@ -988,10 +988,10 @@ system.cpu2.iq.rate 1.782256 # In system.cpu2.iq.fu_busy_cnt 1946922 # FU busy when requested system.cpu2.iq.fu_busy_rate 0.007017 # FU busy rate (busy events/executed inst) system.cpu2.iq.int_inst_queue_reads 711637991 # Number of integer instruction queue reads -system.cpu2.iq.int_inst_queue_writes 289314219 # Number of integer instruction queue writes +system.cpu2.iq.int_inst_queue_writes 289688673 # Number of integer instruction queue writes system.cpu2.iq.int_inst_queue_wakeup_accesses 275821613 # Number of integer instruction queue wakeup accesses system.cpu2.iq.fp_inst_queue_reads 281 # Number of floating instruction queue reads -system.cpu2.iq.fp_inst_queue_writes 236 # Number of floating instruction queue writes +system.cpu2.iq.fp_inst_queue_writes 244 # Number of floating instruction queue writes system.cpu2.iq.fp_inst_queue_wakeup_accesses 108 # Number of floating instruction queue wakeup accesses system.cpu2.iq.int_alu_accesses 279330355 # Number of integer alu accesses system.cpu2.iq.fp_alu_accesses 137 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/system.pc.com_1.terminal b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/system.pc.com_1.terminal index 5e6b18ba5..7bbf48df7 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/system.pc.com_1.terminal +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/system.pc.com_1.terminal @@ -29,7 +29,7 @@ Built 1 zonelists. Total pages: 30610 Kernel command line: earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
Initializing CPU#0
PID hash table entries: 512 (order: 9, 4096 bytes)
-time.c: Detected 2000.002 MHz processor.
+time.c: Detected 2000.007 MHz processor.
Console: colour dummy device 80x25
console handover: boot [earlyser0] -> real [ttyS0]
Dentry cache hash table entries: 16384 (order: 5, 131072 bytes)
@@ -46,7 +46,7 @@ ACPI: Core revision 20070126 ACPI Exception (tbxface-0618): AE_NO_ACPI_TABLES, While loading namespace from ACPI tables [20070126]
ACPI: Unable to load the System Description Tables
Using local APIC timer interrupts.
-result 7812526
+result 7812546
Detected 7.812 MHz APIC timer.
NET: Registered protocol family 16
PCI: Using configuration type 1
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini index 3203f61e7..698e8108f 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -145,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -192,6 +189,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -209,7 +207,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -501,7 +498,7 @@ assoc=2 clk_domain=system.cpu_clk_domain demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -568,6 +565,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -585,7 +583,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -669,13 +666,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -691,9 +691,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/mcf +executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/mcf gid=100 -input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in +input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in kvmInSE=false max_stack_size=67108864 output=cout @@ -724,11 +724,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -759,7 +762,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr index 1a4f96712..e9c9539d6 100755 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr @@ -1 +1,2 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes) warn: Sockets disabled, not accepting gdb connections diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout index f37d93ec9..eaa0003ec 100755 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:22:42 -gem5 started Jun 21 2014 21:33:12 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:34:28 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing + Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x666d940 + 0: system.cpu.isa: ISA system set to: 0 0x299b730 info: Entering event queue @ 0. Starting simulation... MCF SPEC version 1.6.I @@ -24,4 +25,4 @@ simplex iterations : 2663 flow value : 3080014995 checksum : 68389 optimal -Exiting @ tick 26894328500 because target called exit() +Exiting @ tick 58202727500 because target called exit() diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt index 0eb73f5eb..7cd5a5ef6 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.058203 # Nu sim_ticks 58202727500 # Number of ticks simulated final_tick 58202727500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 129726 # Simulator instruction rate (inst/s) -host_op_rate 130372 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 83346935 # Simulator tick rate (ticks/s) -host_mem_usage 443628 # Number of bytes of host memory used -host_seconds 698.32 # Real time elapsed on the host +host_inst_rate 129301 # Simulator instruction rate (inst/s) +host_op_rate 129945 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 83074382 # Simulator tick rate (ticks/s) +host_mem_usage 373768 # Number of bytes of host memory used +host_seconds 700.61 # Real time elapsed on the host sim_insts 90589798 # Number of instructions simulated sim_ops 91041029 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -468,7 +468,7 @@ system.cpu.iq.iqInstsAdded 109694902 # Nu system.cpu.iq.iqNonSpecInstsAdded 8246 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 101389982 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 1073881 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 18465721 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 18662119 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 41703174 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 28 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 116352474 # Number of insts issued each cycle @@ -561,10 +561,10 @@ system.cpu.iq.rate 0.871007 # In system.cpu.iq.fu_busy_cnt 20109961 # FU busy when requested system.cpu.iq.fu_busy_rate 0.198343 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 340315821 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 128169527 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 128365920 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 99626078 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 459 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 609 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 614 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 115 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 121499704 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 239 # Number of floating point alu accesses diff --git a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini index 75b239bd4..80f56aa0a 100644 --- a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini +++ b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -139,7 +140,7 @@ clk_domain=system.cpu_clk_domain eventq_index=0 [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -153,7 +154,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -620,8 +620,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -642,9 +645,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/mcf +executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/mcf gid=100 -input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in +input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in kvmInSE=false max_stack_size=67108864 output=cout @@ -675,11 +678,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master @@ -710,7 +716,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simerr b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simerr index 1a4f96712..e9c9539d6 100755 --- a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simerr +++ b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simerr @@ -1 +1,2 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes) warn: Sockets disabled, not accepting gdb connections diff --git a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout index b2e148902..d8c79ae54 100755 --- a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout +++ b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout @@ -1,12 +1,11 @@ -Redirecting stdout to build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing/simout -Redirecting stderr to build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:13:07 -gem5 started Jun 21 2014 16:50:55 +gem5 compiled Apr 22 2015 08:10:29 +gem5 started Apr 22 2015 09:28:24 gem5 executing on phenom command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... @@ -18,12 +17,12 @@ All Rights Reserved. nodes : 500 active arcs : 1905 simplex iterations : 1502 -info: Increasing stack size by one page. flow value : 4990014995 new implicit arcs : 23867 active arcs : 25772 simplex iterations : 2663 +info: Increasing stack size by one page. flow value : 3080014995 checksum : 68389 optimal -Exiting @ tick 64361067000 because target called exit() +Exiting @ tick 62113055500 because target called exit() diff --git a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt index 3dba3eae0..22fd463ff 100644 --- a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt +++ b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.062113 # Nu sim_ticks 62113055500 # Number of ticks simulated final_tick 62113055500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 113198 # Simulator instruction rate (inst/s) -host_op_rate 199324 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 44503726 # Simulator tick rate (ticks/s) -host_mem_usage 454072 # Number of bytes of host memory used -host_seconds 1395.68 # Real time elapsed on the host +host_inst_rate 109820 # Simulator instruction rate (inst/s) +host_op_rate 193376 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 43175715 # Simulator tick rate (ticks/s) +host_mem_usage 386160 # Number of bytes of host memory used +host_seconds 1438.61 # Real time elapsed on the host sim_insts 157988547 # Number of instructions simulated sim_ops 278192464 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -349,7 +349,7 @@ system.cpu.iq.iqInstsAdded 325477303 # Nu system.cpu.iq.iqNonSpecInstsAdded 2126 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 307989355 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 51384 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 46683880 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 47286965 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 68913858 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 1681 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 124161279 # Number of insts issued each cycle @@ -442,10 +442,10 @@ system.cpu.iq.rate 2.479264 # In system.cpu.iq.fu_busy_cnt 4211210 # FU busy when requested system.cpu.iq.fu_busy_rate 0.013673 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 744402178 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 372203676 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 372806758 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 305987015 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 405 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 719 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 722 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 146 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 312167028 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 199 # Number of floating point alu accesses diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini b/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini index 537f6d0ab..845c48f32 100644 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -145,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -192,6 +189,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -209,7 +207,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -501,7 +498,7 @@ assoc=2 clk_domain=system.cpu_clk_domain demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -568,6 +565,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -585,7 +583,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -669,13 +666,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -691,9 +691,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser +executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/parser gid=100 -input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in +input=/home/stever/m5/dist/cpu2000/data/parser/mdred/input/parser.in kvmInSE=false max_stack_size=67108864 output=cout @@ -724,11 +724,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -759,7 +762,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr index 5d8946ede..be90b0340 100755 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr @@ -1,2 +1,3 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: CP14 unimplemented crn[8], opc1[2], crm[9], opc2[4] diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout index 0d3306a6b..84abcb43e 100755 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:22:42 -gem5 started Jun 21 2014 21:42:28 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:19:35 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/20.parser/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/20.parser/arm/linux/o3-timing + Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x6824800 + 0: system.cpu.isa: ISA system set to: 0 0x3ca3710 info: Entering event queue @ 0. Starting simulation... Reading the dictionary files: ************************************************* @@ -68,4 +69,4 @@ info: Increasing stack size by one page. about 2 million people attended the five best costumes got prizes No errors! -Exiting @ tick 201639641000 because target called exit() +Exiting @ tick 233381523500 because target called exit() diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt index f698c7645..2bb46ae0a 100644 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.233382 # Nu sim_ticks 233381523500 # Number of ticks simulated final_tick 233381523500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 139639 # Simulator instruction rate (inst/s) -host_op_rate 151279 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 64502789 # Simulator tick rate (ticks/s) -host_mem_usage 317896 # Number of bytes of host memory used -host_seconds 3618.16 # Real time elapsed on the host +host_inst_rate 138194 # Simulator instruction rate (inst/s) +host_op_rate 149713 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 63835070 # Simulator tick rate (ticks/s) +host_mem_usage 248488 # Number of bytes of host memory used +host_seconds 3656.01 # Real time elapsed on the host sim_insts 505237723 # Number of instructions simulated sim_ops 547350944 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -478,7 +478,7 @@ system.cpu.iq.iqInstsAdded 668168633 # Nu system.cpu.iq.iqNonSpecInstsAdded 2978333 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 610244720 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 5860928 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 122748160 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 123796022 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 319249921 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 701 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 465881386 # Number of insts issued each cycle @@ -571,7 +571,7 @@ system.cpu.iq.rate 1.307397 # In system.cpu.iq.fu_busy_cnt 135784339 # FU busy when requested system.cpu.iq.fu_busy_rate 0.222508 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 1828015800 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 793923222 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 794971084 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 594984495 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 293 # Number of floating instruction queue reads system.cpu.iq.fp_inst_queue_writes 316 # Number of floating instruction queue writes diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini b/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini index 4683e5b55..cc46946c9 100644 --- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini +++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -139,7 +140,7 @@ clk_domain=system.cpu_clk_domain eventq_index=0 [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -153,7 +154,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -620,8 +620,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -642,9 +645,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser +executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/parser gid=100 -input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in +input=/home/stever/m5/dist/cpu2000/data/parser/mdred/input/parser.in kvmInSE=false max_stack_size=67108864 output=cout @@ -675,11 +678,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master @@ -710,7 +716,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/simerr b/tests/long/se/20.parser/ref/x86/linux/o3-timing/simerr index 1a4f96712..341b479f7 100755 --- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/simerr +++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/simerr @@ -1 +1,2 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/simout b/tests/long/se/20.parser/ref/x86/linux/o3-timing/simout index 746dbf385..09a2affd6 100755 --- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/simout +++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/simout @@ -1,16 +1,17 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:13:07 -gem5 started Jun 21 2014 22:34:22 +gem5 compiled Apr 22 2015 08:10:29 +gem5 started Apr 22 2015 09:35:25 gem5 executing on phenom command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... - Reading the dictionary files: *********info: Increasing stack size by one page. -info: Increasing stack size by one page. -******************************info: Increasing stack size by one page. + Reading the dictionary files: *******info: Increasing stack size by one page. +**info: Increasing stack size by one page. +**************************************info: Increasing stack size by one page. info: Increasing stack size by one page. info: Increasing stack size by one page. info: Increasing stack size by one page. @@ -22,7 +23,7 @@ info: Increasing stack size by one page. info: Increasing stack size by one page. info: Increasing stack size by one page. info: Increasing stack size by one page. -********** +** 58924 words stored in 3784810 bytes @@ -88,4 +89,4 @@ info: Increasing stack size by one page. about 2 million people attended the five best costumes got prizes No errors! -Exiting @ tick 456433328000 because target called exit() +Exiting @ tick 455715234500 because target called exit() diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt index 9b577089a..08f5e873d 100644 --- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt +++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.455715 # Nu sim_ticks 455715234500 # Number of ticks simulated final_tick 455715234500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 71545 # Simulator instruction rate (inst/s) -host_op_rate 132294 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 39430208 # Simulator tick rate (ticks/s) -host_mem_usage 421584 # Number of bytes of host memory used -host_seconds 11557.52 # Real time elapsed on the host +host_inst_rate 95556 # Simulator instruction rate (inst/s) +host_op_rate 176693 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 52663419 # Simulator tick rate (ticks/s) +host_mem_usage 364636 # Number of bytes of host memory used +host_seconds 8653.35 # Real time elapsed on the host sim_insts 826877109 # Number of instructions simulated sim_ops 1528988701 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -370,7 +370,7 @@ system.cpu.iq.iqInstsAdded 2112788093 # Nu system.cpu.iq.iqNonSpecInstsAdded 24468 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 1829137533 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 426447 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 579133879 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 583823860 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 1007575077 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 23916 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 911228208 # Number of insts issued each cycle @@ -463,10 +463,10 @@ system.cpu.iq.rate 2.006886 # In system.cpu.iq.fu_busy_cnt 26638041 # FU busy when requested system.cpu.iq.fu_busy_rate 0.014563 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 4596535787 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 2692210314 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 2696900293 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 1799537822 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 31975 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 69900 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 69902 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 6901 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 1853040947 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 14852 # Number of floating point alu accesses diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini index de709e95a..b858d7bf1 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -133,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -147,7 +148,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -587,8 +587,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -609,7 +612,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/eon +executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/eon gid=100 input=cin kvmInSE=false @@ -642,11 +645,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -677,7 +683,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr index 664365742..3b53ebc6c 100755 --- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr +++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr @@ -1,3 +1,4 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout index 5f8084c1c..c9fcb56b0 100755 --- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout @@ -1,14 +1,15 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 19 2014 12:27:06 -gem5 started Jul 19 2014 12:27:28 +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:19:59 gem5 executing on phenom command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Eon, Version 1.1 info: Increasing stack size by one page. OO-style eon Time= 0.066667 -Exiting @ tick 72880000500 because target called exit() +Exiting @ tick 69793219500 because target called exit() diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt index 52921a0e6..1cb945d89 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.069793 # Nu sim_ticks 69793219500 # Number of ticks simulated final_tick 69793219500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 248568 # Simulator instruction rate (inst/s) -host_op_rate 248568 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 46191499 # Simulator tick rate (ticks/s) -host_mem_usage 302704 # Number of bytes of host memory used -host_seconds 1510.95 # Real time elapsed on the host +host_inst_rate 237836 # Simulator instruction rate (inst/s) +host_op_rate 237836 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 44197170 # Simulator tick rate (ticks/s) +host_mem_usage 232228 # Number of bytes of host memory used +host_seconds 1579.13 # Real time elapsed on the host sim_insts 375574808 # Number of instructions simulated sim_ops 375574808 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -364,7 +364,7 @@ system.cpu.iq.iqInstsAdded 415046688 # Nu system.cpu.iq.iqNonSpecInstsAdded 308 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 407272286 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 487219 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 39326693 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 39472187 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 18379010 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 93 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 139281263 # Number of insts issued each cycle @@ -457,10 +457,10 @@ system.cpu.iq.rate 2.917707 # In system.cpu.iq.fu_busy_cnt 19969288 # FU busy when requested system.cpu.iq.fu_busy_rate 0.049032 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 626696170 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 266696972 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 266819247 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 237458259 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 347586172 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 187752417 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 187775636 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 163387975 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 246426590 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 180781403 # Number of floating point alu accesses diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini b/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini index 05b955543..b4eb9458f 100644 --- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -145,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -192,6 +189,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -209,7 +207,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -501,7 +498,7 @@ assoc=2 clk_domain=system.cpu_clk_domain demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -568,6 +565,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -585,7 +583,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -669,13 +666,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -691,7 +691,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon +executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/eon gid=100 input=cin kvmInSE=false @@ -724,11 +724,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -759,7 +762,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr index a25196116..613c6a6b7 100755 --- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr @@ -1,3 +1,4 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections getting pixel output filename pixels_out.cook opening control file chair.control.cook diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout index 35d0eb5ad..88cf501ca 100755 --- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout @@ -1,17 +1,18 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:22:42 -gem5 started Jun 21 2014 21:42:59 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:46:25 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/30.eon/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/30.eon/arm/linux/o3-timing + Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x6560400 + 0: system.cpu.isa: ISA system set to: 0 0x2c9dca0 info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Eon, Version 1.1 info: Increasing stack size by one page. info: Increasing stack size by one page. info: Increasing stack size by one page. -OO-style eon Time= 0.060000 -Exiting @ tick 64766858000 because target called exit() +OO-style eon Time= 0.110000 +Exiting @ tick 112553814500 because target called exit() diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt index 44f85cf9d..bf0686636 100644 --- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.112554 # Nu sim_ticks 112553814500 # Number of ticks simulated final_tick 112553814500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 125235 # Simulator instruction rate (inst/s) -host_op_rate 150358 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 51625290 # Simulator tick rate (ticks/s) -host_mem_usage 326264 # Number of bytes of host memory used -host_seconds 2180.21 # Real time elapsed on the host +host_inst_rate 123079 # Simulator instruction rate (inst/s) +host_op_rate 147770 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 50736526 # Simulator tick rate (ticks/s) +host_mem_usage 257068 # Number of bytes of host memory used +host_seconds 2218.40 # Real time elapsed on the host sim_insts 273037219 # Number of instructions simulated sim_ops 327811601 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -447,7 +447,7 @@ system.cpu.iq.iqInstsAdded 353235129 # Nu system.cpu.iq.iqNonSpecInstsAdded 28024 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 346404668 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 2300304 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 24831082 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 25451552 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 73599170 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 5904 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 224784448 # Number of insts issued each cycle @@ -540,10 +540,10 @@ system.cpu.iq.rate 1.538840 # In system.cpu.iq.fu_busy_cnt 124292517 # FU busy when requested system.cpu.iq.fu_busy_rate 0.358807 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 756686876 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 251306416 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 251708205 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 223263085 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 287499729 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 126798006 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 127016687 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 117424806 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 303164482 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 167532703 # Number of floating point alu accesses diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini index 3d200442c..f01e763b0 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -133,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -147,7 +148,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -155,6 +155,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -502,6 +503,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -551,6 +553,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -584,8 +587,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -600,14 +606,16 @@ eventq_index=0 type=LiveProcess cmd=perlbmk -I. -I lib mdred.makerand.pl cwd=build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing +drivers= egid=100 env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk +executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -637,11 +645,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -672,7 +683,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -681,6 +692,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr index cf5d2b5cc..41d370561 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr @@ -1,3 +1,4 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout index 9bffb3068..408e44e03 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout @@ -1,1388 +1,651 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 19 2014 12:27:06 -gem5 started Jul 19 2014 12:27:27 +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:48:44 gem5 executing on phenom command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. info: Increasing stack size by one page. -1375000: 2038431008 -1374000: 3487365506 -1373000: 4184770123 -1372000: 1943746837 -1371000: 2651673663 -1370000: 1493817016 -1369000: 2894014801 -1368000: 1932092157 -1367000: 1670009799 -1366000: 828662248 -1365000: 1816650195 -1364000: 4173139012 -1363000: 3990577549 -1362000: 1330366815 -1361000: 3316935553 -1360000: 961300001 -1359000: 344963924 -1358000: 1930356625 -1357000: 1640964266 -1356000: 3777883312 -1355000: 1651132665 -1354000: 1971433151 -1353000: 3024027448 -1352000: 1956387036 -1351000: 1490224841 -1350000: 3286956460 -1349000: 2793131848 -1348000: 2529224907 -1347000: 2622295253 -1346000: 1414103189 -1345000: 3861617587 -1344000: 3506378216 -1343000: 1667466720 -1342000: 2899224065 -1341000: 1681491556 -1340000: 1076311729 -1339000: 4066972664 -1338000: 3438059028 -1337000: 2938359730 -1336000: 1214615378 -1335000: 3814432458 -1334000: 2944038793 -1333000: 3428045644 -1332000: 2815822229 -1331000: 1093465585 -1330000: 3012217108 -1329000: 2230916791 -1328000: 208547885 -1327000: 3592585825 -1326000: 3948677052 -1325000: 1817805162 -1324000: 135366494 -1323000: 3309148112 -1322000: 1685035744 -1321000: 3293068577 -1320000: 4097808567 -1319000: 1594097274 -1318000: 2607196971 -1317000: 1763785306 -1316000: 2157394178 -1315000: 2399031328 -1314000: 2954547004 -1313000: 82348686 -1312000: 3120930785 -1311000: 2192747320 -1310000: 1580299400 -1309000: 4085061477 -1308000: 3627048345 -1307000: 3756533178 -1306000: 77997329 -1305000: 1343359499 -1304000: 1124031730 -1303000: 1161755432 -1302000: 1855858423 -1301000: 3985872257 -1300000: 3188250811 -1299000: 3621615933 -1298000: 962624248 -1297000: 447138785 -1296000: 1459144309 -1295000: 3454504226 -1294000: 2154913347 -1293000: 2356291788 -1292000: 458348817 -1291000: 3639562699 -1290000: 3596847973 -1289000: 117168222 -1288000: 3531023849 -1287000: 3135920051 -1286000: 234987844 -1285000: 2048767180 -1284000: 2437301839 -1283000: 522886780 -1282000: 2274133042 -1281000: 1415703448 -1280000: 4145574054 -1279000: 4283494580 -1278000: 3305365779 -1277000: 604711974 -1276000: 2031548723 -1275000: 1809515149 -1274000: 1664703088 -1273000: 4149809153 -1272000: 4045608138 -1271000: 1687605659 -1270000: 1292294527 -1269000: 3120968162 -1268000: 3502898850 -1267000: 371380256 -1266000: 1683884245 -1265000: 1849576817 -1264000: 1559050991 -1263000: 66820972 -1262000: 4023539201 -1261000: 3452295398 -1260000: 4188778026 -1259000: 2008091854 -1258000: 2691158394 -1257000: 2030818206 -1256000: 2715523403 -1255000: 3473414015 -1254000: 138826953 -1253000: 69386516 -1252000: 1174725971 -1251000: 4130510373 -1250000: 1649788328 -1249000: 1589122801 -1248000: 1108688101 -1247000: 2906355484 -1246000: 379539929 -1245000: 914026021 -1244000: 4074858468 -1243000: 505989635 -1242000: 2487288773 -1241000: 1991248111 -1240000: 2415456875 -1239000: 2571192525 -1238000: 2897090536 -1237000: 2761178989 -1236000: 1296601829 -1235000: 594696756 -1234000: 264562726 -1233000: 3630852367 -1232000: 1605618457 -1231000: 2857419452 -1230000: 3028672437 -1229000: 361833758 -1228000: 4046013938 -1227000: 1031775583 -1226000: 3475227831 -1225000: 802168737 -1224000: 3819194009 -1223000: 851157666 -1222000: 2656457905 -1221000: 2579045204 -1220000: 2091024410 -1219000: 4070633834 -1218000: 1926611791 -1217000: 1903813761 -1216000: 3107168794 -1215000: 2975081979 -1214000: 4097089273 -1213000: 328943233 -1212000: 2912404803 -1211000: 181334180 -1210000: 863898367 -1209000: 1894902343 -1208000: 1531985231 -1207000: 1412503751 -1206000: 662457490 -1205000: 3447925432 -1204000: 2320889638 -1203000: 303282255 -1202000: 1568632659 -1201000: 1108711074 -1200000: 953936964 -1199000: 3576987258 -1198000: 466163300 -1197000: 1159551420 -1196000: 529807534 -1195000: 1528979627 -1194000: 1795576953 -1193000: 2050917610 -1192000: 4068219994 -1191000: 3573497288 -1190000: 776005286 -1189000: 2643125982 -1188000: 2240857507 -1187000: 43353719 -1186000: 2474198261 -1185000: 1711347056 -1184000: 3046018343 -1183000: 664346074 -1182000: 3532392595 -1181000: 3145347726 -1180000: 2203928246 -1179000: 4275910811 -1178000: 3260065240 -1177000: 3216083720 -1176000: 3588515377 -1175000: 1432542416 -1174000: 173159992 -1173000: 4115057268 -1172000: 223456174 -1171000: 1192164227 -1170000: 2059254624 -1169000: 279921804 -1168000: 1100495449 -1167000: 264813624 -1166000: 2839280440 -1165000: 301796904 -1164000: 1331933822 -1163000: 647427882 -1162000: 3872813324 -1161000: 2231068824 -1160000: 4222672618 -1159000: 3629229584 -1158000: 2262586804 -1157000: 2837951671 -1156000: 1780662312 -1155000: 31553143 -1154000: 3230861653 -1153000: 1991458597 -1152000: 2277829165 -1151000: 3864184029 -1150000: 630158826 -1149000: 4028889917 -1148000: 1662505287 -1147000: 4121796538 -1146000: 3215277282 -1145000: 2019794999 -1144000: 4124433286 -1143000: 181819953 -1142000: 2704380222 -1141000: 2487909897 -1140000: 1753570204 -1139000: 2337507591 -1138000: 3235449912 -1137000: 3819353806 -1136000: 3435413746 -1135000: 3288196653 -1134000: 2705083758 -1133000: 997301031 -1132000: 1871866706 -1131000: 2298991521 -1130000: 1516060457 -1129000: 3393393053 -1128000: 2795526466 -1127000: 1177801041 -1126000: 4226698729 -1125000: 567826718 -1124000: 2425735007 -1123000: 1090360485 -1122000: 2508061782 -1121000: 3476086116 -1120000: 2952087827 -1119000: 2238445545 -1118000: 2937037425 -1117000: 1773353797 -1116000: 3033333765 -1115000: 3086246055 -1114000: 944390435 -1113000: 2944932895 -1112000: 534683663 -1111000: 2002175399 -1110000: 1876265996 -1109000: 4148000592 -1108000: 3857174625 -1107000: 843045539 -1106000: 307772960 -1105000: 4161975075 -1104000: 3675447412 -1103000: 1232242543 -1102000: 1019583281 -1101000: 1983565552 -1100000: 2490901544 -1099000: 2990982808 -1098000: 1586955629 -1097000: 1629138000 -1096000: 1870655270 -1095000: 2201093764 -1094000: 696079363 -1093000: 1526904315 -1092000: 553848190 -1091000: 4234411636 -1090000: 1027439894 -1089000: 1319115149 -1088000: 1147708285 -1087000: 3364503693 -1086000: 528432422 -1085000: 3289100476 -1084000: 3074065438 -1083000: 3664250869 -1082000: 2950591670 -1081000: 4207904839 -1080000: 3425353965 -1079000: 1069646286 -1078000: 1004956209 -1077000: 2642475281 -1076000: 364759474 -1075000: 2334969932 -1074000: 3907002684 -1073000: 273633783 -1072000: 4113182592 -1071000: 1404306188 -1070000: 3286171051 -1069000: 3531039414 -1068000: 4147513318 -1067000: 2466290219 -1066000: 2089005579 -1065000: 2617563073 -1064000: 3124838472 -1063000: 3731008114 -1062000: 4154022628 -1061000: 3389258714 -1060000: 3915149371 -1059000: 2280932986 -1058000: 2872952978 -1057000: 2381277834 -1056000: 1236179469 -1055000: 3256417375 -1054000: 2700213407 -1053000: 3418122897 -1052000: 3130247908 -1051000: 1897033028 -1050000: 2349143738 -1049000: 3789736749 -1048000: 409522147 -1047000: 3149279018 -1046000: 1323133366 -1045000: 3881472077 -1044000: 3363874422 -1043000: 3931657349 -1042000: 1220007174 -1041000: 3634450249 -1040000: 695184634 -1039000: 529508167 -1038000: 449827627 -1037000: 2817424280 -1036000: 1613482057 -1035000: 2632612792 -1034000: 852422020 -1033000: 4098325966 -1032000: 177298753 -1031000: 2286807874 -1030000: 2745349553 -1029000: 2387386570 -1028000: 2004317534 -1027000: 971343564 -1026000: 1583732447 -1025000: 2340780818 -1024000: 561110245 -1023000: 3012020895 -1022000: 1677066870 -1021000: 3046208682 -1020000: 2695506079 -1019000: 780536149 -1018000: 4225713741 -1017000: 420500410 -1016000: 3642094643 -1015000: 608695027 -1014000: 2161592269 -1013000: 930784800 -1012000: 1924051276 -1011000: 1889733886 -1010000: 1476038251 -1009000: 2908577467 -1008000: 2584082136 -1007000: 1713214537 -1006000: 3374346754 -1005000: 1173203719 -1004000: 1142288559 -1003000: 4195961973 -1002000: 1211260974 -1001000: 474231127 -1000000: 3967090782 -999000: 1543103493 -998000: 1018646803 -997000: 1799037982 -996000: 3416426509 -995000: 3581729971 -994000: 3044504127 -993000: 2975704335 -992000: 280018795 -991000: 330300280 -990000: 3557016064 -989000: 3856724468 -988000: 2124201285 -987000: 3683893247 -986000: 3331663795 -985000: 1980057740 -984000: 2908437859 -983000: 4074086941 -982000: 1162307093 -981000: 3855413476 -980000: 2799155731 -979000: 2477822501 -978000: 497762075 -977000: 1650233426 -976000: 3061573902 -975000: 2224673611 -974000: 868725340 -973000: 1630206962 -972000: 2549398924 -971000: 602424332 -970000: 1172502721 -969000: 2923795552 -968000: 1394164637 -967000: 1088479837 -966000: 898709052 -965000: 3983150961 -964000: 2463803866 -963000: 4181117626 -962000: 2151137820 -961000: 1342513757 -960000: 1507689687 -959000: 3652624918 -958000: 4169721124 -957000: 531022334 -956000: 3161389505 -955000: 1197637232 -954000: 2927231791 -953000: 2552305374 -952000: 2988512039 -951000: 2448639370 -950000: 3560951660 -949000: 948988399 -948000: 2488188856 -947000: 2804177113 -946000: 1991587461 -945000: 2480044082 -944000: 1954588624 -943000: 924231798 -942000: 3269047595 -941000: 2078696579 -940000: 2822989969 -939000: 2295885951 -938000: 1815612561 -937000: 4182254074 -936000: 2753223967 -935000: 2840201908 -934000: 4058383142 -933000: 4270167260 -932000: 1203124158 -931000: 3039861400 -930000: 4247472610 -929000: 2297661055 -928000: 2376159704 -927000: 3861417958 -926000: 1968685250 -925000: 1156966624 -924000: 3568580529 -923000: 866582344 -922000: 2263113297 -921000: 3643523016 -920000: 3252268544 -919000: 2413309783 -918000: 3463124619 -917000: 3965291932 -916000: 1309181143 -915000: 2321282614 -914000: 2286584604 -913000: 3271924727 -912000: 1719841316 -911000: 3966124343 -910000: 607707072 -909000: 61942114 -908000: 903881820 -907000: 4136948835 -906000: 3663861210 -905000: 3251888710 -904000: 227984688 -903000: 495030333 -902000: 863290992 -901000: 3297482717 -900000: 3821175085 -899000: 1679874522 -898000: 2033358728 -897000: 3495513776 -896000: 1613181881 -895000: 1729312232 -894000: 2171317375 -893000: 2508603694 -892000: 151095866 -891000: 1926096901 -890000: 4292888210 -889000: 2716307666 -888000: 737310728 -887000: 4172392976 -886000: 2322084662 -885000: 1034961047 -884000: 665072958 -883000: 368014441 -882000: 1914585160 -881000: 3836900884 -880000: 2073827187 -879000: 1650543625 -878000: 3581099222 -877000: 147580905 -876000: 4009421518 -875000: 3294244820 -874000: 2786720968 -873000: 1682434702 -872000: 620473876 -871000: 742752376 -870000: 385116650 -869000: 3882475387 -868000: 4259210265 -867000: 1329675866 -866000: 539876515 -865000: 2761681036 -864000: 2192063038 -863000: 1512848001 -862000: 3911973718 -861000: 399349760 -860000: 1449497249 -859000: 4241714042 -858000: 18611709 -857000: 1550083097 -856000: 3322762748 -855000: 283796511 -854000: 227907270 -853000: 3162559866 -852000: 1331946455 -851000: 2328467927 -850000: 1640242501 -849000: 3390154083 -848000: 22088346 -847000: 636412590 -846000: 1550672808 -845000: 763937899 -844000: 430123910 -843000: 3413971543 -842000: 900018421 -841000: 3295874222 -840000: 2470678073 -839000: 821401909 -838000: 3923898844 -837000: 429069328 -836000: 2030779868 -835000: 464625222 -834000: 3593024182 -833000: 3564354808 -832000: 2794783695 -831000: 97817593 -830000: 4197446076 -829000: 2367560230 -828000: 2180262123 -827000: 3149571964 -826000: 1364436763 -825000: 21599634 -824000: 448490256 -823000: 3775294409 -822000: 1132631425 -821000: 2046352434 -820000: 3380435217 -819000: 3672496486 -818000: 1634548077 -817000: 2881316258 -816000: 1808599559 -815000: 3298310748 -814000: 3744285741 -813000: 3540737709 -812000: 1143844515 -811000: 3091026783 -810000: 3771757792 -809000: 631375816 -808000: 1353831646 -807000: 3047756240 -806000: 818136890 -805000: 783072818 -804000: 3923416267 -803000: 3233085529 -802000: 674747602 -801000: 758523180 -800000: 2232308489 -799000: 2919643710 -798000: 623631722 -797000: 1302202741 -796000: 1083055596 -795000: 2358048936 -794000: 2836842068 -793000: 1612571734 -792000: 4243459584 -791000: 1585511173 -790000: 1493369943 -789000: 3649557715 -788000: 3223859588 -787000: 4001130195 -786000: 2949323631 -785000: 3887611007 -784000: 4091766333 -783000: 2954277998 -782000: 1281850218 -781000: 771664458 -780000: 2242576209 -779000: 3865479146 -778000: 1885013114 -777000: 2032659742 -776000: 4221167450 -775000: 1962824751 -774000: 209539683 -773000: 262945027 -772000: 452388820 -771000: 2006266573 -770000: 990063860 -769000: 1377951885 -768000: 4240978277 -767000: 2206801004 -766000: 258015097 -765000: 1990217201 -764000: 1336410303 -763000: 1004853228 -762000: 1404152873 -761000: 3356554358 -760000: 4052430907 -759000: 2833671166 -758000: 1561723151 -757000: 1752620777 -756000: 2622547462 -755000: 1843933196 -754000: 3728801998 -753000: 2776832730 -752000: 2626131293 -751000: 1528525830 -750000: 2716112581 -749000: 3306039713 -748000: 915271993 -747000: 4205133363 -746000: 3136321783 -745000: 1203154793 -744000: 3370017183 -743000: 4036456207 -742000: 3377556743 -741000: 3688568185 -740000: 3349738887 -739000: 1606411092 -738000: 331980874 -737000: 744409647 -736000: 3845688101 -735000: 3654026084 -734000: 786733128 -733000: 1938791337 -732000: 843210299 -731000: 622237260 -730000: 2851984401 -729000: 874906210 -728000: 485670931 -727000: 1522238607 -726000: 2167917076 -725000: 2304482464 -724000: 1053513779 -723000: 3535437378 -722000: 2842397393 -721000: 864490421 -720000: 920591184 -719000: 238249003 -718000: 400999105 -717000: 2476588521 -716000: 2501770197 -715000: 2307183887 -714000: 2461504446 -713000: 1055961242 -712000: 2112756603 -711000: 1691285107 -710000: 2318101701 -709000: 1113470660 -708000: 2880817109 -707000: 2105866601 -706000: 1441912219 -705000: 1684930572 -704000: 1652788290 -703000: 2359919145 -702000: 554008403 -701000: 3292620387 -700000: 3528106952 -699000: 3096375697 -698000: 4201459210 -697000: 1450879661 -696000: 3743939389 -695000: 3595614062 -694000: 4101634764 -693000: 364538097 -692000: 4204120947 -691000: 3706729229 -690000: 23134581 -689000: 2585120038 -688000: 488096133 -687000: 3437179533 -686000: 4233790378 -685000: 3093374794 -684000: 4054579709 -683000: 1275606548 -682000: 1966964511 -681000: 354765069 -680000: 3812578933 -679000: 781104418 -678000: 3281747368 -677000: 38547527 -676000: 1005246555 -675000: 74753563 -674000: 676561715 -673000: 1571462591 -672000: 1876054379 -671000: 1899005137 -670000: 4188106842 -669000: 1210903253 -668000: 2909261468 -667000: 3100970839 -666000: 758568698 -665000: 2456763236 -664000: 686978785 -663000: 349808361 -662000: 2804776250 -661000: 2660993423 -660000: 1758165672 -659000: 2116094507 -658000: 473425247 -657000: 563682488 -656000: 1454194093 -655000: 3211379305 -654000: 1298793267 -653000: 3374836733 -652000: 586356525 -651000: 1490379306 -650000: 2444980288 -649000: 47671514 -648000: 568687171 -647000: 452676234 -646000: 2752247721 -645000: 1473254180 -644000: 4189470166 -643000: 2619721788 -642000: 348627393 -641000: 675341258 -640000: 3183922211 -639000: 1266115377 -638000: 2331844572 -637000: 250721255 -636000: 4017517385 -635000: 1279621530 -634000: 1500904407 -633000: 2495457137 -632000: 1919479114 -631000: 1900388354 -630000: 370039669 -629000: 1207459690 -628000: 2314286843 -627000: 80099285 -626000: 2465533600 -625000: 1056979505 -624000: 4289445503 -623000: 1234007489 -622000: 2015973003 -621000: 2281387627 -620000: 1115405564 -619000: 1407699260 -618000: 3940256761 -617000: 3639431367 -616000: 3498942818 -615000: 2982957031 -614000: 3800830694 -613000: 1454837486 -612000: 158454584 -611000: 3414923339 -610000: 3752581462 -609000: 195868045 -608000: 3165948362 -607000: 2335822431 -606000: 3229210414 -605000: 1963422803 -604000: 2355005929 -603000: 2009365872 -602000: 1343084455 -601000: 2935056539 -600000: 2354171524 -599000: 3621510708 -598000: 3992266416 -597000: 682368260 -596000: 3290472265 -595000: 2215475388 -594000: 258049456 -593000: 365234760 -592000: 291875022 -591000: 3307168950 -590000: 2233802778 -589000: 1944100586 -588000: 7070250 -587000: 882601802 -586000: 1231725137 -585000: 4169259917 -584000: 2123453163 -583000: 631823798 -582000: 2039925673 -581000: 2238172862 -580000: 1479379031 -579000: 2363652063 -578000: 3186953219 -577000: 1893181853 -576000: 2598096173 -575000: 938779920 -574000: 927622241 -573000: 3105026014 -572000: 2412852365 -571000: 644810722 -570000: 3576393744 -569000: 2625468928 -568000: 2167447563 -567000: 3391359662 -566000: 3178493511 -565000: 24044406 -564000: 3298992941 -563000: 2054886551 -562000: 42479754 -561000: 2681525651 -560000: 1110769583 -559000: 2140540905 -558000: 780964175 -557000: 1320986796 -556000: 3624725635 -555000: 2920977559 -554000: 4017386186 -553000: 1800018968 -552000: 2137743255 -551000: 2282561617 -550000: 1466333871 -549000: 2567190002 -548000: 3280136825 -547000: 1761114084 -546000: 413841088 -545000: 829808286 -544000: 283842712 -543000: 3524860517 -542000: 1853927454 -541000: 3087398009 -540000: 2535138654 -539000: 2224833733 -538000: 1673737994 -537000: 3963575809 -536000: 289926670 -535000: 2411609896 -534000: 1866933324 -533000: 259728174 -532000: 786327819 -531000: 870136645 -530000: 3603849411 -529000: 1687141824 -528000: 2973109656 -527000: 2120372902 -526000: 3554894341 -525000: 369365218 -524000: 2336210870 -523000: 1352671703 -522000: 4093185231 -521000: 44309897 -520000: 1308207751 -519000: 1489447779 -518000: 497784082 -517000: 2370135551 -516000: 2393982064 -515000: 3453216376 -514000: 349616264 -513000: 1057922348 -512000: 2061823561 -511000: 2221803921 -510000: 2518047997 -509000: 2783356981 -508000: 3842023593 -507000: 3105321997 -506000: 3540124104 -505000: 334821209 -504000: 2867156116 -503000: 3824184936 -502000: 2432119674 -501000: 3759474841 -500000: 3381305904 -499000: 3106640260 -498000: 4241569809 -497000: 2499659818 -496000: 3971155346 -495000: 2297624439 -494000: 3455216298 -493000: 2152855317 -492000: 3915728702 -491000: 1087687366 -490000: 3976823873 -489000: 1813936857 -488000: 2803197060 -487000: 4026575712 -486000: 3867909271 -485000: 644795069 -484000: 1051897856 -483000: 3091023530 -482000: 558963440 -481000: 2516346710 -480000: 2405618228 -479000: 1595155902 -478000: 1699460683 -477000: 645434559 -476000: 1457238083 -475000: 101746166 -474000: 1054127445 -473000: 1703635926 -472000: 3228750510 -471000: 2570095523 -470000: 2671516672 -469000: 219569232 -468000: 245973042 -467000: 1785352151 -466000: 1828704556 -465000: 2993350381 -464000: 1802995474 -463000: 3689392931 -462000: 2612188341 -461000: 1970287287 -460000: 179729165 -459000: 1971694777 -458000: 3031333568 -457000: 844564594 -456000: 979968160 -455000: 2169589334 -454000: 2315813244 -453000: 2333801403 -452000: 27632567 -451000: 3752181065 -450000: 3965825733 -449000: 969798494 -448000: 1028884180 -447000: 1127216392 -446000: 2477366335 -445000: 3752023316 -444000: 1679036165 -443000: 4241934865 -442000: 3360200587 -441000: 3533494907 -440000: 1888455616 -439000: 2668699748 -438000: 2728196631 -437000: 31348508 -436000: 2192326452 -435000: 286955043 -434000: 4097630027 -433000: 1185622743 -432000: 2870795553 -431000: 2246074692 -430000: 14797454 -429000: 2606207217 -428000: 2143322684 -427000: 1289559127 -426000: 3922285071 -425000: 590638427 -424000: 1098669098 -423000: 1597510568 -422000: 1623191243 -421000: 558862770 -420000: 3846690181 -419000: 3187756225 -418000: 2520849981 -417000: 492022774 -416000: 1621927303 -415000: 2828836994 -414000: 2840605981 -413000: 4260845378 -412000: 2200645444 -411000: 393061550 -410000: 3334889686 -409000: 1926958198 -408000: 2939424440 -407000: 4207748941 -406000: 4155428743 -405000: 89797563 -404000: 427509452 -403000: 1154877029 -402000: 4023324583 -401000: 359413604 -400000: 964788206 -399000: 3843097093 -398000: 1871599521 -397000: 2361845870 -396000: 4103568192 -395000: 622493054 -394000: 954921337 -393000: 3664395297 -392000: 2429042528 -391000: 1361036260 -390000: 1944048082 -389000: 1452288555 -388000: 1619598577 -387000: 481096019 -386000: 3719595713 -385000: 1840199850 -384000: 421723640 -383000: 2976677668 -382000: 618336385 -381000: 1777037748 -380000: 901802032 -379000: 621392881 -378000: 3857241587 -377000: 3115040335 -376000: 3173790487 -375000: 2517831056 -374000: 4125976072 -373000: 2294107866 -372000: 4127359945 -371000: 333946663 -370000: 3307391606 -369000: 4268094300 -368000: 91056295 -367000: 882600429 -366000: 730521557 -365000: 3957048081 -364000: 2139992409 -363000: 3504327478 -362000: 2637042137 -361000: 2718540805 -360000: 903036675 -359000: 1858031956 -358000: 1868403889 -357000: 2677157063 -356000: 1865569815 -355000: 224528281 -354000: 3144318856 -353000: 1968806079 -352000: 2836077060 -351000: 1981309964 -350000: 3105869514 -349000: 3793296439 -348000: 1267294125 -347000: 1962520375 -346000: 2150839102 -345000: 3811064048 -344000: 1298671776 -343000: 2150950779 -342000: 3522997671 -341000: 1378798782 -340000: 2213936395 -339000: 2117978968 -338000: 2444486361 -337000: 3928234621 -336000: 1645335376 -335000: 540013781 -334000: 1103798645 -333000: 1723781016 -332000: 1805323374 -331000: 3590394804 -330000: 4178797476 -329000: 3350975600 -328000: 1556948383 -327000: 2282601074 -326000: 1709618426 -325000: 637957139 -324000: 2719080929 -323000: 1847444832 -322000: 547261068 -321000: 581409575 -320000: 586567018 -319000: 1579880779 -318000: 1049735969 -317000: 3233747918 -316000: 351376358 -315000: 3446473138 -314000: 2099035319 -313000: 2827833754 -312000: 2717063452 -311000: 2212978977 -310000: 1583494069 -309000: 3119642323 -308000: 2946038826 -307000: 167580491 -306000: 3916319765 -305000: 3480693946 -304000: 2709010304 -303000: 3265576420 -302000: 3439318492 -301000: 1896109937 -300000: 339896540 -299000: 313850585 -298000: 2600289987 -297000: 4060531515 -296000: 3894455718 -295000: 3183544633 -294000: 1551799240 -293000: 3574197425 -292000: 2380783887 -291000: 3130665581 -290000: 1135162832 -289000: 3460550191 -288000: 3366619355 -287000: 501626025 -286000: 1070097358 -285000: 1023235560 -284000: 925313877 -283000: 3758987940 -282000: 1935539406 -281000: 3727463323 -280000: 4040081802 -279000: 2462105177 -278000: 322183212 -277000: 2437872102 -276000: 1085894622 -275000: 2118601354 -274000: 1720719726 -273000: 56294175 -272000: 2046218040 -271000: 2871320919 -270000: 3111863367 -269000: 726835633 -268000: 916866344 -267000: 1208374677 -266000: 2914608557 -265000: 449456198 -264000: 2645640532 -263000: 997311800 -262000: 2872564998 -261000: 1964496124 -260000: 2802080932 -259000: 387636194 -258000: 3813984224 -257000: 1921258264 -256000: 1414333533 -255000: 997845727 -254000: 3671258247 -253000: 3244313331 -252000: 44297738 -251000: 1055697350 -250000: 403951609 -249000: 3558182356 -248000: 3441722116 -247000: 3598259825 -246000: 2495236386 -245000: 4150113079 -244000: 4092477475 -243000: 1352323466 -242000: 4228179784 -241000: 3509286314 -240000: 1117669666 -239000: 1821539001 -238000: 2685425558 -237000: 3282158412 -236000: 976807931 -235000: 1960913234 -234000: 675404937 -233000: 2016845981 -232000: 3778769531 -231000: 1321297859 -230000: 84609577 -229000: 2736973360 -228000: 1143462599 -227000: 1152334102 -226000: 2661675401 -225000: 3384049744 -224000: 3321570349 -223000: 2151575803 -222000: 2950365334 -221000: 2791341163 -220000: 2912181889 -219000: 700726300 -218000: 3236687629 -217000: 384678680 -216000: 3027284798 -215000: 2124466541 -214000: 1634885735 -213000: 3025139089 -212000: 1913485355 -211000: 2451444114 -210000: 1597224573 -209000: 2863042887 -208000: 1462999033 -207000: 853998677 -206000: 1532111742 -205000: 3533822378 -204000: 1057056422 -203000: 2585913344 -202000: 1776380902 -201000: 2652271540 -200000: 2500553547 -199000: 3943435104 -198000: 615742187 -197000: 2089667313 -196000: 1649690458 -195000: 582691711 -194000: 1197398266 -193000: 2682453813 -192000: 1739971049 -191000: 1543584807 -190000: 4224852565 -189000: 2330603128 -188000: 2738873539 -187000: 2462336661 -186000: 538134005 -185000: 618406175 -184000: 3258203829 -183000: 3565635398 -182000: 2437456159 -181000: 1103703144 -180000: 3142082412 -179000: 3635072449 -178000: 2831183465 -177000: 3067391696 -176000: 4243880329 -175000: 3847103503 -174000: 1886736895 -173000: 3994782354 -172000: 2180961421 -171000: 2657714328 -170000: 1783032069 -169000: 3288794122 -168000: 4214505744 -167000: 3893811403 -166000: 301673242 -165000: 1008606441 -164000: 4241744599 -163000: 4077366883 -162000: 947408771 -161000: 2893412067 -160000: 4239854096 -159000: 837488883 -158000: 1035341013 -157000: 2979612216 -156000: 622879904 -155000: 2239033946 -154000: 1793603359 -153000: 3403674755 -152000: 1757769702 -151000: 3104338771 -150000: 4050901279 -149000: 1064027760 -148000: 1232980113 -147000: 1940798204 -146000: 1520506974 -145000: 1602654645 -144000: 3827165041 -143000: 2333560581 -142000: 1078945096 -141000: 4164769913 -140000: 1004088705 -139000: 1918334274 -138000: 2376094733 -137000: 2114404244 -136000: 610887654 -135000: 2061314834 -134000: 2934949429 -133000: 1384359308 -132000: 2214638498 -131000: 4091637905 -130000: 1178600936 -129000: 3673332079 -128000: 335936353 -127000: 1680711257 -126000: 1535342908 -125000: 1797602927 -124000: 1277174958 -123000: 3114077321 -122000: 149498793 -121000: 864366602 -120000: 104510626 -119000: 1518395286 -118000: 3111302078 -117000: 3110116836 -116000: 3233967498 -115000: 1017896311 -114000: 692827001 -113000: 3779537224 -112000: 2905474934 -111000: 3465999202 -110000: 1915694049 -109000: 2628022627 -108000: 875271541 -107000: 2022225002 -106000: 1671971011 -105000: 3334748297 -104000: 1332184097 -103000: 1555681497 -102000: 3406253965 -101000: 4045141299 -100000: 3058680000 -99000: 555036606 -98000: 46275609 -97000: 3853135904 -96000: 4229006385 -95000: 4108164708 -94000: 2566945975 -93000: 3797900910 -92000: 3355992329 -91000: 1635484145 -90000: 1382023482 -89000: 3690432221 -88000: 1892056918 -87000: 1120722079 -86000: 2675052236 -85000: 4165748502 -84000: 10230467 -83000: 4138070209 -82000: 1570296924 -81000: 3126342757 -80000: 598265835 -79000: 541475291 -78000: 2784920265 -77000: 4169891577 -76000: 1101249184 -75000: 2090307927 -74000: 3780559777 -73000: 19873425 -72000: 1118190767 -71000: 3485912405 -70000: 1322638834 -69000: 1096526516 -68000: 1370553703 -67000: 3631120381 -66000: 1806420191 -65000: 2701118072 -64000: 483879470 -63000: 2124403158 -62000: 1877513812 -61000: 1289006766 -60000: 3733667461 -59000: 3457358686 -58000: 732502949 -57000: 3971773677 -56000: 883589946 -55000: 290212168 -54000: 2244967385 -53000: 3848247179 -52000: 2228476206 -51000: 2372703555 -50000: 1200411530 -49000: 2060190456 -48000: 2511902942 -47000: 4007272287 -46000: 2854231300 -45000: 2518671311 -44000: 815143404 -43000: 1972543143 -42000: 3063716128 -41000: 3326571310 -40000: 3180391453 -39000: 2568545510 -38000: 573110821 -37000: 3814257324 -36000: 4163248735 -35000: 943584186 -34000: 387069186 -33000: 3519377243 -32000: 3861206003 -31000: 2378381393 -30000: 3259365221 -29000: 3960625204 -28000: 3476394666 -27000: 1995310421 -26000: 1884341166 -25000: 3181801013 -24000: 116492838 -23000: 3276567587 -22000: 3693343729 -21000: 2595820568 -20000: 2397879436 -19000: 2692679578 -18000: 2368648652 -17000: 3098196844 -16000: 3913788179 -15000: 1240694507 -14000: 1586030084 -13000: 1211450031 -12000: 3458253062 -11000: 1804606651 -10000: 2128587109 -9000: 1894810186 -8000: 2221431098 -7000: 113605713 -6000: 4020003580 -5000: 2988041351 -4000: 2310084217 -3000: 1475476779 -2000: 760651391 -1000: 4031656975 -0: 2206428413 -Exiting @ tick 635929494500 because target called exit() +637000: 2581848540 +636000: 4117852332 +635000: 329081094 +634000: 545393176 +633000: 3107247613 +632000: 897887463 +631000: 806367477 +630000: 1682157095 +629000: 1188376072 +628000: 4076707785 +627000: 3521684454 +626000: 3144526095 +625000: 1399223384 +624000: 3380494826 +623000: 4086509498 +622000: 1473819475 +621000: 638751284 +620000: 3149483163 +619000: 1489851375 +618000: 1447059134 +617000: 136329498 +616000: 1288452788 +615000: 3949816816 +614000: 318984246 +613000: 1019963195 +612000: 2875280299 +611000: 2997394777 +610000: 4014932807 +609000: 2291235006 +608000: 355450951 +607000: 201970399 +606000: 3626124461 +605000: 2207253273 +604000: 2243886712 +603000: 46791684 +602000: 3176322294 +601000: 1120582847 +600000: 411705454 +599000: 3162380308 +598000: 2732375303 +597000: 1376844609 +596000: 3003023122 +595000: 3869968535 +594000: 1327286554 +593000: 160655029 +592000: 2038558826 +591000: 3948772976 +590000: 439262378 +589000: 329537197 +588000: 3678661972 +587000: 4240182727 +586000: 2283602206 +585000: 1129811410 +584000: 2831949168 +583000: 1224559023 +582000: 3161562107 +581000: 2695467835 +580000: 1234192577 +579000: 1974816198 +578000: 449576701 +577000: 1424873035 +576000: 2370444290 +575000: 1743089134 +574000: 2624046998 +573000: 2071148441 +572000: 2449219691 +571000: 3774476172 +570000: 1111630327 +569000: 121721805 +568000: 2981212266 +567000: 3811833647 +566000: 3676851843 +565000: 1766252334 +564000: 1622887950 +563000: 1684409857 +562000: 1686489387 +561000: 610219569 +560000: 2705092362 +559000: 108031723 +558000: 1316736987 +557000: 2434129258 +556000: 1411819652 +555000: 1173886179 +554000: 3044539233 +553000: 151590417 +552000: 3759426289 +551000: 3451520306 +550000: 294242855 +549000: 890241051 +548000: 876385779 +547000: 119864600 +546000: 3065674956 +545000: 1670853168 +544000: 997261561 +543000: 660227344 +542000: 3132294889 +541000: 521956271 +540000: 1133928405 +539000: 3838154786 +538000: 58624572 +537000: 3544030439 +536000: 432804999 +535000: 1021857051 +534000: 2644812356 +533000: 773094580 +532000: 901027171 +531000: 3976696839 +530000: 4167278216 +529000: 504481120 +528000: 320399857 +527000: 638048690 +526000: 3348998474 +525000: 2660662065 +524000: 2641437803 +523000: 626927006 +522000: 4063917554 +521000: 3212249308 +520000: 2561025301 +519000: 1078140141 +518000: 653939181 +517000: 2154098204 +516000: 3773089676 +515000: 2568381435 +514000: 3838886937 +513000: 941125346 +512000: 1318900410 +511000: 297013287 +510000: 241723934 +509000: 1835499795 +508000: 2309451230 +507000: 1174814430 +506000: 3615943386 +505000: 51034971 +504000: 3950453295 +503000: 4186097241 +502000: 327518343 +501000: 3052462710 +500000: 1586937404 +499000: 2169094819 +498000: 3613195151 +497000: 817359591 +496000: 1470916579 +495000: 2091261583 +494000: 2080080890 +493000: 1772858697 +492000: 2085609872 +491000: 3280632925 +490000: 1689322569 +489000: 2947406469 +488000: 765163324 +487000: 3122594732 +486000: 3385418480 +485000: 1712345567 +484000: 3675825158 +483000: 1558929764 +482000: 2672493410 +481000: 3822528440 +480000: 3741769935 +479000: 2794026235 +478000: 2541364185 +477000: 3964482316 +476000: 1202478165 +475000: 4027617791 +474000: 1905026738 +473000: 2573787636 +472000: 1170529797 +471000: 2272525618 +470000: 820833429 +469000: 3219769529 +468000: 2121197441 +467000: 269331764 +466000: 3038487237 +465000: 2462675338 +464000: 2703163101 +463000: 547052037 +462000: 3454526671 +461000: 2124641794 +460000: 1043737466 +459000: 1785834964 +458000: 3312335313 +457000: 1213835042 +456000: 3099430685 +455000: 3003350806 +454000: 3646781335 +453000: 1474165966 +452000: 705795987 +451000: 2723908407 +450000: 1323056304 +449000: 1157256530 +448000: 4077983523 +447000: 3189085703 +446000: 2241002747 +445000: 3229050072 +444000: 3500150226 +443000: 1290722604 +442000: 1866107725 +441000: 4238277470 +440000: 847346408 +439000: 2474557496 +438000: 2243092317 +437000: 706909230 +436000: 1303503693 +435000: 1456129560 +434000: 1073061079 +433000: 692226634 +432000: 186498656 +431000: 2203415525 +430000: 2183000701 +429000: 1007776545 +428000: 941117387 +427000: 3805851413 +426000: 1474193180 +425000: 4231673903 +424000: 2622576664 +423000: 388097625 +422000: 1165097488 +421000: 3226044518 +420000: 2531461570 +419000: 1509806310 +418000: 2667519114 +417000: 1751592438 +416000: 1286773513 +415000: 1098182293 +414000: 2111912709 +413000: 1230737431 +412000: 4090873946 +411000: 3998652133 +410000: 2486660396 +409000: 2120483596 +408000: 587404533 +407000: 188697995 +406000: 3265346093 +405000: 4234961905 +404000: 1211873901 +403000: 4265173305 +402000: 2208355316 +401000: 3315952806 +400000: 3917328941 +399000: 2523594649 +398000: 3805986783 +397000: 2624925960 +396000: 3716020189 +395000: 2016201122 +394000: 912930261 +393000: 596904160 +392000: 3571173642 +391000: 2290782861 +390000: 1162492227 +389000: 1738718380 +388000: 2599667355 +387000: 2382332909 +386000: 1471269037 +385000: 2238392684 +384000: 4034826126 +383000: 1378654892 +382000: 3702601850 +381000: 397206179 +380000: 2437704230 +379000: 4187604139 +378000: 779452169 +377000: 2010372403 +376000: 531902409 +375000: 1371470602 +374000: 4137796987 +373000: 567426549 +372000: 3082742955 +371000: 2271575596 +370000: 759731212 +369000: 4063369437 +368000: 299356452 +367000: 536656228 +366000: 3014961694 +365000: 3016542135 +364000: 2841873124 +363000: 524434057 +362000: 2887828889 +361000: 3865529589 +360000: 671363647 +359000: 3104594256 +358000: 1502485940 +357000: 1776624159 +356000: 4222478488 +355000: 4127624139 +354000: 2439477793 +353000: 1593794891 +352000: 591275342 +351000: 2177291538 +350000: 1923444781 +349000: 758084193 +348000: 775471359 +347000: 191356974 +346000: 494488375 +345000: 1990489399 +344000: 124118372 +343000: 2046377904 +342000: 1395427716 +341000: 1342299790 +340000: 38145994 +339000: 2291884417 +338000: 351940574 +337000: 3984301480 +336000: 2468666235 +335000: 371500747 +334000: 969922131 +333000: 240854580 +332000: 1644465214 +331000: 1539846168 +330000: 940087216 +329000: 1491329232 +328000: 2281687201 +327000: 3030170550 +326000: 3648503863 +325000: 2037898355 +324000: 174369956 +323000: 2433605668 +322000: 2334905107 +321000: 1597704047 +320000: 302297707 +319000: 3209203690 +318000: 3894539879 +317000: 2868907580 +316000: 2808087076 +315000: 4034586233 +314000: 3694191694 +313000: 2001671958 +312000: 559582279 +311000: 3043016195 +310000: 2785098502 +309000: 4104602138 +308000: 966154914 +307000: 2446376687 +306000: 789956605 +305000: 1708137092 +304000: 1733063901 +303000: 2924555399 +302000: 971356234 +301000: 481382543 +300000: 2647080988 +299000: 4065744916 +298000: 921140 +297000: 654346784 +296000: 485492098 +295000: 217516816 +294000: 4050820137 +293000: 534726686 +292000: 1686691079 +291000: 1316587195 +290000: 3746020838 +289000: 1641967381 +288000: 3492475215 +287000: 3154885393 +286000: 3686450617 +285000: 3589739293 +284000: 3558041700 +283000: 4130142319 +282000: 3132446063 +281000: 982677436 +280000: 799322395 +279000: 151715214 +278000: 3765942871 +277000: 1712470933 +276000: 3807622752 +275000: 4163730108 +274000: 1633425299 +273000: 1654241631 +272000: 1131025394 +271000: 1375475855 +270000: 553294237 +269000: 4091487177 +268000: 2841855980 +267000: 2997369904 +266000: 454385594 +265000: 3757482634 +264000: 3856197465 +263000: 1084605457 +262000: 2552759023 +261000: 3786548799 +260000: 272762545 +259000: 2670277860 +258000: 76233700 +257000: 476168167 +256000: 8969192 +255000: 1998841030 +254000: 1240074303 +253000: 1771564446 +252000: 710374418 +251000: 821383716 +250000: 3157726088 +249000: 3083379502 +248000: 2563632690 +247000: 33723341 +246000: 3303336748 +245000: 4110677892 +244000: 3811702913 +243000: 53856215 +242000: 243571468 +241000: 52177779 +240000: 46805590 +239000: 1622010618 +238000: 1321640849 +237000: 3106837291 +236000: 4102944642 +235000: 137904396 +234000: 339510135 +233000: 88415957 +232000: 3157666382 +231000: 2571005912 +230000: 3586247649 +229000: 4172761781 +228000: 2463305780 +227000: 956927307 +226000: 2169861547 +225000: 1751989251 +224000: 673059158 +223000: 2782464516 +222000: 3741392140 +221000: 2856154963 +220000: 3778376854 +219000: 1538476717 +218000: 2879698522 +217000: 3734645735 +216000: 1899042577 +215000: 371356008 +214000: 2416663698 +213000: 1595919347 +212000: 2816045438 +211000: 132438808 +210000: 1098603890 +209000: 834913667 +208000: 2707567283 +207000: 3154122448 +206000: 3696516104 +205000: 1427952551 +204000: 280496321 +203000: 1185678745 +202000: 3461951699 +201000: 1369208434 +200000: 3900136261 +199000: 870818876 +198000: 327248310 +197000: 3116959470 +196000: 1544241188 +195000: 1568248814 +194000: 2978831302 +193000: 205660429 +192000: 1704239501 +191000: 3570135474 +190000: 3878512103 +189000: 1212729210 +188000: 1873588815 +187000: 324853813 +186000: 432676298 +185000: 1641364437 +184000: 1568401301 +183000: 525792402 +182000: 861154382 +181000: 2357325066 +180000: 3626762590 +179000: 4172125462 +178000: 2108738993 +177000: 2084782857 +176000: 3956924509 +175000: 17183073 +174000: 3676839474 +173000: 458250029 +172000: 2635215219 +171000: 1801029767 +170000: 3602628987 +169000: 370704281 +168000: 177963345 +167000: 924067814 +166000: 3577678376 +165000: 3717789117 +164000: 3285809386 +163000: 3738962897 +162000: 3172510171 +161000: 417992786 +160000: 2591600214 +159000: 3315096579 +158000: 3590763949 +157000: 198872871 +156000: 2960653534 +155000: 2246563682 +154000: 2304045306 +153000: 2647353543 +152000: 2043381015 +151000: 3952056867 +150000: 2644058641 +149000: 3477151018 +148000: 1740210241 +147000: 3314851112 +146000: 1604832482 +145000: 2572410736 +144000: 1965059167 +143000: 889666293 +142000: 1024747903 +141000: 226685285 +140000: 3149168519 +139000: 403638872 +138000: 1725889104 +137000: 1417402331 +136000: 422304488 +135000: 2595894054 +134000: 4266597695 +133000: 1116326556 +132000: 3537080833 +131000: 2181246909 +130000: 1241997223 +129000: 628191304 +128000: 3074132403 +127000: 2112958836 +126000: 1371260930 +125000: 2272975771 +124000: 1379085607 +123000: 1998991877 +122000: 2760271255 +121000: 3784187756 +120000: 311188417 +119000: 1123593459 +118000: 1249155194 +117000: 908703020 +116000: 3765244393 +115000: 3040869794 +114000: 437536659 +113000: 3343598822 +112000: 2419089776 +111000: 1263143640 +110000: 1384687523 +109000: 1727931349 +108000: 2861733388 +107000: 963829093 +106000: 431354627 +105000: 3568623360 +104000: 2957399361 +103000: 1071045618 +102000: 3968457714 +101000: 3448338394 +100000: 2586060251 +99000: 3401651822 +98000: 1579089478 +97000: 3722618916 +96000: 759319595 +95000: 1269278712 +94000: 150489448 +93000: 390013662 +92000: 3663029784 +91000: 555197170 +90000: 166476858 +89000: 1658807720 +88000: 3430520531 +87000: 2946861093 +86000: 3000600326 +85000: 300034452 +84000: 2813719249 +83000: 3009927425 +82000: 1127728469 +81000: 2667791855 +80000: 2632316050 +79000: 2180301200 +78000: 418999983 +77000: 4254858933 +76000: 2728734498 +75000: 1863202698 +74000: 4226419921 +73000: 1917572494 +72000: 3117082625 +71000: 1032601538 +70000: 2992135524 +69000: 670119660 +68000: 638731522 +67000: 1460114012 +66000: 1232274665 +65000: 3667669961 +64000: 191277965 +63000: 3868442802 +62000: 700664540 +61000: 2271087482 +60000: 3274078227 +59000: 159900296 +58000: 2778747772 +57000: 2788477153 +56000: 3965957780 +55000: 2276993918 +54000: 1986966104 +53000: 3416414682 +52000: 2162594060 +51000: 2947744069 +50000: 4024793290 +49000: 631161701 +48000: 728285173 +47000: 1487641693 +46000: 4049519424 +45000: 613160608 +44000: 1566126172 +43000: 3731725133 +42000: 2746368727 +41000: 4168967735 +40000: 1319649932 +39000: 2964978784 +38000: 967937134 +37000: 3116555742 +36000: 2279790642 +35000: 2852914953 +34000: 1040410911 +33000: 226200467 +32000: 1765748697 +31000: 1418838964 +30000: 1362983292 +29000: 2877029789 +28000: 583076938 +27000: 2797138728 +26000: 3033567067 +25000: 3902265889 +24000: 3287868661 +23000: 2411740885 +22000: 2747756860 +21000: 1889759908 +20000: 2975722149 +19000: 3027693370 +18000: 2418258302 +17000: 490864179 +16000: 1944489573 +15000: 4212838860 +14000: 1782397962 +13000: 1981080238 +12000: 1213651424 +11000: 1407527546 +10000: 661520991 +9000: 143129551 +8000: 3293448370 +7000: 764314400 +6000: 2246553770 +5000: 2459308892 +4000: 3776833152 +3000: 2208260083 +2000: 2845746745 +1000: 2068042552 +0: 290958364 +Exiting @ tick 279668927000 because target called exit() diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt index 362966e09..887940ec1 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.279669 # Nu sim_ticks 279668927000 # Number of ticks simulated final_tick 279668927000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 180963 # Simulator instruction rate (inst/s) -host_op_rate 180963 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 60079385 # Simulator tick rate (ticks/s) -host_mem_usage 306712 # Number of bytes of host memory used -host_seconds 4654.99 # Real time elapsed on the host +host_inst_rate 172383 # Simulator instruction rate (inst/s) +host_op_rate 172383 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 57230702 # Simulator tick rate (ticks/s) +host_mem_usage 232716 # Number of bytes of host memory used +host_seconds 4886.69 # Real time elapsed on the host sim_insts 842382029 # Number of instructions simulated sim_ops 842382029 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -387,7 +387,7 @@ system.cpu.iq.iqInstsAdded 1304972518 # Nu system.cpu.iq.iqNonSpecInstsAdded 89 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 1016009395 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 8790765 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 462565445 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 462590577 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 427723515 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 52 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 559092875 # Number of insts issued each cycle @@ -480,10 +480,10 @@ system.cpu.iq.rate 1.816450 # In system.cpu.iq.fu_busy_cnt 23622740 # FU busy when requested system.cpu.iq.fu_busy_rate 0.023251 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 2552720615 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 1726495098 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 1726519951 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 940123896 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 70804555 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 41088088 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 41088367 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 34423394 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 1003270759 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 36360100 # Number of floating point alu accesses diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini index 3db3f48e9..000c8b0e4 100644 --- a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -145,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -157,6 +154,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -191,6 +189,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -208,7 +207,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -498,8 +496,9 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -558,6 +557,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.istage2_mmu] @@ -565,6 +565,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -582,7 +583,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -607,6 +607,7 @@ children=prefetcher tags addr_ranges=0:18446744073709551615 assoc=16 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=12 @@ -628,19 +629,27 @@ mem_side=system.membus.slave[1] [system.cpu.l2cache.prefetcher] type=StridePrefetcher +cache_snoop=false clk_domain=system.cpu_clk_domain -cross_pages=false -data_accesses_only=false degree=8 eventq_index=0 -inst_tagged=true latency=1 -on_miss_only=false -on_prefetch=true -on_read_only=false -serial_squash=false -size=100 +max_conf=7 +min_conf=0 +on_data=true +on_inst=true +on_miss=false +on_read=true +on_write=true +queue_filter=true +queue_size=32 +queue_squash=true +start_conf=4 sys=system +table_assoc=4 +table_sets=16 +tag_prefetch=true +thresh_conf=4 use_master_id=true [system.cpu.l2cache.tags] @@ -657,13 +666,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -673,14 +685,16 @@ eventq_index=0 type=LiveProcess cmd=perlbmk -I. -I lib mdred.makerand.pl cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/o3-timing +drivers= egid=100 env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk +executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -710,11 +724,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -745,7 +762,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -754,6 +771,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simerr b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simerr index 2de5e2759..2e6ab1e7e 100755 --- a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simerr @@ -1,2 +1,3 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: fcntl64(3, 2) passed through to host diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simout b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simout index 8802e13a7..d52ca5008 100755 --- a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simout @@ -1,1389 +1,652 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:22:42 -gem5 started Jun 21 2014 21:43:02 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:51:12 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/o3-timing + Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x5c9e4b0 + 0: system.cpu.isa: ISA system set to: 0 0x36128d0 info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. info: Increasing stack size by one page. -1375000: 2038431008 -1374000: 3487365506 -1373000: 4184770123 -1372000: 1943746837 -1371000: 2651673663 -1370000: 1493817016 -1369000: 2894014801 -1368000: 1932092157 -1367000: 1670009799 -1366000: 828662248 -1365000: 1816650195 -1364000: 4173139012 -1363000: 3990577549 -1362000: 1330366815 -1361000: 3316935553 -1360000: 961300001 -1359000: 344963924 -1358000: 1930356625 -1357000: 1640964266 -1356000: 3777883312 -1355000: 1651132665 -1354000: 1971433151 -1353000: 3024027448 -1352000: 1956387036 -1351000: 1490224841 -1350000: 3286956460 -1349000: 2793131848 -1348000: 2529224907 -1347000: 2622295253 -1346000: 1414103189 -1345000: 3861617587 -1344000: 3506378216 -1343000: 1667466720 -1342000: 2899224065 -1341000: 1681491556 -1340000: 1076311729 -1339000: 4066972664 -1338000: 3438059028 -1337000: 2938359730 -1336000: 1214615378 -1335000: 3814432458 -1334000: 2944038793 -1333000: 3428045644 -1332000: 2815822229 -1331000: 1093465585 -1330000: 3012217108 -1329000: 2230916791 -1328000: 208547885 -1327000: 3592585825 -1326000: 3948677052 -1325000: 1817805162 -1324000: 135366494 -1323000: 3309148112 -1322000: 1685035744 -1321000: 3293068577 -1320000: 4097808567 -1319000: 1594097274 -1318000: 2607196971 -1317000: 1763785306 -1316000: 2157394178 -1315000: 2399031328 -1314000: 2954547004 -1313000: 82348686 -1312000: 3120930785 -1311000: 2192747320 -1310000: 1580299400 -1309000: 4085061477 -1308000: 3627048345 -1307000: 3756533178 -1306000: 77997329 -1305000: 1343359499 -1304000: 1124031730 -1303000: 1161755432 -1302000: 1855858423 -1301000: 3985872257 -1300000: 3188250811 -1299000: 3621615933 -1298000: 962624248 -1297000: 447138785 -1296000: 1459144309 -1295000: 3454504226 -1294000: 2154913347 -1293000: 2356291788 -1292000: 458348817 -1291000: 3639562699 -1290000: 3596847973 -1289000: 117168222 -1288000: 3531023849 -1287000: 3135920051 -1286000: 234987844 -1285000: 2048767180 -1284000: 2437301839 -1283000: 522886780 -1282000: 2274133042 -1281000: 1415703448 -1280000: 4145574054 -1279000: 4283494580 -1278000: 3305365779 -1277000: 604711974 -1276000: 2031548723 -1275000: 1809515149 -1274000: 1664703088 -1273000: 4149809153 -1272000: 4045608138 -1271000: 1687605659 -1270000: 1292294527 -1269000: 3120968162 -1268000: 3502898850 -1267000: 371380256 -1266000: 1683884245 -1265000: 1849576817 -1264000: 1559050991 -1263000: 66820972 -1262000: 4023539201 -1261000: 3452295398 -1260000: 4188778026 -1259000: 2008091854 -1258000: 2691158394 -1257000: 2030818206 -1256000: 2715523403 -1255000: 3473414015 -1254000: 138826953 -1253000: 69386516 -1252000: 1174725971 -1251000: 4130510373 -1250000: 1649788328 -1249000: 1589122801 -1248000: 1108688101 -1247000: 2906355484 -1246000: 379539929 -1245000: 914026021 -1244000: 4074858468 -1243000: 505989635 -1242000: 2487288773 -1241000: 1991248111 -1240000: 2415456875 -1239000: 2571192525 -1238000: 2897090536 -1237000: 2761178989 -1236000: 1296601829 -1235000: 594696756 -1234000: 264562726 -1233000: 3630852367 -1232000: 1605618457 -1231000: 2857419452 -1230000: 3028672437 -1229000: 361833758 -1228000: 4046013938 -1227000: 1031775583 -1226000: 3475227831 -1225000: 802168737 -1224000: 3819194009 -1223000: 851157666 -1222000: 2656457905 -1221000: 2579045204 -1220000: 2091024410 -1219000: 4070633834 -1218000: 1926611791 -1217000: 1903813761 -1216000: 3107168794 -1215000: 2975081979 -1214000: 4097089273 -1213000: 328943233 -1212000: 2912404803 -1211000: 181334180 -1210000: 863898367 -1209000: 1894902343 -1208000: 1531985231 -1207000: 1412503751 -1206000: 662457490 -1205000: 3447925432 -1204000: 2320889638 -1203000: 303282255 -1202000: 1568632659 -1201000: 1108711074 -1200000: 953936964 -1199000: 3576987258 -1198000: 466163300 -1197000: 1159551420 -1196000: 529807534 -1195000: 1528979627 -1194000: 1795576953 -1193000: 2050917610 -1192000: 4068219994 -1191000: 3573497288 -1190000: 776005286 -1189000: 2643125982 -1188000: 2240857507 -1187000: 43353719 -1186000: 2474198261 -1185000: 1711347056 -1184000: 3046018343 -1183000: 664346074 -1182000: 3532392595 -1181000: 3145347726 -1180000: 2203928246 -1179000: 4275910811 -1178000: 3260065240 -1177000: 3216083720 -1176000: 3588515377 -1175000: 1432542416 -1174000: 173159992 -1173000: 4115057268 -1172000: 223456174 -1171000: 1192164227 -1170000: 2059254624 -1169000: 279921804 -1168000: 1100495449 -1167000: 264813624 -1166000: 2839280440 -1165000: 301796904 -1164000: 1331933822 -1163000: 647427882 -1162000: 3872813324 -1161000: 2231068824 -1160000: 4222672618 -1159000: 3629229584 -1158000: 2262586804 -1157000: 2837951671 -1156000: 1780662312 -1155000: 31553143 -1154000: 3230861653 -1153000: 1991458597 -1152000: 2277829165 -1151000: 3864184029 -1150000: 630158826 -1149000: 4028889917 -1148000: 1662505287 -1147000: 4121796538 -1146000: 3215277282 -1145000: 2019794999 -1144000: 4124433286 -1143000: 181819953 -1142000: 2704380222 -1141000: 2487909897 -1140000: 1753570204 -1139000: 2337507591 -1138000: 3235449912 -1137000: 3819353806 -1136000: 3435413746 -1135000: 3288196653 -1134000: 2705083758 -1133000: 997301031 -1132000: 1871866706 -1131000: 2298991521 -1130000: 1516060457 -1129000: 3393393053 -1128000: 2795526466 -1127000: 1177801041 -1126000: 4226698729 -1125000: 567826718 -1124000: 2425735007 -1123000: 1090360485 -1122000: 2508061782 -1121000: 3476086116 -1120000: 2952087827 -1119000: 2238445545 -1118000: 2937037425 -1117000: 1773353797 -1116000: 3033333765 -1115000: 3086246055 -1114000: 944390435 -1113000: 2944932895 -1112000: 534683663 -1111000: 2002175399 -1110000: 1876265996 -1109000: 4148000592 -1108000: 3857174625 -1107000: 843045539 -1106000: 307772960 -1105000: 4161975075 -1104000: 3675447412 -1103000: 1232242543 -1102000: 1019583281 -1101000: 1983565552 -1100000: 2490901544 -1099000: 2990982808 -1098000: 1586955629 -1097000: 1629138000 -1096000: 1870655270 -1095000: 2201093764 -1094000: 696079363 -1093000: 1526904315 -1092000: 553848190 -1091000: 4234411636 -1090000: 1027439894 -1089000: 1319115149 -1088000: 1147708285 -1087000: 3364503693 -1086000: 528432422 -1085000: 3289100476 -1084000: 3074065438 -1083000: 3664250869 -1082000: 2950591670 -1081000: 4207904839 -1080000: 3425353965 -1079000: 1069646286 -1078000: 1004956209 -1077000: 2642475281 -1076000: 364759474 -1075000: 2334969932 -1074000: 3907002684 -1073000: 273633783 -1072000: 4113182592 -1071000: 1404306188 -1070000: 3286171051 -1069000: 3531039414 -1068000: 4147513318 -1067000: 2466290219 -1066000: 2089005579 -1065000: 2617563073 -1064000: 3124838472 -1063000: 3731008114 -1062000: 4154022628 -1061000: 3389258714 -1060000: 3915149371 -1059000: 2280932986 -1058000: 2872952978 -1057000: 2381277834 -1056000: 1236179469 -1055000: 3256417375 -1054000: 2700213407 -1053000: 3418122897 -1052000: 3130247908 -1051000: 1897033028 -1050000: 2349143738 -1049000: 3789736749 -1048000: 409522147 -1047000: 3149279018 -1046000: 1323133366 -1045000: 3881472077 -1044000: 3363874422 -1043000: 3931657349 -1042000: 1220007174 -1041000: 3634450249 -1040000: 695184634 -1039000: 529508167 -1038000: 449827627 -1037000: 2817424280 -1036000: 1613482057 -1035000: 2632612792 -1034000: 852422020 -1033000: 4098325966 -1032000: 177298753 -1031000: 2286807874 -1030000: 2745349553 -1029000: 2387386570 -1028000: 2004317534 -1027000: 971343564 -1026000: 1583732447 -1025000: 2340780818 -1024000: 561110245 -1023000: 3012020895 -1022000: 1677066870 -1021000: 3046208682 -1020000: 2695506079 -1019000: 780536149 -1018000: 4225713741 -1017000: 420500410 -1016000: 3642094643 -1015000: 608695027 -1014000: 2161592269 -1013000: 930784800 -1012000: 1924051276 -1011000: 1889733886 -1010000: 1476038251 -1009000: 2908577467 -1008000: 2584082136 -1007000: 1713214537 -1006000: 3374346754 -1005000: 1173203719 -1004000: 1142288559 -1003000: 4195961973 -1002000: 1211260974 -1001000: 474231127 -1000000: 3967090782 -999000: 1543103493 -998000: 1018646803 -997000: 1799037982 -996000: 3416426509 -995000: 3581729971 -994000: 3044504127 -993000: 2975704335 -992000: 280018795 -991000: 330300280 -990000: 3557016064 -989000: 3856724468 -988000: 2124201285 -987000: 3683893247 -986000: 3331663795 -985000: 1980057740 -984000: 2908437859 -983000: 4074086941 -982000: 1162307093 -981000: 3855413476 -980000: 2799155731 -979000: 2477822501 -978000: 497762075 -977000: 1650233426 -976000: 3061573902 -975000: 2224673611 -974000: 868725340 -973000: 1630206962 -972000: 2549398924 -971000: 602424332 -970000: 1172502721 -969000: 2923795552 -968000: 1394164637 -967000: 1088479837 -966000: 898709052 -965000: 3983150961 -964000: 2463803866 -963000: 4181117626 -962000: 2151137820 -961000: 1342513757 -960000: 1507689687 -959000: 3652624918 -958000: 4169721124 -957000: 531022334 -956000: 3161389505 -955000: 1197637232 -954000: 2927231791 -953000: 2552305374 -952000: 2988512039 -951000: 2448639370 -950000: 3560951660 -949000: 948988399 -948000: 2488188856 -947000: 2804177113 -946000: 1991587461 -945000: 2480044082 -944000: 1954588624 -943000: 924231798 -942000: 3269047595 -941000: 2078696579 -940000: 2822989969 -939000: 2295885951 -938000: 1815612561 -937000: 4182254074 -936000: 2753223967 -935000: 2840201908 -934000: 4058383142 -933000: 4270167260 -932000: 1203124158 -931000: 3039861400 -930000: 4247472610 -929000: 2297661055 -928000: 2376159704 -927000: 3861417958 -926000: 1968685250 -925000: 1156966624 -924000: 3568580529 -923000: 866582344 -922000: 2263113297 -921000: 3643523016 -920000: 3252268544 -919000: 2413309783 -918000: 3463124619 -917000: 3965291932 -916000: 1309181143 -915000: 2321282614 -914000: 2286584604 -913000: 3271924727 -912000: 1719841316 -911000: 3966124343 -910000: 607707072 -909000: 61942114 -908000: 903881820 -907000: 4136948835 -906000: 3663861210 -905000: 3251888710 -904000: 227984688 -903000: 495030333 -902000: 863290992 -901000: 3297482717 -900000: 3821175085 -899000: 1679874522 -898000: 2033358728 -897000: 3495513776 -896000: 1613181881 -895000: 1729312232 -894000: 2171317375 -893000: 2508603694 -892000: 151095866 -891000: 1926096901 -890000: 4292888210 -889000: 2716307666 -888000: 737310728 -887000: 4172392976 -886000: 2322084662 -885000: 1034961047 -884000: 665072958 -883000: 368014441 -882000: 1914585160 -881000: 3836900884 -880000: 2073827187 -879000: 1650543625 -878000: 3581099222 -877000: 147580905 -876000: 4009421518 -875000: 3294244820 -874000: 2786720968 -873000: 1682434702 -872000: 620473876 -871000: 742752376 -870000: 385116650 -869000: 3882475387 -868000: 4259210265 -867000: 1329675866 -866000: 539876515 -865000: 2761681036 -864000: 2192063038 -863000: 1512848001 -862000: 3911973718 -861000: 399349760 -860000: 1449497249 -859000: 4241714042 -858000: 18611709 -857000: 1550083097 -856000: 3322762748 -855000: 283796511 -854000: 227907270 -853000: 3162559866 -852000: 1331946455 -851000: 2328467927 -850000: 1640242501 -849000: 3390154083 -848000: 22088346 -847000: 636412590 -846000: 1550672808 -845000: 763937899 -844000: 430123910 -843000: 3413971543 -842000: 900018421 -841000: 3295874222 -840000: 2470678073 -839000: 821401909 -838000: 3923898844 -837000: 429069328 -836000: 2030779868 -835000: 464625222 -834000: 3593024182 -833000: 3564354808 -832000: 2794783695 -831000: 97817593 -830000: 4197446076 -829000: 2367560230 -828000: 2180262123 -827000: 3149571964 -826000: 1364436763 -825000: 21599634 -824000: 448490256 -823000: 3775294409 -822000: 1132631425 -821000: 2046352434 -820000: 3380435217 -819000: 3672496486 -818000: 1634548077 -817000: 2881316258 -816000: 1808599559 -815000: 3298310748 -814000: 3744285741 -813000: 3540737709 -812000: 1143844515 -811000: 3091026783 -810000: 3771757792 -809000: 631375816 -808000: 1353831646 -807000: 3047756240 -806000: 818136890 -805000: 783072818 -804000: 3923416267 -803000: 3233085529 -802000: 674747602 -801000: 758523180 -800000: 2232308489 -799000: 2919643710 -798000: 623631722 -797000: 1302202741 -796000: 1083055596 -795000: 2358048936 -794000: 2836842068 -793000: 1612571734 -792000: 4243459584 -791000: 1585511173 -790000: 1493369943 -789000: 3649557715 -788000: 3223859588 -787000: 4001130195 -786000: 2949323631 -785000: 3887611007 -784000: 4091766333 -783000: 2954277998 -782000: 1281850218 -781000: 771664458 -780000: 2242576209 -779000: 3865479146 -778000: 1885013114 -777000: 2032659742 -776000: 4221167450 -775000: 1962824751 -774000: 209539683 -773000: 262945027 -772000: 452388820 -771000: 2006266573 -770000: 990063860 -769000: 1377951885 -768000: 4240978277 -767000: 2206801004 -766000: 258015097 -765000: 1990217201 -764000: 1336410303 -763000: 1004853228 -762000: 1404152873 -761000: 3356554358 -760000: 4052430907 -759000: 2833671166 -758000: 1561723151 -757000: 1752620777 -756000: 2622547462 -755000: 1843933196 -754000: 3728801998 -753000: 2776832730 -752000: 2626131293 -751000: 1528525830 -750000: 2716112581 -749000: 3306039713 -748000: 915271993 -747000: 4205133363 -746000: 3136321783 -745000: 1203154793 -744000: 3370017183 -743000: 4036456207 -742000: 3377556743 -741000: 3688568185 -740000: 3349738887 -739000: 1606411092 -738000: 331980874 -737000: 744409647 -736000: 3845688101 -735000: 3654026084 -734000: 786733128 -733000: 1938791337 -732000: 843210299 -731000: 622237260 -730000: 2851984401 -729000: 874906210 -728000: 485670931 -727000: 1522238607 -726000: 2167917076 -725000: 2304482464 -724000: 1053513779 -723000: 3535437378 -722000: 2842397393 -721000: 864490421 -720000: 920591184 -719000: 238249003 -718000: 400999105 -717000: 2476588521 -716000: 2501770197 -715000: 2307183887 -714000: 2461504446 -713000: 1055961242 -712000: 2112756603 -711000: 1691285107 -710000: 2318101701 -709000: 1113470660 -708000: 2880817109 -707000: 2105866601 -706000: 1441912219 -705000: 1684930572 -704000: 1652788290 -703000: 2359919145 -702000: 554008403 -701000: 3292620387 -700000: 3528106952 -699000: 3096375697 -698000: 4201459210 -697000: 1450879661 -696000: 3743939389 -695000: 3595614062 -694000: 4101634764 -693000: 364538097 -692000: 4204120947 -691000: 3706729229 -690000: 23134581 -689000: 2585120038 -688000: 488096133 -687000: 3437179533 -686000: 4233790378 -685000: 3093374794 -684000: 4054579709 -683000: 1275606548 -682000: 1966964511 -681000: 354765069 -680000: 3812578933 -679000: 781104418 -678000: 3281747368 -677000: 38547527 -676000: 1005246555 -675000: 74753563 -674000: 676561715 -673000: 1571462591 -672000: 1876054379 -671000: 1899005137 -670000: 4188106842 -669000: 1210903253 -668000: 2909261468 -667000: 3100970839 -666000: 758568698 -665000: 2456763236 -664000: 686978785 -663000: 349808361 -662000: 2804776250 -661000: 2660993423 -660000: 1758165672 -659000: 2116094507 -658000: 473425247 -657000: 563682488 -656000: 1454194093 -655000: 3211379305 -654000: 1298793267 -653000: 3374836733 -652000: 586356525 -651000: 1490379306 -650000: 2444980288 -649000: 47671514 -648000: 568687171 -647000: 452676234 -646000: 2752247721 -645000: 1473254180 -644000: 4189470166 -643000: 2619721788 -642000: 348627393 -641000: 675341258 -640000: 3183922211 -639000: 1266115377 -638000: 2331844572 -637000: 250721255 -636000: 4017517385 -635000: 1279621530 -634000: 1500904407 -633000: 2495457137 -632000: 1919479114 -631000: 1900388354 -630000: 370039669 -629000: 1207459690 -628000: 2314286843 -627000: 80099285 -626000: 2465533600 -625000: 1056979505 -624000: 4289445503 -623000: 1234007489 -622000: 2015973003 -621000: 2281387627 -620000: 1115405564 -619000: 1407699260 -618000: 3940256761 -617000: 3639431367 -616000: 3498942818 -615000: 2982957031 -614000: 3800830694 -613000: 1454837486 -612000: 158454584 -611000: 3414923339 -610000: 3752581462 -609000: 195868045 -608000: 3165948362 -607000: 2335822431 -606000: 3229210414 -605000: 1963422803 -604000: 2355005929 -603000: 2009365872 -602000: 1343084455 -601000: 2935056539 -600000: 2354171524 -599000: 3621510708 -598000: 3992266416 -597000: 682368260 -596000: 3290472265 -595000: 2215475388 -594000: 258049456 -593000: 365234760 -592000: 291875022 -591000: 3307168950 -590000: 2233802778 -589000: 1944100586 -588000: 7070250 -587000: 882601802 -586000: 1231725137 -585000: 4169259917 -584000: 2123453163 -583000: 631823798 -582000: 2039925673 -581000: 2238172862 -580000: 1479379031 -579000: 2363652063 -578000: 3186953219 -577000: 1893181853 -576000: 2598096173 -575000: 938779920 -574000: 927622241 -573000: 3105026014 -572000: 2412852365 -571000: 644810722 -570000: 3576393744 -569000: 2625468928 -568000: 2167447563 -567000: 3391359662 -566000: 3178493511 -565000: 24044406 -564000: 3298992941 -563000: 2054886551 -562000: 42479754 -561000: 2681525651 -560000: 1110769583 -559000: 2140540905 -558000: 780964175 -557000: 1320986796 -556000: 3624725635 -555000: 2920977559 -554000: 4017386186 -553000: 1800018968 -552000: 2137743255 -551000: 2282561617 -550000: 1466333871 -549000: 2567190002 -548000: 3280136825 -547000: 1761114084 -546000: 413841088 -545000: 829808286 -544000: 283842712 -543000: 3524860517 -542000: 1853927454 -541000: 3087398009 -540000: 2535138654 -539000: 2224833733 -538000: 1673737994 -537000: 3963575809 -536000: 289926670 -535000: 2411609896 -534000: 1866933324 -533000: 259728174 -532000: 786327819 -531000: 870136645 -530000: 3603849411 -529000: 1687141824 -528000: 2973109656 -527000: 2120372902 -526000: 3554894341 -525000: 369365218 -524000: 2336210870 -523000: 1352671703 -522000: 4093185231 -521000: 44309897 -520000: 1308207751 -519000: 1489447779 -518000: 497784082 -517000: 2370135551 -516000: 2393982064 -515000: 3453216376 -514000: 349616264 -513000: 1057922348 -512000: 2061823561 -511000: 2221803921 -510000: 2518047997 -509000: 2783356981 -508000: 3842023593 -507000: 3105321997 -506000: 3540124104 -505000: 334821209 -504000: 2867156116 -503000: 3824184936 -502000: 2432119674 -501000: 3759474841 -500000: 3381305904 -499000: 3106640260 -498000: 4241569809 -497000: 2499659818 -496000: 3971155346 -495000: 2297624439 -494000: 3455216298 -493000: 2152855317 -492000: 3915728702 -491000: 1087687366 -490000: 3976823873 -489000: 1813936857 -488000: 2803197060 -487000: 4026575712 -486000: 3867909271 -485000: 644795069 -484000: 1051897856 -483000: 3091023530 -482000: 558963440 -481000: 2516346710 -480000: 2405618228 -479000: 1595155902 -478000: 1699460683 -477000: 645434559 -476000: 1457238083 -475000: 101746166 -474000: 1054127445 -473000: 1703635926 -472000: 3228750510 -471000: 2570095523 -470000: 2671516672 -469000: 219569232 -468000: 245973042 -467000: 1785352151 -466000: 1828704556 -465000: 2993350381 -464000: 1802995474 -463000: 3689392931 -462000: 2612188341 -461000: 1970287287 -460000: 179729165 -459000: 1971694777 -458000: 3031333568 -457000: 844564594 -456000: 979968160 -455000: 2169589334 -454000: 2315813244 -453000: 2333801403 -452000: 27632567 -451000: 3752181065 -450000: 3965825733 -449000: 969798494 -448000: 1028884180 -447000: 1127216392 -446000: 2477366335 -445000: 3752023316 -444000: 1679036165 -443000: 4241934865 -442000: 3360200587 -441000: 3533494907 -440000: 1888455616 -439000: 2668699748 -438000: 2728196631 -437000: 31348508 -436000: 2192326452 -435000: 286955043 -434000: 4097630027 -433000: 1185622743 -432000: 2870795553 -431000: 2246074692 -430000: 14797454 -429000: 2606207217 -428000: 2143322684 -427000: 1289559127 -426000: 3922285071 -425000: 590638427 -424000: 1098669098 -423000: 1597510568 -422000: 1623191243 -421000: 558862770 -420000: 3846690181 -419000: 3187756225 -418000: 2520849981 -417000: 492022774 -416000: 1621927303 -415000: 2828836994 -414000: 2840605981 -413000: 4260845378 -412000: 2200645444 -411000: 393061550 -410000: 3334889686 -409000: 1926958198 -408000: 2939424440 -407000: 4207748941 -406000: 4155428743 -405000: 89797563 -404000: 427509452 -403000: 1154877029 -402000: 4023324583 -401000: 359413604 -400000: 964788206 -399000: 3843097093 -398000: 1871599521 -397000: 2361845870 -396000: 4103568192 -395000: 622493054 -394000: 954921337 -393000: 3664395297 -392000: 2429042528 -391000: 1361036260 -390000: 1944048082 -389000: 1452288555 -388000: 1619598577 -387000: 481096019 -386000: 3719595713 -385000: 1840199850 -384000: 421723640 -383000: 2976677668 -382000: 618336385 -381000: 1777037748 -380000: 901802032 -379000: 621392881 -378000: 3857241587 -377000: 3115040335 -376000: 3173790487 -375000: 2517831056 -374000: 4125976072 -373000: 2294107866 -372000: 4127359945 -371000: 333946663 -370000: 3307391606 -369000: 4268094300 -368000: 91056295 -367000: 882600429 -366000: 730521557 -365000: 3957048081 -364000: 2139992409 -363000: 3504327478 -362000: 2637042137 -361000: 2718540805 -360000: 903036675 -359000: 1858031956 -358000: 1868403889 -357000: 2677157063 -356000: 1865569815 -355000: 224528281 -354000: 3144318856 -353000: 1968806079 -352000: 2836077060 -351000: 1981309964 -350000: 3105869514 -349000: 3793296439 -348000: 1267294125 -347000: 1962520375 -346000: 2150839102 -345000: 3811064048 -344000: 1298671776 -343000: 2150950779 -342000: 3522997671 -341000: 1378798782 -340000: 2213936395 -339000: 2117978968 -338000: 2444486361 -337000: 3928234621 -336000: 1645335376 -335000: 540013781 -334000: 1103798645 -333000: 1723781016 -332000: 1805323374 -331000: 3590394804 -330000: 4178797476 -329000: 3350975600 -328000: 1556948383 -327000: 2282601074 -326000: 1709618426 -325000: 637957139 -324000: 2719080929 -323000: 1847444832 -322000: 547261068 -321000: 581409575 -320000: 586567018 -319000: 1579880779 -318000: 1049735969 -317000: 3233747918 -316000: 351376358 -315000: 3446473138 -314000: 2099035319 -313000: 2827833754 -312000: 2717063452 -311000: 2212978977 -310000: 1583494069 -309000: 3119642323 -308000: 2946038826 -307000: 167580491 -306000: 3916319765 -305000: 3480693946 -304000: 2709010304 -303000: 3265576420 -302000: 3439318492 -301000: 1896109937 -300000: 339896540 -299000: 313850585 -298000: 2600289987 -297000: 4060531515 -296000: 3894455718 -295000: 3183544633 -294000: 1551799240 -293000: 3574197425 -292000: 2380783887 -291000: 3130665581 -290000: 1135162832 -289000: 3460550191 -288000: 3366619355 -287000: 501626025 -286000: 1070097358 -285000: 1023235560 -284000: 925313877 -283000: 3758987940 -282000: 1935539406 -281000: 3727463323 -280000: 4040081802 -279000: 2462105177 -278000: 322183212 -277000: 2437872102 -276000: 1085894622 -275000: 2118601354 -274000: 1720719726 -273000: 56294175 -272000: 2046218040 -271000: 2871320919 -270000: 3111863367 -269000: 726835633 -268000: 916866344 -267000: 1208374677 -266000: 2914608557 -265000: 449456198 -264000: 2645640532 -263000: 997311800 -262000: 2872564998 -261000: 1964496124 -260000: 2802080932 -259000: 387636194 -258000: 3813984224 -257000: 1921258264 -256000: 1414333533 -255000: 997845727 -254000: 3671258247 -253000: 3244313331 -252000: 44297738 -251000: 1055697350 -250000: 403951609 -249000: 3558182356 -248000: 3441722116 -247000: 3598259825 -246000: 2495236386 -245000: 4150113079 -244000: 4092477475 -243000: 1352323466 -242000: 4228179784 -241000: 3509286314 -240000: 1117669666 -239000: 1821539001 -238000: 2685425558 -237000: 3282158412 -236000: 976807931 -235000: 1960913234 -234000: 675404937 -233000: 2016845981 -232000: 3778769531 -231000: 1321297859 -230000: 84609577 -229000: 2736973360 -228000: 1143462599 -227000: 1152334102 -226000: 2661675401 -225000: 3384049744 -224000: 3321570349 -223000: 2151575803 -222000: 2950365334 -221000: 2791341163 -220000: 2912181889 -219000: 700726300 -218000: 3236687629 -217000: 384678680 -216000: 3027284798 -215000: 2124466541 -214000: 1634885735 -213000: 3025139089 -212000: 1913485355 -211000: 2451444114 -210000: 1597224573 -209000: 2863042887 -208000: 1462999033 -207000: 853998677 -206000: 1532111742 -205000: 3533822378 -204000: 1057056422 -203000: 2585913344 -202000: 1776380902 -201000: 2652271540 -200000: 2500553547 -199000: 3943435104 -198000: 615742187 -197000: 2089667313 -196000: 1649690458 -195000: 582691711 -194000: 1197398266 -193000: 2682453813 -192000: 1739971049 -191000: 1543584807 -190000: 4224852565 -189000: 2330603128 -188000: 2738873539 -187000: 2462336661 -186000: 538134005 -185000: 618406175 -184000: 3258203829 -183000: 3565635398 -182000: 2437456159 -181000: 1103703144 -180000: 3142082412 -179000: 3635072449 -178000: 2831183465 -177000: 3067391696 -176000: 4243880329 -175000: 3847103503 -174000: 1886736895 -173000: 3994782354 -172000: 2180961421 -171000: 2657714328 -170000: 1783032069 -169000: 3288794122 -168000: 4214505744 -167000: 3893811403 -166000: 301673242 -165000: 1008606441 -164000: 4241744599 -163000: 4077366883 -162000: 947408771 -161000: 2893412067 -160000: 4239854096 -159000: 837488883 -158000: 1035341013 -157000: 2979612216 -156000: 622879904 -155000: 2239033946 -154000: 1793603359 -153000: 3403674755 -152000: 1757769702 -151000: 3104338771 -150000: 4050901279 -149000: 1064027760 -148000: 1232980113 -147000: 1940798204 -146000: 1520506974 -145000: 1602654645 -144000: 3827165041 -143000: 2333560581 -142000: 1078945096 -141000: 4164769913 -140000: 1004088705 -139000: 1918334274 -138000: 2376094733 -137000: 2114404244 -136000: 610887654 -135000: 2061314834 -134000: 2934949429 -133000: 1384359308 -132000: 2214638498 -131000: 4091637905 -130000: 1178600936 -129000: 3673332079 -128000: 335936353 -127000: 1680711257 -126000: 1535342908 -125000: 1797602927 -124000: 1277174958 -123000: 3114077321 -122000: 149498793 -121000: 864366602 -120000: 104510626 -119000: 1518395286 -118000: 3111302078 -117000: 3110116836 -116000: 3233967498 -115000: 1017896311 -114000: 692827001 -113000: 3779537224 -112000: 2905474934 -111000: 3465999202 -110000: 1915694049 -109000: 2628022627 -108000: 875271541 -107000: 2022225002 -106000: 1671971011 -105000: 3334748297 -104000: 1332184097 -103000: 1555681497 -102000: 3406253965 -101000: 4045141299 -100000: 3058680000 -99000: 555036606 -98000: 46275609 -97000: 3853135904 -96000: 4229006385 -95000: 4108164708 -94000: 2566945975 -93000: 3797900910 -92000: 3355992329 -91000: 1635484145 -90000: 1382023482 -89000: 3690432221 -88000: 1892056918 -87000: 1120722079 -86000: 2675052236 -85000: 4165748502 -84000: 10230467 -83000: 4138070209 -82000: 1570296924 -81000: 3126342757 -80000: 598265835 -79000: 541475291 -78000: 2784920265 -77000: 4169891577 -76000: 1101249184 -75000: 2090307927 -74000: 3780559777 -73000: 19873425 -72000: 1118190767 -71000: 3485912405 -70000: 1322638834 -69000: 1096526516 -68000: 1370553703 -67000: 3631120381 -66000: 1806420191 -65000: 2701118072 -64000: 483879470 -63000: 2124403158 -62000: 1877513812 -61000: 1289006766 -60000: 3733667461 -59000: 3457358686 -58000: 732502949 -57000: 3971773677 -56000: 883589946 -55000: 290212168 -54000: 2244967385 -53000: 3848247179 -52000: 2228476206 -51000: 2372703555 -50000: 1200411530 -49000: 2060190456 -48000: 2511902942 -47000: 4007272287 -46000: 2854231300 -45000: 2518671311 -44000: 815143404 -43000: 1972543143 -42000: 3063716128 -41000: 3326571310 -40000: 3180391453 -39000: 2568545510 -38000: 573110821 -37000: 3814257324 -36000: 4163248735 -35000: 943584186 -34000: 387069186 -33000: 3519377243 -32000: 3861206003 -31000: 2378381393 -30000: 3259365221 -29000: 3960625204 -28000: 3476394666 -27000: 1995310421 -26000: 1884341166 -25000: 3181801013 -24000: 116492838 -23000: 3276567587 -22000: 3693343729 -21000: 2595820568 -20000: 2397879436 -19000: 2692679578 -18000: 2368648652 -17000: 3098196844 -16000: 3913788179 -15000: 1240694507 -14000: 1586030084 -13000: 1211450031 -12000: 3458253062 -11000: 1804606651 -10000: 2128587109 -9000: 1894810186 -8000: 2221431098 -7000: 113605713 -6000: 4020003580 -5000: 2988041351 -4000: 2310084217 -3000: 1475476779 -2000: 760651391 -1000: 4031656975 -0: 2206428413 -Exiting @ tick 634728078000 because target called exit() +637000: 2581848540 +636000: 4117852332 +635000: 329081094 +634000: 545393176 +633000: 3107247613 +632000: 897887463 +631000: 806367477 +630000: 1682157095 +629000: 1188376072 +628000: 4076707785 +627000: 3521684454 +626000: 3144526095 +625000: 1399223384 +624000: 3380494826 +623000: 4086509498 +622000: 1473819475 +621000: 638751284 +620000: 3149483163 +619000: 1489851375 +618000: 1447059134 +617000: 136329498 +616000: 1288452788 +615000: 3949816816 +614000: 318984246 +613000: 1019963195 +612000: 2875280299 +611000: 2997394777 +610000: 4014932807 +609000: 2291235006 +608000: 355450951 +607000: 201970399 +606000: 3626124461 +605000: 2207253273 +604000: 2243886712 +603000: 46791684 +602000: 3176322294 +601000: 1120582847 +600000: 411705454 +599000: 3162380308 +598000: 2732375303 +597000: 1376844609 +596000: 3003023122 +595000: 3869968535 +594000: 1327286554 +593000: 160655029 +592000: 2038558826 +591000: 3948772976 +590000: 439262378 +589000: 329537197 +588000: 3678661972 +587000: 4240182727 +586000: 2283602206 +585000: 1129811410 +584000: 2831949168 +583000: 1224559023 +582000: 3161562107 +581000: 2695467835 +580000: 1234192577 +579000: 1974816198 +578000: 449576701 +577000: 1424873035 +576000: 2370444290 +575000: 1743089134 +574000: 2624046998 +573000: 2071148441 +572000: 2449219691 +571000: 3774476172 +570000: 1111630327 +569000: 121721805 +568000: 2981212266 +567000: 3811833647 +566000: 3676851843 +565000: 1766252334 +564000: 1622887950 +563000: 1684409857 +562000: 1686489387 +561000: 610219569 +560000: 2705092362 +559000: 108031723 +558000: 1316736987 +557000: 2434129258 +556000: 1411819652 +555000: 1173886179 +554000: 3044539233 +553000: 151590417 +552000: 3759426289 +551000: 3451520306 +550000: 294242855 +549000: 890241051 +548000: 876385779 +547000: 119864600 +546000: 3065674956 +545000: 1670853168 +544000: 997261561 +543000: 660227344 +542000: 3132294889 +541000: 521956271 +540000: 1133928405 +539000: 3838154786 +538000: 58624572 +537000: 3544030439 +536000: 432804999 +535000: 1021857051 +534000: 2644812356 +533000: 773094580 +532000: 901027171 +531000: 3976696839 +530000: 4167278216 +529000: 504481120 +528000: 320399857 +527000: 638048690 +526000: 3348998474 +525000: 2660662065 +524000: 2641437803 +523000: 626927006 +522000: 4063917554 +521000: 3212249308 +520000: 2561025301 +519000: 1078140141 +518000: 653939181 +517000: 2154098204 +516000: 3773089676 +515000: 2568381435 +514000: 3838886937 +513000: 941125346 +512000: 1318900410 +511000: 297013287 +510000: 241723934 +509000: 1835499795 +508000: 2309451230 +507000: 1174814430 +506000: 3615943386 +505000: 51034971 +504000: 3950453295 +503000: 4186097241 +502000: 327518343 +501000: 3052462710 +500000: 1586937404 +499000: 2169094819 +498000: 3613195151 +497000: 817359591 +496000: 1470916579 +495000: 2091261583 +494000: 2080080890 +493000: 1772858697 +492000: 2085609872 +491000: 3280632925 +490000: 1689322569 +489000: 2947406469 +488000: 765163324 +487000: 3122594732 +486000: 3385418480 +485000: 1712345567 +484000: 3675825158 +483000: 1558929764 +482000: 2672493410 +481000: 3822528440 +480000: 3741769935 +479000: 2794026235 +478000: 2541364185 +477000: 3964482316 +476000: 1202478165 +475000: 4027617791 +474000: 1905026738 +473000: 2573787636 +472000: 1170529797 +471000: 2272525618 +470000: 820833429 +469000: 3219769529 +468000: 2121197441 +467000: 269331764 +466000: 3038487237 +465000: 2462675338 +464000: 2703163101 +463000: 547052037 +462000: 3454526671 +461000: 2124641794 +460000: 1043737466 +459000: 1785834964 +458000: 3312335313 +457000: 1213835042 +456000: 3099430685 +455000: 3003350806 +454000: 3646781335 +453000: 1474165966 +452000: 705795987 +451000: 2723908407 +450000: 1323056304 +449000: 1157256530 +448000: 4077983523 +447000: 3189085703 +446000: 2241002747 +445000: 3229050072 +444000: 3500150226 +443000: 1290722604 +442000: 1866107725 +441000: 4238277470 +440000: 847346408 +439000: 2474557496 +438000: 2243092317 +437000: 706909230 +436000: 1303503693 +435000: 1456129560 +434000: 1073061079 +433000: 692226634 +432000: 186498656 +431000: 2203415525 +430000: 2183000701 +429000: 1007776545 +428000: 941117387 +427000: 3805851413 +426000: 1474193180 +425000: 4231673903 +424000: 2622576664 +423000: 388097625 +422000: 1165097488 +421000: 3226044518 +420000: 2531461570 +419000: 1509806310 +418000: 2667519114 +417000: 1751592438 +416000: 1286773513 +415000: 1098182293 +414000: 2111912709 +413000: 1230737431 +412000: 4090873946 +411000: 3998652133 +410000: 2486660396 +409000: 2120483596 +408000: 587404533 +407000: 188697995 +406000: 3265346093 +405000: 4234961905 +404000: 1211873901 +403000: 4265173305 +402000: 2208355316 +401000: 3315952806 +400000: 3917328941 +399000: 2523594649 +398000: 3805986783 +397000: 2624925960 +396000: 3716020189 +395000: 2016201122 +394000: 912930261 +393000: 596904160 +392000: 3571173642 +391000: 2290782861 +390000: 1162492227 +389000: 1738718380 +388000: 2599667355 +387000: 2382332909 +386000: 1471269037 +385000: 2238392684 +384000: 4034826126 +383000: 1378654892 +382000: 3702601850 +381000: 397206179 +380000: 2437704230 +379000: 4187604139 +378000: 779452169 +377000: 2010372403 +376000: 531902409 +375000: 1371470602 +374000: 4137796987 +373000: 567426549 +372000: 3082742955 +371000: 2271575596 +370000: 759731212 +369000: 4063369437 +368000: 299356452 +367000: 536656228 +366000: 3014961694 +365000: 3016542135 +364000: 2841873124 +363000: 524434057 +362000: 2887828889 +361000: 3865529589 +360000: 671363647 +359000: 3104594256 +358000: 1502485940 +357000: 1776624159 +356000: 4222478488 +355000: 4127624139 +354000: 2439477793 +353000: 1593794891 +352000: 591275342 +351000: 2177291538 +350000: 1923444781 +349000: 758084193 +348000: 775471359 +347000: 191356974 +346000: 494488375 +345000: 1990489399 +344000: 124118372 +343000: 2046377904 +342000: 1395427716 +341000: 1342299790 +340000: 38145994 +339000: 2291884417 +338000: 351940574 +337000: 3984301480 +336000: 2468666235 +335000: 371500747 +334000: 969922131 +333000: 240854580 +332000: 1644465214 +331000: 1539846168 +330000: 940087216 +329000: 1491329232 +328000: 2281687201 +327000: 3030170550 +326000: 3648503863 +325000: 2037898355 +324000: 174369956 +323000: 2433605668 +322000: 2334905107 +321000: 1597704047 +320000: 302297707 +319000: 3209203690 +318000: 3894539879 +317000: 2868907580 +316000: 2808087076 +315000: 4034586233 +314000: 3694191694 +313000: 2001671958 +312000: 559582279 +311000: 3043016195 +310000: 2785098502 +309000: 4104602138 +308000: 966154914 +307000: 2446376687 +306000: 789956605 +305000: 1708137092 +304000: 1733063901 +303000: 2924555399 +302000: 971356234 +301000: 481382543 +300000: 2647080988 +299000: 4065744916 +298000: 921140 +297000: 654346784 +296000: 485492098 +295000: 217516816 +294000: 4050820137 +293000: 534726686 +292000: 1686691079 +291000: 1316587195 +290000: 3746020838 +289000: 1641967381 +288000: 3492475215 +287000: 3154885393 +286000: 3686450617 +285000: 3589739293 +284000: 3558041700 +283000: 4130142319 +282000: 3132446063 +281000: 982677436 +280000: 799322395 +279000: 151715214 +278000: 3765942871 +277000: 1712470933 +276000: 3807622752 +275000: 4163730108 +274000: 1633425299 +273000: 1654241631 +272000: 1131025394 +271000: 1375475855 +270000: 553294237 +269000: 4091487177 +268000: 2841855980 +267000: 2997369904 +266000: 454385594 +265000: 3757482634 +264000: 3856197465 +263000: 1084605457 +262000: 2552759023 +261000: 3786548799 +260000: 272762545 +259000: 2670277860 +258000: 76233700 +257000: 476168167 +256000: 8969192 +255000: 1998841030 +254000: 1240074303 +253000: 1771564446 +252000: 710374418 +251000: 821383716 +250000: 3157726088 +249000: 3083379502 +248000: 2563632690 +247000: 33723341 +246000: 3303336748 +245000: 4110677892 +244000: 3811702913 +243000: 53856215 +242000: 243571468 +241000: 52177779 +240000: 46805590 +239000: 1622010618 +238000: 1321640849 +237000: 3106837291 +236000: 4102944642 +235000: 137904396 +234000: 339510135 +233000: 88415957 +232000: 3157666382 +231000: 2571005912 +230000: 3586247649 +229000: 4172761781 +228000: 2463305780 +227000: 956927307 +226000: 2169861547 +225000: 1751989251 +224000: 673059158 +223000: 2782464516 +222000: 3741392140 +221000: 2856154963 +220000: 3778376854 +219000: 1538476717 +218000: 2879698522 +217000: 3734645735 +216000: 1899042577 +215000: 371356008 +214000: 2416663698 +213000: 1595919347 +212000: 2816045438 +211000: 132438808 +210000: 1098603890 +209000: 834913667 +208000: 2707567283 +207000: 3154122448 +206000: 3696516104 +205000: 1427952551 +204000: 280496321 +203000: 1185678745 +202000: 3461951699 +201000: 1369208434 +200000: 3900136261 +199000: 870818876 +198000: 327248310 +197000: 3116959470 +196000: 1544241188 +195000: 1568248814 +194000: 2978831302 +193000: 205660429 +192000: 1704239501 +191000: 3570135474 +190000: 3878512103 +189000: 1212729210 +188000: 1873588815 +187000: 324853813 +186000: 432676298 +185000: 1641364437 +184000: 1568401301 +183000: 525792402 +182000: 861154382 +181000: 2357325066 +180000: 3626762590 +179000: 4172125462 +178000: 2108738993 +177000: 2084782857 +176000: 3956924509 +175000: 17183073 +174000: 3676839474 +173000: 458250029 +172000: 2635215219 +171000: 1801029767 +170000: 3602628987 +169000: 370704281 +168000: 177963345 +167000: 924067814 +166000: 3577678376 +165000: 3717789117 +164000: 3285809386 +163000: 3738962897 +162000: 3172510171 +161000: 417992786 +160000: 2591600214 +159000: 3315096579 +158000: 3590763949 +157000: 198872871 +156000: 2960653534 +155000: 2246563682 +154000: 2304045306 +153000: 2647353543 +152000: 2043381015 +151000: 3952056867 +150000: 2644058641 +149000: 3477151018 +148000: 1740210241 +147000: 3314851112 +146000: 1604832482 +145000: 2572410736 +144000: 1965059167 +143000: 889666293 +142000: 1024747903 +141000: 226685285 +140000: 3149168519 +139000: 403638872 +138000: 1725889104 +137000: 1417402331 +136000: 422304488 +135000: 2595894054 +134000: 4266597695 +133000: 1116326556 +132000: 3537080833 +131000: 2181246909 +130000: 1241997223 +129000: 628191304 +128000: 3074132403 +127000: 2112958836 +126000: 1371260930 +125000: 2272975771 +124000: 1379085607 +123000: 1998991877 +122000: 2760271255 +121000: 3784187756 +120000: 311188417 +119000: 1123593459 +118000: 1249155194 +117000: 908703020 +116000: 3765244393 +115000: 3040869794 +114000: 437536659 +113000: 3343598822 +112000: 2419089776 +111000: 1263143640 +110000: 1384687523 +109000: 1727931349 +108000: 2861733388 +107000: 963829093 +106000: 431354627 +105000: 3568623360 +104000: 2957399361 +103000: 1071045618 +102000: 3968457714 +101000: 3448338394 +100000: 2586060251 +99000: 3401651822 +98000: 1579089478 +97000: 3722618916 +96000: 759319595 +95000: 1269278712 +94000: 150489448 +93000: 390013662 +92000: 3663029784 +91000: 555197170 +90000: 166476858 +89000: 1658807720 +88000: 3430520531 +87000: 2946861093 +86000: 3000600326 +85000: 300034452 +84000: 2813719249 +83000: 3009927425 +82000: 1127728469 +81000: 2667791855 +80000: 2632316050 +79000: 2180301200 +78000: 418999983 +77000: 4254858933 +76000: 2728734498 +75000: 1863202698 +74000: 4226419921 +73000: 1917572494 +72000: 3117082625 +71000: 1032601538 +70000: 2992135524 +69000: 670119660 +68000: 638731522 +67000: 1460114012 +66000: 1232274665 +65000: 3667669961 +64000: 191277965 +63000: 3868442802 +62000: 700664540 +61000: 2271087482 +60000: 3274078227 +59000: 159900296 +58000: 2778747772 +57000: 2788477153 +56000: 3965957780 +55000: 2276993918 +54000: 1986966104 +53000: 3416414682 +52000: 2162594060 +51000: 2947744069 +50000: 4024793290 +49000: 631161701 +48000: 728285173 +47000: 1487641693 +46000: 4049519424 +45000: 613160608 +44000: 1566126172 +43000: 3731725133 +42000: 2746368727 +41000: 4168967735 +40000: 1319649932 +39000: 2964978784 +38000: 967937134 +37000: 3116555742 +36000: 2279790642 +35000: 2852914953 +34000: 1040410911 +33000: 226200467 +32000: 1765748697 +31000: 1418838964 +30000: 1362983292 +29000: 2877029789 +28000: 583076938 +27000: 2797138728 +26000: 3033567067 +25000: 3902265889 +24000: 3287868661 +23000: 2411740885 +22000: 2747756860 +21000: 1889759908 +20000: 2975722149 +19000: 3027693370 +18000: 2418258302 +17000: 490864179 +16000: 1944489573 +15000: 4212838860 +14000: 1782397962 +13000: 1981080238 +12000: 1213651424 +11000: 1407527546 +10000: 661520991 +9000: 143129551 +8000: 3293448370 +7000: 764314400 +6000: 2246553770 +5000: 2459308892 +4000: 3776833152 +3000: 2208260083 +2000: 2845746745 +1000: 2068042552 +0: 290958364 +Exiting @ tick 409399480000 because target called exit() diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt index a4b1f4996..5365dab14 100644 --- a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.409399 # Nu sim_ticks 409399480000 # Number of ticks simulated final_tick 409399480000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 93383 # Simulator instruction rate (inst/s) -host_op_rate 114967 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 59675446 # Simulator tick rate (ticks/s) -host_mem_usage 317532 # Number of bytes of host memory used -host_seconds 6860.43 # Real time elapsed on the host +host_inst_rate 92444 # Simulator instruction rate (inst/s) +host_op_rate 113811 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 59075206 # Simulator tick rate (ticks/s) +host_mem_usage 244496 # Number of bytes of host memory used +host_seconds 6930.14 # Real time elapsed on the host sim_insts 640649298 # Number of instructions simulated sim_ops 788724957 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -484,7 +484,7 @@ system.cpu.iq.iqInstsAdded 1168639452 # Nu system.cpu.iq.iqNonSpecInstsAdded 12360 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 1017122920 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 18523621 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 379819992 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 379926855 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 1032577011 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 206 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 818460793 # Number of insts issued each cycle @@ -577,10 +577,10 @@ system.cpu.iq.rate 1.242213 # In system.cpu.iq.fu_busy_cnt 337415663 # FU busy when requested system.cpu.iq.fu_busy_rate 0.331735 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 3146768879 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 1504924384 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 1505031237 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 934270592 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 61877038 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 43565805 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 43565815 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 26152443 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 1320728240 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 33810343 # Number of floating point alu accesses diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini index 532524c0d..30f498cad 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -133,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -147,7 +148,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -587,8 +587,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -609,7 +612,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex +executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/vortex gid=100 input=cin kvmInSE=false @@ -642,11 +645,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -677,7 +683,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr index de77515a1..f0a9a7c93 100755 --- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr +++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr @@ -1,3 +1,4 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout index 3accfc0e2..97f01e80c 100755 --- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout @@ -1,11 +1,12 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 19 2014 12:27:06 -gem5 started Jul 19 2014 12:27:28 +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:46:29 gem5 executing on phenom command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. -Exiting @ tick 24220559500 because target called exit() +Exiting @ tick 22578120000 because target called exit() diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt index 621cb9617..9afa0da2d 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.022578 # Nu sim_ticks 22578120000 # Number of ticks simulated final_tick 22578120000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 224564 # Simulator instruction rate (inst/s) -host_op_rate 224564 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 63702871 # Simulator tick rate (ticks/s) -host_mem_usage 305848 # Number of bytes of host memory used -host_seconds 354.43 # Real time elapsed on the host +host_inst_rate 210348 # Simulator instruction rate (inst/s) +host_op_rate 210348 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 59670380 # Simulator tick rate (ticks/s) +host_mem_usage 234940 # Number of bytes of host memory used +host_seconds 378.38 # Real time elapsed on the host sim_insts 79591756 # Number of instructions simulated sim_ops 79591756 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -393,7 +393,7 @@ system.cpu.iq.iqInstsAdded 91299347 # Nu system.cpu.iq.iqNonSpecInstsAdded 5639 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 89055311 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 77552 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 11218941 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 11713229 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 4714239 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 1056 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 44368516 # Number of insts issued each cycle @@ -486,10 +486,10 @@ system.cpu.iq.rate 1.972159 # In system.cpu.iq.fu_busy_cnt 2523465 # FU busy when requested system.cpu.iq.fu_busy_rate 0.028336 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 224465346 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 102111433 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 102605449 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 87163804 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 614809 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 433572 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 433844 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 300747 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 91271228 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 307548 # Number of floating point alu accesses diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini index 969dafec8..d5bef4cae 100644 --- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -145,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -192,6 +189,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -209,7 +207,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -501,7 +498,7 @@ assoc=2 clk_domain=system.cpu_clk_domain demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -568,6 +565,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -585,7 +583,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -669,13 +666,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -691,7 +691,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/vortex +executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/vortex gid=100 input=cin kvmInSE=false @@ -724,11 +724,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -759,7 +762,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr index 1a4f96712..341b479f7 100755 --- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr @@ -1 +1,2 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout index 72ee44be5..fb2980f08 100755 --- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:22:42 -gem5 started Jun 21 2014 21:43:42 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:16:00 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/50.vortex/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/50.vortex/arm/linux/o3-timing + Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x62769a0 + 0: system.cpu.isa: ISA system set to: 0 0x3dc8200 info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. -Exiting @ tick 25431292500 because target called exit() +Exiting @ tick 33359312000 because target called exit() diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt index ae7859585..46a8a5ebb 100644 --- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.033359 # Nu sim_ticks 33359312000 # Number of ticks simulated final_tick 33359312000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 125450 # Simulator instruction rate (inst/s) -host_op_rate 160435 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 59019201 # Simulator tick rate (ticks/s) -host_mem_usage 322444 # Number of bytes of host memory used -host_seconds 565.23 # Real time elapsed on the host +host_inst_rate 119579 # Simulator instruction rate (inst/s) +host_op_rate 152928 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 56257417 # Simulator tick rate (ticks/s) +host_mem_usage 252556 # Number of bytes of host memory used +host_seconds 592.98 # Real time elapsed on the host sim_insts 70907629 # Number of instructions simulated sim_ops 90682584 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -479,7 +479,7 @@ system.cpu.iq.iqInstsAdded 98166864 # Nu system.cpu.iq.iqNonSpecInstsAdded 34522 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 94891849 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 694587 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 7414208 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 7518802 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 20250811 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 736 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 65867882 # Number of insts issued each cycle @@ -572,7 +572,7 @@ system.cpu.iq.rate 1.422269 # In system.cpu.iq.fu_busy_cnt 29960509 # FU busy when requested system.cpu.iq.fu_busy_rate 0.315733 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 286306469 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 105626883 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 105731477 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 93465742 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 207 # Number of floating instruction queue reads system.cpu.iq.fp_inst_queue_writes 248 # Number of floating instruction queue writes diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini index deabb9ce1..0aec3b5e9 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -133,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -147,7 +148,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -587,8 +587,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -609,7 +612,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/bzip2 +executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/bzip2 gid=100 input=cin kvmInSE=false @@ -642,11 +645,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -677,7 +683,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simerr index de77515a1..f0a9a7c93 100755 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simerr +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simerr @@ -1,3 +1,4 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout index c56412480..488ad0a2f 100755 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout @@ -1,10 +1,11 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 19 2014 12:27:06 -gem5 started Jul 19 2014 12:27:27 +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:36:02 gem5 executing on phenom command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/60.bzip2/alpha/tru64/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/se/60.bzip2/alpha/tru64/o3-timing + Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. @@ -23,4 +24,4 @@ Uncompressing Data Uncompressed data 1048576 bytes in length Uncompressed data compared correctly Tested 1MB buffer: OK! -Exiting @ tick 679349778000 because target called exit() +Exiting @ tick 672881519500 because target called exit() diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt index 0d7c52b8c..58eeef87c 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.672882 # Nu sim_ticks 672881519500 # Number of ticks simulated final_tick 672881519500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 171066 # Simulator instruction rate (inst/s) -host_op_rate 171066 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 66304234 # Simulator tick rate (ticks/s) -host_mem_usage 296744 # Number of bytes of host memory used -host_seconds 10148.39 # Real time elapsed on the host +host_inst_rate 165835 # Simulator instruction rate (inst/s) +host_op_rate 165835 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 64276745 # Simulator tick rate (ticks/s) +host_mem_usage 226308 # Number of bytes of host memory used +host_seconds 10468.51 # Real time elapsed on the host sim_insts 1736043781 # Number of instructions simulated sim_ops 1736043781 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -413,7 +413,7 @@ system.cpu.iq.iqInstsAdded 2890368727 # Nu system.cpu.iq.iqNonSpecInstsAdded 181 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 2624396643 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 1584497 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 1140831193 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 1154325126 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 506084435 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 152 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 1345692377 # Number of insts issued each cycle @@ -506,10 +506,10 @@ system.cpu.iq.rate 1.950118 # In system.cpu.iq.fu_busy_cnt 36787651 # FU busy when requested system.cpu.iq.fu_busy_rate 0.014018 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 6630876089 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 4030049566 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 4043543263 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 2522176401 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 1981722 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 1296863 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 1297099 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 893189 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 2660200136 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 984158 # Number of floating point alu accesses diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini index 67aea2f65..eadc51bd2 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -145,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -192,6 +189,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -209,7 +207,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -501,7 +498,7 @@ assoc=2 clk_domain=system.cpu_clk_domain demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -568,6 +565,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -585,7 +583,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -669,13 +666,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -691,7 +691,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/bzip2 +executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/bzip2 gid=100 input=cin kvmInSE=false @@ -724,11 +724,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -759,7 +762,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simerr b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simerr index 5d8946ede..be90b0340 100755 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simerr @@ -1,2 +1,3 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: CP14 unimplemented crn[8], opc1[2], crm[9], opc2[4] diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout index 288998877..c0864581d 100755 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:22:42 -gem5 started Jun 21 2014 21:45:58 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 12:38:48 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing + Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x5287000 + 0: system.cpu.isa: ISA system set to: 0 0x39c9fd0 info: Entering event queue @ 0. Starting simulation... spec_init Loading Input Data @@ -25,4 +26,4 @@ Uncompressing Data Uncompressed data 1048576 bytes in length Uncompressed data compared correctly Tested 1MB buffer: OK! -Exiting @ tick 523063504500 because target called exit() +Exiting @ tick 771782683000 because target called exit() diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt index da2c7807d..b2838e173 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.771783 # Nu sim_ticks 771782683000 # Number of ticks simulated final_tick 771782683000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 141348 # Simulator instruction rate (inst/s) -host_op_rate 152281 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 70628369 # Simulator tick rate (ticks/s) -host_mem_usage 310548 # Number of bytes of host memory used -host_seconds 10927.38 # Real time elapsed on the host +host_inst_rate 140791 # Simulator instruction rate (inst/s) +host_op_rate 151681 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 70349895 # Simulator tick rate (ticks/s) +host_mem_usage 240068 # Number of bytes of host memory used +host_seconds 10970.63 # Real time elapsed on the host sim_insts 1544563023 # Number of instructions simulated sim_ops 1664032415 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -495,7 +495,7 @@ system.cpu.iq.iqInstsAdded 1947883742 # Nu system.cpu.iq.iqNonSpecInstsAdded 210 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 1857409514 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 13500100 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 279518916 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 283851537 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 646881302 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 40 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 1543486763 # Number of insts issued each cycle @@ -588,7 +588,7 @@ system.cpu.iq.rate 1.203324 # In system.cpu.iq.fu_busy_cnt 405102720 # FU busy when requested system.cpu.iq.fu_busy_rate 0.218101 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 5676908390 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 2227415601 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 2231748222 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 1805707256 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 221 # Number of floating instruction queue reads system.cpu.iq.fp_inst_queue_writes 208 # Number of floating instruction queue writes diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/config.ini index ca02b53f3..aa4b312c2 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -133,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -147,7 +148,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -587,8 +587,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -609,7 +612,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/twolf +executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/twolf gid=100 input=cin kvmInSE=false @@ -642,11 +645,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -677,7 +683,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simerr index de77515a1..f0a9a7c93 100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simerr +++ b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simerr @@ -1,3 +1,4 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simout b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simout index f7d4d117a..462b428af 100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simout @@ -1,10 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jul 19 2014 12:27:06 -gem5 started Jul 19 2014 12:27:28 +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:19:48 gem5 executing on phenom command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/o3-timing + +Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/o3-timing/smred.sav +Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/o3-timing/smred.sv2 Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. @@ -21,4 +24,4 @@ Authors: Carl Sechen, Bill Swartz 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -122 123 124 Exiting @ tick 23058360500 because target called exit() +122 123 124 Exiting @ tick 22228749500 because target called exit() diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt index 3087f396d..f5ac38df0 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.022229 # Nu sim_ticks 22228749500 # Number of ticks simulated final_tick 22228749500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 212613 # Simulator instruction rate (inst/s) -host_op_rate 212613 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 56143360 # Simulator tick rate (ticks/s) -host_mem_usage 300388 # Number of bytes of host memory used -host_seconds 395.93 # Real time elapsed on the host +host_inst_rate 192800 # Simulator instruction rate (inst/s) +host_op_rate 192800 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 50911418 # Simulator tick rate (ticks/s) +host_mem_usage 230228 # Number of bytes of host memory used +host_seconds 436.62 # Real time elapsed on the host sim_insts 84179709 # Number of instructions simulated sim_ops 84179709 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -364,7 +364,7 @@ system.cpu.iq.iqInstsAdded 112744524 # Nu system.cpu.iq.iqNonSpecInstsAdded 2237 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 100145020 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 122649 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 28075682 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 28567051 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 21979359 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 1848 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 44211553 # Number of insts issued each cycle @@ -457,10 +457,10 @@ system.cpu.iq.rate 2.252601 # In system.cpu.iq.fu_busy_cnt 2379738 # FU busy when requested system.cpu.iq.fu_busy_rate 0.023763 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 231363005 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 131215529 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 131706335 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 90039702 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 15640975 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 9648680 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 9649243 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 7175345 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 94170320 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 8354431 # Number of floating point alu accesses diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini index 963ba1258..a3174479b 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -145,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -157,6 +154,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -191,6 +189,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -208,7 +207,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -498,8 +496,9 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -558,6 +557,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.istage2_mmu] @@ -565,6 +565,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -582,7 +583,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -607,6 +607,7 @@ children=prefetcher tags addr_ranges=0:18446744073709551615 assoc=16 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=12 @@ -628,19 +629,27 @@ mem_side=system.membus.slave[1] [system.cpu.l2cache.prefetcher] type=StridePrefetcher +cache_snoop=false clk_domain=system.cpu_clk_domain -cross_pages=false -data_accesses_only=false degree=8 eventq_index=0 -inst_tagged=true latency=1 -on_miss_only=false -on_prefetch=true -on_read_only=false -serial_squash=false -size=100 +max_conf=7 +min_conf=0 +on_data=true +on_inst=true +on_miss=false +on_read=true +on_write=true +queue_filter=true +queue_size=32 +queue_squash=true +start_conf=4 sys=system +table_assoc=4 +table_sets=16 +tag_prefetch=true +thresh_conf=4 use_master_id=true [system.cpu.l2cache.tags] @@ -657,13 +666,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -673,14 +685,16 @@ eventq_index=0 type=LiveProcess cmd=twolf smred cwd=build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing +drivers= egid=100 env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf +executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/twolf gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -710,11 +724,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -745,7 +762,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -754,6 +771,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simerr b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simerr index 1a4f96712..341b479f7 100755 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simerr @@ -1 +1,2 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout index 8dd189a74..e77a79916 100755 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout @@ -1,12 +1,15 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:22:42 -gem5 started Jun 21 2014 21:53:28 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 12:02:59 gem5 executing on phenom command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing + +Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sav +Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/o3-timing/smred.sv2 Global frequency set at 1000000000000 ticks per second - 0: system.cpu.isa: ISA system set to: 0 0x4f074c0 + 0: system.cpu.isa: ISA system set to: 0 0x2e8fab0 info: Entering event queue @ 0. Starting simulation... TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988 @@ -22,4 +25,4 @@ info: Increasing stack size by one page. 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -122 123 124 Exiting @ tick 74056845500 because target called exit() +122 123 124 Exiting @ tick 85027009000 because target called exit() diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt index 93505db81..3b1c45895 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.085027 # Nu sim_ticks 85027009000 # Number of ticks simulated final_tick 85027009000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 134467 # Simulator instruction rate (inst/s) -host_op_rate 141751 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 66356016 # Simulator tick rate (ticks/s) -host_mem_usage 312828 # Number of bytes of host memory used -host_seconds 1281.38 # Real time elapsed on the host +host_inst_rate 123827 # Simulator instruction rate (inst/s) +host_op_rate 130534 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 61105425 # Simulator tick rate (ticks/s) +host_mem_usage 242728 # Number of bytes of host memory used +host_seconds 1391.48 # Real time elapsed on the host sim_insts 172303021 # Number of instructions simulated sim_ops 181635953 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -448,7 +448,7 @@ system.cpu.iq.iqInstsAdded 264824262 # Nu system.cpu.iq.iqNonSpecInstsAdded 45858 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 214907174 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 5191222 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 82643318 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 83234167 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 219950944 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 642 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 169913124 # Number of insts issued each cycle @@ -541,10 +541,10 @@ system.cpu.iq.rate 1.263758 # In system.cpu.iq.fu_busy_cnt 53853149 # FU busy when requested system.cpu.iq.fu_busy_rate 0.250588 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 654819591 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 345508564 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 346099299 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 204603377 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 3952252 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 2011834 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 2011948 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 1806382 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 266627232 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 2133091 # Number of floating point alu accesses diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini index fce25a10a..427c87261 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -139,7 +140,7 @@ clk_domain=system.cpu_clk_domain eventq_index=0 [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -153,7 +154,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -620,8 +620,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -642,7 +645,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/twolf +executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/twolf gid=100 input=cin kvmInSE=false @@ -675,11 +678,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master @@ -710,7 +716,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simerr b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simerr index 1a4f96712..341b479f7 100755 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simerr +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simerr @@ -1 +1,2 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout index 22525bb08..7449e222c 100755 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout @@ -1,12 +1,11 @@ -Redirecting stdout to build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/simout -Redirecting stderr to build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 28 2014 04:02:39 -gem5 started Aug 28 2014 04:26:16 -gem5 executing on ribera.cs.wisc.edu -command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing +gem5 compiled Apr 22 2015 08:10:29 +gem5 started Apr 22 2015 10:10:22 +gem5 executing on phenom +command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing + Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/smred.sav Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/smred.sv2 Global frequency set at 1000000000000 ticks per second @@ -20,10 +19,397 @@ info: Increasing stack size by one page. info: Increasing stack size by one page. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 - 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 + 31 32 33 34 35 36 37 38 39 40 41 42 info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. +info: Increasing stack size by one page. + 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -122 123 124 Exiting @ tick 145755370500 because target called exit() +122 123 124 Exiting @ tick 148668850500 because target called exit() diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt index f61e2dda8..de0dbec15 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.148669 # Nu sim_ticks 148668850500 # Number of ticks simulated final_tick 148668850500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 82634 # Simulator instruction rate (inst/s) -host_op_rate 138502 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 93018548 # Simulator tick rate (ticks/s) -host_mem_usage 346916 # Number of bytes of host memory used -host_seconds 1598.27 # Real time elapsed on the host +host_inst_rate 74389 # Simulator instruction rate (inst/s) +host_op_rate 124683 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 83737935 # Simulator tick rate (ticks/s) +host_mem_usage 279976 # Number of bytes of host memory used +host_seconds 1775.41 # Real time elapsed on the host sim_insts 132071192 # Number of instructions simulated sim_ops 221363384 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -331,7 +331,7 @@ system.cpu.iq.iqInstsAdded 341334735 # Nu system.cpu.iq.iqNonSpecInstsAdded 4899 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 266857181 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 74594 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 119571219 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 119976250 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 250511173 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 3654 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 297137957 # Number of insts issued each cycle @@ -424,10 +424,10 @@ system.cpu.iq.rate 0.897488 # In system.cpu.iq.fu_busy_cnt 3218385 # FU busy when requested system.cpu.iq.fu_busy_rate 0.012060 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 829150425 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 456900250 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 457303449 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 260922611 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 4994873 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 4333463 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 4335295 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 2397328 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 266351243 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 2512979 # Number of floating point alu accesses |