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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-08-16 18:48:15 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-08-16 18:48:15 -0400 |
| commit | f3976f9cd98ef21ae643fbbc0c6ba3ec35df43bb (patch) | |
| tree | aee8692520309a0b9b14f9093f6839c432d1960a /tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt | |
| parent | df3af8018e5a252f7c4e8f52b872263c8ab375cc (diff) | |
| download | gem5-f3976f9cd98ef21ae643fbbc0c6ba3ec35df43bb.tar.xz | |
More regression updates.
Get rid of caches in simple-timing config for now.
tests/SConscript:
another line for diff to ignore
tests/configs/simple-timing.py:
turn off caches for now
tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout:
update for inst/tick rate (old one was debug?)
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout:
works now (no caches)
--HG--
extra : convert_revision : 472030f63297346976db6274a78235c93d4eef8e
Diffstat (limited to 'tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt')
| -rw-r--r-- | tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt b/tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt new file mode 100644 index 000000000..fda0cd849 --- /dev/null +++ b/tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt @@ -0,0 +1,18 @@ + +---------- Begin Simulation Statistics ---------- +host_inst_rate 57948 # Simulator instruction rate (inst/s) +host_mem_usage 146660 # Number of bytes of host memory used +host_seconds 0.04 # Real time elapsed on the host +host_tick_rate 73225 # Simulator tick rate (ticks/s) +sim_freq 1000000000000 # Frequency of simulated ticks +sim_insts 2578 # Number of instructions simulated +sim_seconds 0.000000 # Number of seconds simulated +sim_ticks 3287 # Number of ticks simulated +system.cpu.idle_fraction 0 # Percentage of idle cycles +system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.numCycles 0 # number of cpu cycles simulated +system.cpu.num_insts 2578 # Number of instructions executed +system.cpu.num_refs 710 # Number of memory references +system.cpu.workload.PROG:num_syscalls 4 # Number of system calls + +---------- End Simulation Statistics ---------- |