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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2008-01-15 13:13:08 -0500 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2008-01-15 13:13:08 -0500 |
| commit | a1d5beab953b6f97c7f432a53370e68d0f192cc4 (patch) | |
| tree | 0ef9fde11008dbc4e88950828aca9d255ac588b4 /tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt | |
| parent | 0b6876a0c0a999410311e0397d366a47728d749a (diff) | |
| download | gem5-a1d5beab953b6f97c7f432a53370e68d0f192cc4.tar.xz | |
Update O3 ref outputs: very minor stats change due to previous cset.
(from Steve on behalf of m5test).
--HG--
extra : convert_revision : 696efdaa3dd7680dfc9c797a6a46a5053238c7d2
Diffstat (limited to 'tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt')
| -rw-r--r-- | tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt index 5d4ecfb70..dbf983746 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt +++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt @@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect 213 # Nu global.BPredUnit.condPredicted 401 # Number of conditional branches predicted global.BPredUnit.lookups 824 # Number of BP lookups global.BPredUnit.usedRAS 163 # Number of times the RAS was used to get a target. -host_inst_rate 66708 # Simulator instruction rate (inst/s) -host_mem_usage 196356 # Number of bytes of host memory used -host_seconds 0.04 # Real time elapsed on the host -host_tick_rate 66966767 # Simulator tick rate (ticks/s) +host_inst_rate 1500 # Simulator instruction rate (inst/s) +host_mem_usage 151288 # Number of bytes of host memory used +host_seconds 1.59 # Real time elapsed on the host +host_tick_rate 1513804 # Simulator tick rate (ticks/s) memdepunit.memDep.conflictingLoads 7 # Number of conflicting loads. memdepunit.memDep.conflictingStores 7 # Number of conflicting stores. memdepunit.memDep.insertedLoads 698 # Number of loads inserted to the mem dependence unit. @@ -26,9 +26,9 @@ system.cpu.commit.COM:bw_limited 0 # nu system.cpu.commit.COM:committed_per_cycle.start_dist # Number of insts commited each cycle system.cpu.commit.COM:committed_per_cycle.samples 4452 system.cpu.commit.COM:committed_per_cycle.min_value 0 - 0 3490 7839.17% - 1 258 579.51% - 2 340 763.70% + 0 3491 7841.42% + 1 256 575.02% + 2 341 765.95% 3 140 314.47% 4 70 157.23% 5 70 157.23% |