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author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-09-05 16:24:47 -0400 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-09-05 16:24:47 -0400 |
commit | 6c7a490c2b779ea45adfc5708f50aa16718582e4 (patch) | |
tree | 3633153645f9f885e8155ba740ef7aaa1a221650 /tests/quick/00.hello/ref/alpha/tru64/simple-atomic | |
parent | 89f0bc9e4c6e1c0bc58f5f5a88cdac5889758b1f (diff) | |
download | gem5-6c7a490c2b779ea45adfc5708f50aa16718582e4.tar.xz |
Update reference config.ini files to include port mappings.
--HG--
extra : convert_revision : f9e91a60fa09b707d2a26be57f265b7ab1c07263
Diffstat (limited to 'tests/quick/00.hello/ref/alpha/tru64/simple-atomic')
3 files changed, 11 insertions, 7 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini index d845c0efb..1ec052afb 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini @@ -68,6 +68,8 @@ simulate_stalls=false system=system width=1 workload=system.cpu.workload +dcache_port=system.membus.port[2] +icache_port=system.membus.port[1] [system.cpu.workload] type=LiveProcess @@ -81,12 +83,14 @@ system=system [system.membus] type=Bus bus_id=0 +port=system.physmem.port system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=PhysicalMemory file= latency=1 range=0:134217727 +port=system.membus.port[0] [trace] bufsize=0 diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt index 2317e88dc..b4747f1f4 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 58510 # Simulator instruction rate (inst/s) -host_mem_usage 146720 # Number of bytes of host memory used -host_seconds 0.04 # Real time elapsed on the host -host_tick_rate 57971 # Simulator tick rate (ticks/s) +host_inst_rate 46556 # Simulator instruction rate (inst/s) +host_mem_usage 147672 # Number of bytes of host memory used +host_seconds 0.06 # Real time elapsed on the host +host_tick_rate 46204 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 2578 # Number of instructions simulated sim_seconds 0.000000 # Number of seconds simulated diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout index d7cbe766c..438e330f5 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout @@ -6,8 +6,8 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Aug 18 2006 00:06:43 -M5 started Fri Aug 18 00:12:48 2006 +M5 compiled Sep 5 2006 15:28:48 +M5 started Tue Sep 5 15:42:18 2006 M5 executing on zizzer.eecs.umich.edu -command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-atomic tests/run.py quick/00.hello/alpha/linux/simple-atomic +command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-atomic tests/run.py quick/00.hello/alpha/tru64/simple-atomic Exiting @ tick 2577 because target called exit() |