m5: Regression Tester Update

This patch includes the necessary regression updates to test the new ruby
configuration system.  The patch includes support for multiple ruby protocols
and adds the ruby random tester.  The patch removes atomic mode test for
ruby since ruby does not support atomic mode acceses.  These tests can be
added back in when ruby supports atomic mode for real.

--HG--
rename : tests/quick/50.memtest/test.py => tests/quick/60.rubytest/test.py

5 files changed, 1271 insertions, 0 deletions

diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini
new file mode 100644
index 000000000..2b037e55f
--- /dev/null
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini
@@ -0,0 +1,287 @@
+[root]
+type=Root
+children=system
+dummy=0
+
+[system]
+type=System
+children=cpu physmem ruby
+mem_mode=timing
+physmem=system.physmem
+
+[system.cpu]
+type=TimingSimpleCPU
+children=dtb itb tracer workload
+checker=Null
+clock=1
+cpu_id=0
+defer_registration=false
+do_checkpoint_insts=true
+do_statistics_insts=true
+dtb=system.cpu.dtb
+function_trace=false
+function_trace_start=0
+itb=system.cpu.itb
+max_insts_all_threads=0
+max_insts_any_thread=0
+max_loads_all_threads=0
+max_loads_any_thread=0
+numThreads=1
+phase=0
+progress_interval=0
+system=system
+tracer=system.cpu.tracer
+workload=system.cpu.workload
+dcache_port=system.ruby.network.topology.ext_links0.ext_node.sequencer.port[1]
+icache_port=system.ruby.network.topology.ext_links0.ext_node.sequencer.port[0]
+
+[system.cpu.dtb]
+type=AlphaTLB
+size=64
+
+[system.cpu.itb]
+type=AlphaTLB
+size=48
+
+[system.cpu.tracer]
+type=ExeTracer
+
+[system.cpu.workload]
+type=LiveProcess
+cmd=hello
+cwd=
+egid=100
+env=
+errout=cerr
+euid=100
+executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/hello/bin/alpha/tru64/hello
+gid=100
+input=cin
+max_stack_size=67108864
+output=cout
+pid=100
+ppid=99
+simpoint=0
+system=system
+uid=100
+
+[system.physmem]
+type=PhysicalMemory
+file=
+latency=30
+latency_var=0
+null=false
+range=0:134217727
+zero=false
+port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort
+
+[system.ruby]
+type=RubySystem
+children=debug network profiler tracer
+block_size_bytes=64
+clock=1
+debug=system.ruby.debug
+mem_size=134217728
+network=system.ruby.network
+profiler=system.ruby.profiler
+random_seed=1234
+randomization=false
+stats_filename=ruby.stats
+tracer=system.ruby.tracer
+
+[system.ruby.debug]
+type=RubyDebug
+filter_string=none
+output_filename=none
+protocol_trace=false
+start_time=1
+verbosity_string=none
+
+[system.ruby.network]
+type=SimpleNetwork
+children=topology
+adaptive_routing=true
+buffer_size=0
+control_msg_size=8
+endpoint_bandwidth=10000
+link_latency=1
+number_of_virtual_networks=10
+topology=system.ruby.network.topology
+
+[system.ruby.network.topology]
+type=Topology
+children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2
+ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
+int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
+num_int_nodes=4
+print_config=false
+
+[system.ruby.network.topology.ext_links0]
+type=ExtLink
+children=ext_node
+bw_multiplier=64
+ext_node=system.ruby.network.topology.ext_links0.ext_node
+int_node=0
+latency=1
+weight=1
+
+[system.ruby.network.topology.ext_links0.ext_node]
+type=L1Cache_Controller
+children=sequencer
+L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
+L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
+N_tokens=2
+buffer_size=0
+dynamic_timeout_enabled=true
+fixed_timeout_latency=300
+l1_request_latency=2
+l1_response_latency=2
+l2_select_num_bits=0
+number_of_TBEs=256
+recycle_latency=10
+retry_threshold=1
+sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer
+transitions_per_cycle=32
+version=0
+
+[system.ruby.network.topology.ext_links0.ext_node.sequencer]
+type=RubySequencer
+children=dcache icache
+dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
+deadlock_threshold=500000
+icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
+max_outstanding_requests=16
+physmem=system.physmem
+using_ruby_tester=false
+version=0
+physMemPort=system.physmem.port[0]
+port=system.cpu.icache_port system.cpu.dcache_port
+
+[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache]
+type=RubyCache
+assoc=2
+latency=3
+replacement_policy=PSEUDO_LRU
+size=256
+
+[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache]
+type=RubyCache
+assoc=2
+latency=3
+replacement_policy=PSEUDO_LRU
+size=256
+
+[system.ruby.network.topology.ext_links1]
+type=ExtLink
+children=ext_node
+bw_multiplier=64
+ext_node=system.ruby.network.topology.ext_links1.ext_node
+int_node=1
+latency=1
+weight=1
+
+[system.ruby.network.topology.ext_links1.ext_node]
+type=L2Cache_Controller
+children=L2cacheMemory
+L2cacheMemory=system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory
+N_tokens=2
+buffer_size=0
+filtering_enabled=true
+l2_request_latency=10
+l2_response_latency=10
+number_of_TBEs=256
+recycle_latency=10
+transitions_per_cycle=32
+version=0
+
+[system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory]
+type=RubyCache
+assoc=2
+latency=15
+replacement_policy=PSEUDO_LRU
+size=512
+
+[system.ruby.network.topology.ext_links2]
+type=ExtLink
+children=ext_node
+bw_multiplier=64
+ext_node=system.ruby.network.topology.ext_links2.ext_node
+int_node=2
+latency=1
+weight=1
+
+[system.ruby.network.topology.ext_links2.ext_node]
+type=Directory_Controller
+children=directory memBuffer
+buffer_size=0
+directory=system.ruby.network.topology.ext_links2.ext_node.directory
+directory_latency=6
+distributed_persistent=true
+fixed_timeout_latency=300
+l2_select_num_bits=0
+memBuffer=system.ruby.network.topology.ext_links2.ext_node.memBuffer
+number_of_TBEs=256
+recycle_latency=10
+transitions_per_cycle=32
+version=0
+
+[system.ruby.network.topology.ext_links2.ext_node.directory]
+type=RubyDirectoryMemory
+size=134217728
+version=0
+
+[system.ruby.network.topology.ext_links2.ext_node.memBuffer]
+type=RubyMemoryControl
+bank_bit_0=8
+bank_busy_time=11
+bank_queue_size=12
+banks_per_rank=8
+basic_bus_busy_time=2
+dimm_bit_0=12
+dimms_per_channel=2
+mem_bus_cycle_multiplier=10
+mem_ctl_latency=12
+mem_fixed_delay=0
+mem_random_arbitrate=0
+rank_bit_0=11
+rank_rank_delay=1
+ranks_per_dimm=2
+read_write_delay=2
+refresh_period=1560
+tFaw=0
+version=0
+
+[system.ruby.network.topology.int_links0]
+type=IntLink
+bw_multiplier=16
+latency=1
+node_a=0
+node_b=3
+weight=1
+
+[system.ruby.network.topology.int_links1]
+type=IntLink
+bw_multiplier=16
+latency=1
+node_a=1
+node_b=3
+weight=1
+
+[system.ruby.network.topology.int_links2]
+type=IntLink
+bw_multiplier=16
+latency=1
+node_a=2
+node_b=3
+weight=1
+
+[system.ruby.profiler]
+type=RubyProfiler
+all_instructions=false
+hot_lines=false
+num_of_sequencers=1
+
+[system.ruby.tracer]
+type=RubyTracer
+warmup_length=100000
+
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats
new file mode 100644
index 000000000..3eaa7bb2f
--- /dev/null
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats
@@ -0,0 +1,912 @@
+
+================ Begin RubySystem Configuration Print ================
+
+RubySystem config:
+  random_seed: 1234
+  randomization: 0
+  cycle_period: 1
+  block_size_bytes: 64
+  block_size_bits: 6
+  memory_size_bytes: 134217728
+  memory_size_bits: 27
+
+Network Configuration
+---------------------
+network: SIMPLE_NETWORK
+topology: 
+
+virtual_net_0: active, ordered
+virtual_net_1: active, unordered
+virtual_net_2: active, ordered
+virtual_net_3: active, unordered
+virtual_net_4: active, unordered
+virtual_net_5: active, ordered
+virtual_net_6: inactive
+virtual_net_7: inactive
+virtual_net_8: inactive
+virtual_net_9: inactive
+
+
+Profiler Configuration
+----------------------
+periodic_stats_period: 1000000
+
+================ End RubySystem Configuration Print ================
+
+
+Real time: Jan/28/2010 15:55:46
+
+Profiler Stats
+--------------
+Elapsed_time_in_seconds: 0
+Elapsed_time_in_minutes: 0
+Elapsed_time_in_hours: 0
+Elapsed_time_in_days: 0
+
+Virtual_time_in_seconds: 0.35
+Virtual_time_in_minutes: 0.00583333
+Virtual_time_in_hours:   9.72222e-05
+Virtual_time_in_days:    4.05093e-06
+
+Ruby_current_time: 90308
+Ruby_start_time: 0
+Ruby_cycles: 90308
+
+mbytes_resident: 33.1172
+mbytes_total: 33.125
+resident_ratio: 1
+
+Total_misses: 0
+total_misses: 0 [ 0 ]
+user_misses: 0 [ 0 ]
+supervisor_misses: 0 [ 0 ]
+
+ruby_cycles_executed: 90309 [ 90309 ]
+
+transactions_started: 0 [ 0 ]
+transactions_ended: 0 [ 0 ]
+cycles_per_transaction: 0 [ 0 ]
+misses_per_transaction: 0 [ 0 ]
+
+
+Busy Controller Counts:
+L1Cache-0:0  
+L2Cache-0:0  
+Directory-0:0  
+
+
+Busy Bank Count:0
+
+sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average:     1 | standard deviation: 0 | 0 3295 ]
+
+All Non-Zero Cycle Demand Cache Accesses
+----------------------------------------
+miss_latency: [binsize: 2 max: 283 count: 3294 average: 26.4159 | standard deviation: 58.1846 | 0 2776 0 0 0 0 0 0 0 0 0 0 0 76 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 89 61 81 78 45 5 4 1 0 2 20 13 13 11 10 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_1: [binsize: 2 max: 283 count: 2585 average: 19.2785 | standard deviation: 49.8133 | 0 2315 0 0 0 0 0 0 0 0 0 0 0 26 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 44 44 38 49 22 3 4 0 0 0 9 11 3 8 6 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_2: [binsize: 2 max: 273 count: 415 average: 66.3494 | standard deviation: 81.4668 | 0 233 0 0 0 0 0 0 0 0 0 0 0 33 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 15 34 18 20 1 0 1 0 2 6 2 10 2 2 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_3: [binsize: 2 max: 259 count: 294 average: 32.8027 | standard deviation: 63.5503 | 0 228 0 0 0 0 0 0 0 0 0 0 0 17 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 2 9 11 3 1 0 0 0 0 5 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+
+All Non-Zero Cycle SW Prefetch Requests
+------------------------------------
+prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+Request vs. RubySystem State Profile
+--------------------------------
+
+
+filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+
+Message Delayed Cycles
+----------------------
+Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+
+Resource Usage
+--------------
+page_size: 4096
+user_time: 0
+system_time: 0
+page_reclaims: 7136
+page_faults: 2141
+swaps: 0
+block_inputs: 0
+block_outputs: 0
+
+Network Stats
+-------------
+
+switch_0_inlinks: 2
+switch_0_outlinks: 2
+links_utilized_percent_switch_0: 0.160659
+  links_utilized_percent_switch_0_link_0: 0.0646399 bw: 640000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 0.256677 bw: 160000 base_latency: 1
+
+  outgoing_messages_switch_0_link_0_Response_Data: 442 31824 [ 0 442 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 76 5472 [ 0 76 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Control: 8 64 [ 0 8 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Request_Control: 518 4144 [ 0 0 0 0 518 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Data: 452 32544 [ 0 452 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Control: 50 400 [ 0 50 0 0 0 0 0 0 0 0 ] base_latency: 1
+
+switch_1_inlinks: 2
+switch_1_outlinks: 2
+links_utilized_percent_switch_1: 0.0939286
+  links_utilized_percent_switch_1_link_0: 0.0641693 bw: 640000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 0.123688 bw: 160000 base_latency: 1
+
+  outgoing_messages_switch_1_link_0_Request_Control: 518 4144 [ 0 0 0 0 518 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Data: 452 32544 [ 0 452 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Control: 50 400 [ 0 50 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Request_Control: 447 3576 [ 0 0 0 447 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_ResponseL2hit_Data: 76 5472 [ 0 76 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Control: 8 64 [ 0 8 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Data: 81 5832 [ 0 81 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 366 2928 [ 0 366 0 0 0 0 0 0 0 0 ] base_latency: 1
+
+switch_2_inlinks: 2
+switch_2_outlinks: 2
+links_utilized_percent_switch_2: 0.120795
+  links_utilized_percent_switch_2_link_0: 0.0213436 bw: 640000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 0.220246 bw: 160000 base_latency: 1
+
+  outgoing_messages_switch_2_link_0_Request_Control: 447 3576 [ 0 0 0 447 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Data: 81 5832 [ 0 81 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 366 2928 [ 0 366 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Data: 442 31824 [ 0 442 0 0 0 0 0 0 0 0 ] base_latency: 1
+
+switch_3_inlinks: 3
+switch_3_outlinks: 3
+links_utilized_percent_switch_3: 0.200204
+  links_utilized_percent_switch_3_link_0: 0.25856 bw: 160000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 0.256677 bw: 160000 base_latency: 1
+  links_utilized_percent_switch_3_link_2: 0.0853745 bw: 160000 base_latency: 1
+
+  outgoing_messages_switch_3_link_0_Response_Data: 442 31824 [ 0 442 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 76 5472 [ 0 76 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Control: 8 64 [ 0 8 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Request_Control: 518 4144 [ 0 0 0 0 518 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Data: 452 32544 [ 0 452 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Control: 50 400 [ 0 50 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Request_Control: 447 3576 [ 0 0 0 447 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Writeback_Data: 81 5832 [ 0 81 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Writeback_Control: 366 2928 [ 0 366 0 0 0 0 0 0 0 0 ] base_latency: 1
+
+Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_misses_per_transaction: nan
+
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+
+Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_misses: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_demand_misses: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_sw_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_hw_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_misses_per_transaction: nan
+
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+
+ --- L1Cache 0 ---
+ - Event Counts -
+Load  415
+Ifetch  2585
+Store  294
+L1_Replacement  502
+Data_Shared  59
+Data_Owner  0
+Data_All_Tokens  459
+Ack  8
+Ack_All_Tokens  0
+Transient_GETX  0
+Transient_Local_GETX  0
+Transient_GETS  0
+Transient_Local_GETS  0
+Transient_GETS_Last_Token  0
+Transient_Local_GETS_Last_Token  0
+Persistent_GETX  0
+Persistent_GETS  0
+Own_Lock_or_Unlock  0
+Request_Timeout  0
+Use_TimeoutStarverX  0
+Use_TimeoutStarverS  0
+Use_TimeoutNoStarvers  458
+
+ - Transitions -
+NP  Load  182
+NP  Ifetch  270
+NP  Store  58
+NP  Data_Shared  0 <-- 
+NP  Data_Owner  0 <-- 
+NP  Data_All_Tokens  0 <-- 
+NP  Ack  0 <-- 
+NP  Transient_GETX  0 <-- 
+NP  Transient_Local_GETX  0 <-- 
+NP  Transient_GETS  0 <-- 
+NP  Transient_Local_GETS  0 <-- 
+NP  Persistent_GETX  0 <-- 
+NP  Persistent_GETS  0 <-- 
+NP  Own_Lock_or_Unlock  0 <-- 
+
+I  Load  0 <-- 
+I  Ifetch  0 <-- 
+I  Store  0 <-- 
+I  L1_Replacement  0 <-- 
+I  Data_Shared  0 <-- 
+I  Data_Owner  0 <-- 
+I  Data_All_Tokens  0 <-- 
+I  Ack  0 <-- 
+I  Transient_GETX  0 <-- 
+I  Transient_Local_GETX  0 <-- 
+I  Transient_GETS  0 <-- 
+I  Transient_Local_GETS  0 <-- 
+I  Transient_GETS_Last_Token  0 <-- 
+I  Transient_Local_GETS_Last_Token  0 <-- 
+I  Persistent_GETX  0 <-- 
+I  Persistent_GETS  0 <-- 
+I  Own_Lock_or_Unlock  0 <-- 
+
+S  Load  30
+S  Ifetch  188
+S  Store  8
+S  L1_Replacement  50
+S  Data_Shared  0 <-- 
+S  Data_Owner  0 <-- 
+S  Data_All_Tokens  0 <-- 
+S  Ack  0 <-- 
+S  Transient_GETX  0 <-- 
+S  Transient_Local_GETX  0 <-- 
+S  Transient_GETS  0 <-- 
+S  Transient_Local_GETS  0 <-- 
+S  Transient_GETS_Last_Token  0 <-- 
+S  Transient_Local_GETS_Last_Token  0 <-- 
+S  Persistent_GETX  0 <-- 
+S  Persistent_GETS  0 <-- 
+S  Own_Lock_or_Unlock  0 <-- 
+
+O  Load  0 <-- 
+O  Ifetch  0 <-- 
+O  Store  0 <-- 
+O  L1_Replacement  0 <-- 
+O  Data_Shared  0 <-- 
+O  Data_All_Tokens  0 <-- 
+O  Ack  0 <-- 
+O  Ack_All_Tokens  0 <-- 
+O  Transient_GETX  0 <-- 
+O  Transient_Local_GETX  0 <-- 
+O  Transient_GETS  0 <-- 
+O  Transient_Local_GETS  0 <-- 
+O  Transient_GETS_Last_Token  0 <-- 
+O  Transient_Local_GETS_Last_Token  0 <-- 
+O  Persistent_GETX  0 <-- 
+O  Persistent_GETS  0 <-- 
+O  Own_Lock_or_Unlock  0 <-- 
+
+M  Load  67
+M  Ifetch  1196
+M  Store  29
+M  L1_Replacement  356
+M  Transient_GETX  0 <-- 
+M  Transient_Local_GETX  0 <-- 
+M  Transient_GETS  0 <-- 
+M  Transient_Local_GETS  0 <-- 
+M  Persistent_GETX  0 <-- 
+M  Persistent_GETS  0 <-- 
+M  Own_Lock_or_Unlock  0 <-- 
+
+MM  Load  96
+MM  Ifetch  0 <-- 
+MM  Store  111
+MM  L1_Replacement  96
+MM  Transient_GETX  0 <-- 
+MM  Transient_Local_GETX  0 <-- 
+MM  Transient_GETS  0 <-- 
+MM  Transient_Local_GETS  0 <-- 
+MM  Persistent_GETX  0 <-- 
+MM  Persistent_GETS  0 <-- 
+MM  Own_Lock_or_Unlock  0 <-- 
+
+M_W  Load  34
+M_W  Ifetch  931
+M_W  Store  3
+M_W  L1_Replacement  0 <-- 
+M_W  Transient_GETX  0 <-- 
+M_W  Transient_Local_GETX  0 <-- 
+M_W  Transient_GETS  0 <-- 
+M_W  Transient_Local_GETS  0 <-- 
+M_W  Persistent_GETX  0 <-- 
+M_W  Persistent_GETS  0 <-- 
+M_W  Own_Lock_or_Unlock  0 <-- 
+M_W  Use_TimeoutStarverX  0 <-- 
+M_W  Use_TimeoutStarverS  0 <-- 
+M_W  Use_TimeoutNoStarvers  389
+
+MM_W  Load  6
+MM_W  Ifetch  0 <-- 
+MM_W  Store  85
+MM_W  L1_Replacement  0 <-- 
+MM_W  Transient_GETX  0 <-- 
+MM_W  Transient_Local_GETX  0 <-- 
+MM_W  Transient_GETS  0 <-- 
+MM_W  Transient_Local_GETS  0 <-- 
+MM_W  Persistent_GETX  0 <-- 
+MM_W  Persistent_GETS  0 <-- 
+MM_W  Own_Lock_or_Unlock  0 <-- 
+MM_W  Use_TimeoutStarverX  0 <-- 
+MM_W  Use_TimeoutStarverS  0 <-- 
+MM_W  Use_TimeoutNoStarvers  69
+
+IM  Load  0 <-- 
+IM  Ifetch  0 <-- 
+IM  Store  0 <-- 
+IM  L1_Replacement  0 <-- 
+IM  Data_Shared  0 <-- 
+IM  Data_Owner  0 <-- 
+IM  Data_All_Tokens  58
+IM  Ack  1
+IM  Transient_GETX  0 <-- 
+IM  Transient_Local_GETX  0 <-- 
+IM  Transient_GETS  0 <-- 
+IM  Transient_Local_GETS  0 <-- 
+IM  Transient_GETS_Last_Token  0 <-- 
+IM  Transient_Local_GETS_Last_Token  0 <-- 
+IM  Persistent_GETX  0 <-- 
+IM  Persistent_GETS  0 <-- 
+IM  Own_Lock_or_Unlock  0 <-- 
+IM  Request_Timeout  0 <-- 
+
+SM  Load  0 <-- 
+SM  Ifetch  0 <-- 
+SM  Store  0 <-- 
+SM  L1_Replacement  0 <-- 
+SM  Data_Shared  0 <-- 
+SM  Data_Owner  0 <-- 
+SM  Data_All_Tokens  8
+SM  Ack  0 <-- 
+SM  Transient_GETX  0 <-- 
+SM  Transient_Local_GETX  0 <-- 
+SM  Transient_GETS  0 <-- 
+SM  Transient_Local_GETS  0 <-- 
+SM  Transient_GETS_Last_Token  0 <-- 
+SM  Transient_Local_GETS_Last_Token  0 <-- 
+SM  Persistent_GETX  0 <-- 
+SM  Persistent_GETS  0 <-- 
+SM  Own_Lock_or_Unlock  0 <-- 
+SM  Request_Timeout  0 <-- 
+
+OM  Load  0 <-- 
+OM  Ifetch  0 <-- 
+OM  Store  0 <-- 
+OM  L1_Replacement  0 <-- 
+OM  Data_Shared  0 <-- 
+OM  Data_All_Tokens  0 <-- 
+OM  Ack  0 <-- 
+OM  Ack_All_Tokens  0 <-- 
+OM  Transient_GETX  0 <-- 
+OM  Transient_Local_GETX  0 <-- 
+OM  Transient_GETS  0 <-- 
+OM  Transient_Local_GETS  0 <-- 
+OM  Transient_GETS_Last_Token  0 <-- 
+OM  Transient_Local_GETS_Last_Token  0 <-- 
+OM  Persistent_GETX  0 <-- 
+OM  Persistent_GETS  0 <-- 
+OM  Own_Lock_or_Unlock  0 <-- 
+OM  Request_Timeout  0 <-- 
+
+IS  Load  0 <-- 
+IS  Ifetch  0 <-- 
+IS  Store  0 <-- 
+IS  L1_Replacement  0 <-- 
+IS  Data_Shared  59
+IS  Data_Owner  0 <-- 
+IS  Data_All_Tokens  393
+IS  Ack  7
+IS  Transient_GETX  0 <-- 
+IS  Transient_Local_GETX  0 <-- 
+IS  Transient_GETS  0 <-- 
+IS  Transient_Local_GETS  0 <-- 
+IS  Transient_GETS_Last_Token  0 <-- 
+IS  Transient_Local_GETS_Last_Token  0 <-- 
+IS  Persistent_GETX  0 <-- 
+IS  Persistent_GETS  0 <-- 
+IS  Own_Lock_or_Unlock  0 <-- 
+IS  Request_Timeout  0 <-- 
+
+I_L  Load  0 <-- 
+I_L  Ifetch  0 <-- 
+I_L  Store  0 <-- 
+I_L  L1_Replacement  0 <-- 
+I_L  Data_Shared  0 <-- 
+I_L  Data_Owner  0 <-- 
+I_L  Data_All_Tokens  0 <-- 
+I_L  Ack  0 <-- 
+I_L  Transient_GETX  0 <-- 
+I_L  Transient_Local_GETX  0 <-- 
+I_L  Transient_GETS  0 <-- 
+I_L  Transient_Local_GETS  0 <-- 
+I_L  Transient_GETS_Last_Token  0 <-- 
+I_L  Transient_Local_GETS_Last_Token  0 <-- 
+I_L  Persistent_GETX  0 <-- 
+I_L  Persistent_GETS  0 <-- 
+I_L  Own_Lock_or_Unlock  0 <-- 
+
+S_L  Load  0 <-- 
+S_L  Ifetch  0 <-- 
+S_L  Store  0 <-- 
+S_L  L1_Replacement  0 <-- 
+S_L  Data_Shared  0 <-- 
+S_L  Data_Owner  0 <-- 
+S_L  Data_All_Tokens  0 <-- 
+S_L  Ack  0 <-- 
+S_L  Transient_GETX  0 <-- 
+S_L  Transient_Local_GETX  0 <-- 
+S_L  Transient_GETS  0 <-- 
+S_L  Transient_Local_GETS  0 <-- 
+S_L  Transient_GETS_Last_Token  0 <-- 
+S_L  Transient_Local_GETS_Last_Token  0 <-- 
+S_L  Persistent_GETX  0 <-- 
+S_L  Persistent_GETS  0 <-- 
+S_L  Own_Lock_or_Unlock  0 <-- 
+
+IM_L  Load  0 <-- 
+IM_L  Ifetch  0 <-- 
+IM_L  Store  0 <-- 
+IM_L  L1_Replacement  0 <-- 
+IM_L  Data_Shared  0 <-- 
+IM_L  Data_Owner  0 <-- 
+IM_L  Data_All_Tokens  0 <-- 
+IM_L  Ack  0 <-- 
+IM_L  Transient_GETX  0 <-- 
+IM_L  Transient_Local_GETX  0 <-- 
+IM_L  Transient_GETS  0 <-- 
+IM_L  Transient_Local_GETS  0 <-- 
+IM_L  Transient_GETS_Last_Token  0 <-- 
+IM_L  Transient_Local_GETS_Last_Token  0 <-- 
+IM_L  Persistent_GETX  0 <-- 
+IM_L  Persistent_GETS  0 <-- 
+IM_L  Own_Lock_or_Unlock  0 <-- 
+IM_L  Request_Timeout  0 <-- 
+
+SM_L  Load  0 <-- 
+SM_L  Ifetch  0 <-- 
+SM_L  Store  0 <-- 
+SM_L  L1_Replacement  0 <-- 
+SM_L  Data_Shared  0 <-- 
+SM_L  Data_Owner  0 <-- 
+SM_L  Data_All_Tokens  0 <-- 
+SM_L  Ack  0 <-- 
+SM_L  Transient_GETX  0 <-- 
+SM_L  Transient_Local_GETX  0 <-- 
+SM_L  Transient_GETS  0 <-- 
+SM_L  Transient_Local_GETS  0 <-- 
+SM_L  Transient_GETS_Last_Token  0 <-- 
+SM_L  Transient_Local_GETS_Last_Token  0 <-- 
+SM_L  Persistent_GETX  0 <-- 
+SM_L  Persistent_GETS  0 <-- 
+SM_L  Own_Lock_or_Unlock  0 <-- 
+SM_L  Request_Timeout  0 <-- 
+
+IS_L  Load  0 <-- 
+IS_L  Ifetch  0 <-- 
+IS_L  Store  0 <-- 
+IS_L  L1_Replacement  0 <-- 
+IS_L  Data_Shared  0 <-- 
+IS_L  Data_Owner  0 <-- 
+IS_L  Data_All_Tokens  0 <-- 
+IS_L  Ack  0 <-- 
+IS_L  Transient_GETX  0 <-- 
+IS_L  Transient_Local_GETX  0 <-- 
+IS_L  Transient_GETS  0 <-- 
+IS_L  Transient_Local_GETS  0 <-- 
+IS_L  Transient_GETS_Last_Token  0 <-- 
+IS_L  Transient_Local_GETS_Last_Token  0 <-- 
+IS_L  Persistent_GETX  0 <-- 
+IS_L  Persistent_GETS  0 <-- 
+IS_L  Own_Lock_or_Unlock  0 <-- 
+IS_L  Request_Timeout  0 <-- 
+
+Cache Stats: system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory
+  system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_misses: 0
+  system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_demand_misses: 0
+  system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_prefetches: 0
+  system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_sw_prefetches: 0
+  system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_hw_prefetches: 0
+  system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_misses_per_transaction: nan
+
+  system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+
+ --- L2Cache 0 ---
+ - Event Counts -
+L1_GETS  445
+L1_GETS_Last_Token  7
+L1_GETX  66
+L1_INV  0
+Transient_GETX  0
+Transient_GETS  0
+Transient_GETS_Last_Token  0
+L2_Replacement  463
+Writeback_Tokens  27
+Writeback_Shared_Data  0
+Writeback_All_Tokens  475
+Writeback_Owned  0
+Data_Shared  0
+Data_Owner  0
+Data_All_Tokens  0
+Ack  0
+Ack_All_Tokens  0
+Persistent_GETX  0
+Persistent_GETS  0
+Own_Lock_or_Unlock  0
+
+ - Transitions -
+NP  L1_GETS  386
+NP  L1_GETX  48
+NP  L1_INV  0 <-- 
+NP  Transient_GETX  0 <-- 
+NP  Transient_GETS  0 <-- 
+NP  Writeback_Tokens  27
+NP  Writeback_Shared_Data  0 <-- 
+NP  Writeback_All_Tokens  444
+NP  Writeback_Owned  0 <-- 
+NP  Data_Shared  0 <-- 
+NP  Data_Owner  0 <-- 
+NP  Data_All_Tokens  0 <-- 
+NP  Ack  0 <-- 
+NP  Persistent_GETX  0 <-- 
+NP  Persistent_GETS  0 <-- 
+NP  Own_Lock_or_Unlock  0 <-- 
+
+I  L1_GETS  0 <-- 
+I  L1_GETS_Last_Token  7
+I  L1_GETX  1
+I  L1_INV  0 <-- 
+I  Transient_GETX  0 <-- 
+I  Transient_GETS  0 <-- 
+I  Transient_GETS_Last_Token  0 <-- 
+I  L2_Replacement  34
+I  Writeback_Tokens  0 <-- 
+I  Writeback_Shared_Data  0 <-- 
+I  Writeback_All_Tokens  8
+I  Writeback_Owned  0 <-- 
+I  Data_Shared  0 <-- 
+I  Data_Owner  0 <-- 
+I  Data_All_Tokens  0 <-- 
+I  Ack  0 <-- 
+I  Persistent_GETX  0 <-- 
+I  Persistent_GETS  0 <-- 
+I  Own_Lock_or_Unlock  0 <-- 
+
+S  L1_GETS  0 <-- 
+S  L1_GETS_Last_Token  0 <-- 
+S  L1_GETX  0 <-- 
+S  L1_INV  0 <-- 
+S  Transient_GETX  0 <-- 
+S  Transient_GETS  0 <-- 
+S  Transient_GETS_Last_Token  0 <-- 
+S  L2_Replacement  0 <-- 
+S  Writeback_Tokens  0 <-- 
+S  Writeback_Shared_Data  0 <-- 
+S  Writeback_All_Tokens  0 <-- 
+S  Writeback_Owned  0 <-- 
+S  Data_Shared  0 <-- 
+S  Data_Owner  0 <-- 
+S  Data_All_Tokens  0 <-- 
+S  Ack  0 <-- 
+S  Persistent_GETX  0 <-- 
+S  Persistent_GETS  0 <-- 
+S  Own_Lock_or_Unlock  0 <-- 
+
+O  L1_GETS  0 <-- 
+O  L1_GETS_Last_Token  0 <-- 
+O  L1_GETX  5
+O  L1_INV  0 <-- 
+O  Transient_GETX  0 <-- 
+O  Transient_GETS  0 <-- 
+O  Transient_GETS_Last_Token  0 <-- 
+O  L2_Replacement  31
+O  Writeback_Tokens  0 <-- 
+O  Writeback_Shared_Data  0 <-- 
+O  Writeback_All_Tokens  23
+O  Data_Shared  0 <-- 
+O  Data_All_Tokens  0 <-- 
+O  Ack  0 <-- 
+O  Ack_All_Tokens  0 <-- 
+O  Persistent_GETX  0 <-- 
+O  Persistent_GETS  0 <-- 
+O  Own_Lock_or_Unlock  0 <-- 
+
+M  L1_GETS  59
+M  L1_GETX  12
+M  L1_INV  0 <-- 
+M  Transient_GETX  0 <-- 
+M  Transient_GETS  0 <-- 
+M  L2_Replacement  398
+M  Persistent_GETX  0 <-- 
+M  Persistent_GETS  0 <-- 
+M  Own_Lock_or_Unlock  0 <-- 
+
+I_L  L1_GETS  0 <-- 
+I_L  L1_GETX  0 <-- 
+I_L  L1_INV  0 <-- 
+I_L  Transient_GETX  0 <-- 
+I_L  Transient_GETS  0 <-- 
+I_L  Transient_GETS_Last_Token  0 <-- 
+I_L  L2_Replacement  0 <-- 
+I_L  Writeback_Tokens  0 <-- 
+I_L  Writeback_Shared_Data  0 <-- 
+I_L  Writeback_All_Tokens  0 <-- 
+I_L  Writeback_Owned  0 <-- 
+I_L  Data_Shared  0 <-- 
+I_L  Data_Owner  0 <-- 
+I_L  Data_All_Tokens  0 <-- 
+I_L  Ack  0 <-- 
+I_L  Persistent_GETX  0 <-- 
+I_L  Persistent_GETS  0 <-- 
+I_L  Own_Lock_or_Unlock  0 <-- 
+
+S_L  L1_GETS  0 <-- 
+S_L  L1_GETS_Last_Token  0 <-- 
+S_L  L1_GETX  0 <-- 
+S_L  L1_INV  0 <-- 
+S_L  Transient_GETX  0 <-- 
+S_L  Transient_GETS  0 <-- 
+S_L  Transient_GETS_Last_Token  0 <-- 
+S_L  L2_Replacement  0 <-- 
+S_L  Writeback_Tokens  0 <-- 
+S_L  Writeback_Shared_Data  0 <-- 
+S_L  Writeback_All_Tokens  0 <-- 
+S_L  Writeback_Owned  0 <-- 
+S_L  Data_Shared  0 <-- 
+S_L  Data_Owner  0 <-- 
+S_L  Data_All_Tokens  0 <-- 
+S_L  Ack  0 <-- 
+S_L  Persistent_GETX  0 <-- 
+S_L  Persistent_GETS  0 <-- 
+S_L  Own_Lock_or_Unlock  0 <-- 
+
+Memory controller: system.ruby.network.topology.ext_links2.ext_node.memBuffer:
+  memory_total_requests: 523
+  memory_reads: 442
+  memory_writes: 81
+  memory_refreshes: 189
+  memory_total_request_delays: 199
+  memory_delays_per_request: 0.380497
+  memory_delays_in_input_queue: 67
+  memory_delays_behind_head_of_bank_queue: 0
+  memory_delays_stalled_at_head_of_bank_queue: 132
+  memory_stalls_for_bank_busy: 41
+  memory_stalls_for_random_busy: 0
+  memory_stalls_for_anti_starvation: 0
+  memory_stalls_for_arbitration: 7
+  memory_stalls_for_bus: 80
+  memory_stalls_for_tfaw: 0
+  memory_stalls_for_read_write_turnaround: 4
+  memory_stalls_for_read_read_turnaround: 0
+  accesses_per_bank: 19  10  0  41  20  19  31  22  5  3  6  4  21  40  20  3  4  6  7  14  10  16  14  41  16  5  5  12  12  18  14  65  
+
+ --- Directory 0 ---
+ - Event Counts -
+GETX  63
+GETS  409
+Lockdown  0
+Unlockdown  0
+Own_Lock_or_Unlock  0
+Data_Owner  6
+Data_All_Tokens  75
+Ack_Owner  25
+Ack_Owner_All_Tokens  323
+Tokens  0
+Ack_All_Tokens  18
+Request_Timeout  0
+Memory_Data  442
+Memory_Ack  81
+DMA_READ  0
+DMA_WRITE  0
+DMA_WRITE_All_Tokens  0
+
+ - Transitions -
+O  GETX  49
+O  GETS  393
+O  Lockdown  0 <-- 
+O  Own_Lock_or_Unlock  0 <-- 
+O  Data_Owner  0 <-- 
+O  Data_All_Tokens  0 <-- 
+O  Tokens  0 <-- 
+O  Ack_All_Tokens  18
+O  DMA_READ  0 <-- 
+O  DMA_WRITE  0 <-- 
+O  DMA_WRITE_All_Tokens  0 <-- 
+
+NO  GETX  5
+NO  GETS  0 <-- 
+NO  Lockdown  0 <-- 
+NO  Own_Lock_or_Unlock  0 <-- 
+NO  Data_Owner  6
+NO  Data_All_Tokens  75
+NO  Ack_Owner  25
+NO  Ack_Owner_All_Tokens  323
+NO  Tokens  0 <-- 
+NO  DMA_READ  0 <-- 
+NO  DMA_WRITE  0 <-- 
+
+L  GETX  0 <-- 
+L  GETS  0 <-- 
+L  Lockdown  0 <-- 
+L  Unlockdown  0 <-- 
+L  Own_Lock_or_Unlock  0 <-- 
+L  Data_Owner  0 <-- 
+L  Data_All_Tokens  0 <-- 
+L  Ack_Owner  0 <-- 
+L  Ack_Owner_All_Tokens  0 <-- 
+L  Tokens  0 <-- 
+L  DMA_READ  0 <-- 
+L  DMA_WRITE  0 <-- 
+
+O_W  GETX  9
+O_W  GETS  16
+O_W  Lockdown  0 <-- 
+O_W  Unlockdown  0 <-- 
+O_W  Own_Lock_or_Unlock  0 <-- 
+O_W  Data_Owner  0 <-- 
+O_W  Ack_Owner  0 <-- 
+O_W  Tokens  0 <-- 
+O_W  Ack_All_Tokens  0 <-- 
+O_W  Memory_Data  0 <-- 
+O_W  Memory_Ack  81
+O_W  DMA_READ  0 <-- 
+O_W  DMA_WRITE  0 <-- 
+
+L_O_W  GETX  0 <-- 
+L_O_W  GETS  0 <-- 
+L_O_W  Lockdown  0 <-- 
+L_O_W  Unlockdown  0 <-- 
+L_O_W  Own_Lock_or_Unlock  0 <-- 
+L_O_W  Data_Owner  0 <-- 
+L_O_W  Ack_Owner  0 <-- 
+L_O_W  Tokens  0 <-- 
+L_O_W  Ack_All_Tokens  0 <-- 
+L_O_W  Memory_Data  0 <-- 
+L_O_W  Memory_Ack  0 <-- 
+L_O_W  DMA_READ  0 <-- 
+L_O_W  DMA_WRITE  0 <-- 
+
+L_NO_W  GETX  0 <-- 
+L_NO_W  GETS  0 <-- 
+L_NO_W  Lockdown  0 <-- 
+L_NO_W  Unlockdown  0 <-- 
+L_NO_W  Own_Lock_or_Unlock  0 <-- 
+L_NO_W  Data_Owner  0 <-- 
+L_NO_W  Ack_Owner  0 <-- 
+L_NO_W  Tokens  0 <-- 
+L_NO_W  Ack_All_Tokens  0 <-- 
+L_NO_W  Memory_Data  0 <-- 
+L_NO_W  DMA_READ  0 <-- 
+L_NO_W  DMA_WRITE  0 <-- 
+
+DR_L_W  GETX  0 <-- 
+DR_L_W  GETS  0 <-- 
+DR_L_W  Lockdown  0 <-- 
+DR_L_W  Unlockdown  0 <-- 
+DR_L_W  Own_Lock_or_Unlock  0 <-- 
+DR_L_W  Data_Owner  0 <-- 
+DR_L_W  Ack_Owner  0 <-- 
+DR_L_W  Tokens  0 <-- 
+DR_L_W  Ack_All_Tokens  0 <-- 
+DR_L_W  Request_Timeout  0 <-- 
+DR_L_W  Memory_Data  0 <-- 
+DR_L_W  DMA_READ  0 <-- 
+DR_L_W  DMA_WRITE  0 <-- 
+
+NO_W  GETX  0 <-- 
+NO_W  GETS  0 <-- 
+NO_W  Lockdown  0 <-- 
+NO_W  Unlockdown  0 <-- 
+NO_W  Own_Lock_or_Unlock  0 <-- 
+NO_W  Data_Owner  0 <-- 
+NO_W  Ack_Owner  0 <-- 
+NO_W  Tokens  0 <-- 
+NO_W  Ack_All_Tokens  0 <-- 
+NO_W  Memory_Data  442
+NO_W  DMA_READ  0 <-- 
+NO_W  DMA_WRITE  0 <-- 
+
+O_DW_W  GETX  0 <-- 
+O_DW_W  GETS  0 <-- 
+O_DW_W  Data_Owner  0 <-- 
+O_DW_W  Ack_Owner  0 <-- 
+O_DW_W  Tokens  0 <-- 
+O_DW_W  Ack_All_Tokens  0 <-- 
+O_DW_W  Memory_Ack  0 <-- 
+O_DW_W  DMA_READ  0 <-- 
+O_DW_W  DMA_WRITE  0 <-- 
+
+O_DR_W  GETX  0 <-- 
+O_DR_W  GETS  0 <-- 
+O_DR_W  Lockdown  0 <-- 
+O_DR_W  Unlockdown  0 <-- 
+O_DR_W  Own_Lock_or_Unlock  0 <-- 
+O_DR_W  Data_Owner  0 <-- 
+O_DR_W  Ack_Owner  0 <-- 
+O_DR_W  Tokens  0 <-- 
+O_DR_W  Ack_All_Tokens  0 <-- 
+O_DR_W  Memory_Data  0 <-- 
+O_DR_W  DMA_READ  0 <-- 
+O_DR_W  DMA_WRITE  0 <-- 
+
+O_DW  GETX  0 <-- 
+O_DW  GETS  0 <-- 
+O_DW  Lockdown  0 <-- 
+O_DW  Own_Lock_or_Unlock  0 <-- 
+O_DW  Data_Owner  0 <-- 
+O_DW  Data_All_Tokens  0 <-- 
+O_DW  Ack_Owner  0 <-- 
+O_DW  Ack_Owner_All_Tokens  0 <-- 
+O_DW  Tokens  0 <-- 
+O_DW  Ack_All_Tokens  0 <-- 
+O_DW  DMA_READ  0 <-- 
+O_DW  DMA_WRITE  0 <-- 
+
+NO_DW  GETX  0 <-- 
+NO_DW  GETS  0 <-- 
+NO_DW  Lockdown  0 <-- 
+NO_DW  Own_Lock_or_Unlock  0 <-- 
+NO_DW  Data_Owner  0 <-- 
+NO_DW  Data_All_Tokens  0 <-- 
+NO_DW  Tokens  0 <-- 
+NO_DW  Request_Timeout  0 <-- 
+NO_DW  DMA_READ  0 <-- 
+NO_DW  DMA_WRITE  0 <-- 
+
+NO_DR  GETX  0 <-- 
+NO_DR  GETS  0 <-- 
+NO_DR  Lockdown  0 <-- 
+NO_DR  Own_Lock_or_Unlock  0 <-- 
+NO_DR  Data_Owner  0 <-- 
+NO_DR  Data_All_Tokens  0 <-- 
+NO_DR  Tokens  0 <-- 
+NO_DR  Request_Timeout  0 <-- 
+NO_DR  DMA_READ  0 <-- 
+NO_DR  DMA_WRITE  0 <-- 
+
+DW_L  GETX  0 <-- 
+DW_L  GETS  0 <-- 
+DW_L  Lockdown  0 <-- 
+DW_L  Unlockdown  0 <-- 
+DW_L  Own_Lock_or_Unlock  0 <-- 
+DW_L  Data_Owner  0 <-- 
+DW_L  Data_All_Tokens  0 <-- 
+DW_L  Ack_Owner  0 <-- 
+DW_L  Ack_Owner_All_Tokens  0 <-- 
+DW_L  Tokens  0 <-- 
+DW_L  Request_Timeout  0 <-- 
+DW_L  DMA_READ  0 <-- 
+DW_L  DMA_WRITE  0 <-- 
+
+DR_L  GETX  0 <-- 
+DR_L  GETS  0 <-- 
+DR_L  Lockdown  0 <-- 
+DR_L  Unlockdown  0 <-- 
+DR_L  Own_Lock_or_Unlock  0 <-- 
+DR_L  Data_Owner  0 <-- 
+DR_L  Data_All_Tokens  0 <-- 
+DR_L  Ack_Owner  0 <-- 
+DR_L  Ack_Owner_All_Tokens  0 <-- 
+DR_L  Tokens  0 <-- 
+DR_L  Request_Timeout  0 <-- 
+DR_L  DMA_READ  0 <-- 
+DR_L  DMA_WRITE  0 <-- 
+
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr
new file mode 100755
index 000000000..67f69f09d
--- /dev/null
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr
@@ -0,0 +1,5 @@
+warn: Sockets disabled, not accepting gdb connections
+For more information see: http://www.m5sim.org/warn/d946bea6
+warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+For more information see: http://www.m5sim.org/warn/5c5b547f
+hack: be nice to actually delete the event here
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout
new file mode 100755
index 000000000..5cc182def
--- /dev/null
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout
@@ -0,0 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jan 28 2010 15:54:34
+M5 revision 6068d4fc30d3+ 6931+ default qtip tip brad/rubycfg_regress_udpate
+M5 started Jan 28 2010 15:55:46
+M5 executing on svvint04
+command line: build/ALPHA_SE_MOESI_CMP_token/m5.fast -d build/ALPHA_SE_MOESI_CMP_token/tests/fast/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_SE_MOESI_CMP_token/tests/fast/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token
+Global frequency set at 1000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
+info: Increasing stack size by one page.
+Hello world!
+Exiting @ tick 90308 because target called exit()
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt
new file mode 100644
index 000000000..d8ff49b26
--- /dev/null
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt
@@ -0,0 +1,50 @@
+
+---------- Begin Simulation Statistics ----------
+host_inst_rate                                  18406                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 214900                       # Number of bytes of host memory used
+host_seconds                                     0.15                       # Real time elapsed on the host
+host_tick_rate                                 602029                       # Simulator tick rate (ticks/s)
+sim_freq                                   1000000000                       # Frequency of simulated ticks
+sim_insts                                        2577                       # Number of instructions simulated
+sim_seconds                                  0.000090                       # Number of seconds simulated
+sim_ticks                                       90308                       # Number of ticks simulated
+system.cpu.dtb.data_accesses                      717                       # DTB accesses
+system.cpu.dtb.data_acv                             0                       # DTB access violations
+system.cpu.dtb.data_hits                          709                       # DTB hits
+system.cpu.dtb.data_misses                          8                       # DTB misses
+system.cpu.dtb.fetch_accesses                       0                       # ITB accesses
+system.cpu.dtb.fetch_acv                            0                       # ITB acv
+system.cpu.dtb.fetch_hits                           0                       # ITB hits
+system.cpu.dtb.fetch_misses                         0                       # ITB misses
+system.cpu.dtb.read_accesses                      419                       # DTB read accesses
+system.cpu.dtb.read_acv                             0                       # DTB read access violations
+system.cpu.dtb.read_hits                          415                       # DTB read hits
+system.cpu.dtb.read_misses                          4                       # DTB read misses
+system.cpu.dtb.write_accesses                     298                       # DTB write accesses
+system.cpu.dtb.write_acv                            0                       # DTB write access violations
+system.cpu.dtb.write_hits                         294                       # DTB write hits
+system.cpu.dtb.write_misses                         4                       # DTB write misses
+system.cpu.idle_fraction                            0                       # Percentage of idle cycles
+system.cpu.itb.data_accesses                        0                       # DTB accesses
+system.cpu.itb.data_acv                             0                       # DTB access violations
+system.cpu.itb.data_hits                            0                       # DTB hits
+system.cpu.itb.data_misses                          0                       # DTB misses
+system.cpu.itb.fetch_accesses                    2597                       # ITB accesses
+system.cpu.itb.fetch_acv                            0                       # ITB acv
+system.cpu.itb.fetch_hits                        2586                       # ITB hits
+system.cpu.itb.fetch_misses                        11                       # ITB misses
+system.cpu.itb.read_accesses                        0                       # DTB read accesses
+system.cpu.itb.read_acv                             0                       # DTB read access violations
+system.cpu.itb.read_hits                            0                       # DTB read hits
+system.cpu.itb.read_misses                          0                       # DTB read misses
+system.cpu.itb.write_accesses                       0                       # DTB write accesses
+system.cpu.itb.write_acv                            0                       # DTB write access violations
+system.cpu.itb.write_hits                           0                       # DTB write hits
+system.cpu.itb.write_misses                         0                       # DTB write misses
+system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
+system.cpu.numCycles                            90308                       # number of cpu cycles simulated
+system.cpu.num_insts                             2577                       # Number of instructions executed
+system.cpu.num_refs                               717                       # Number of memory references
+system.cpu.workload.PROG:num_syscalls               4                       # Number of system calls
+
+---------- End Simulation Statistics   ----------