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| author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-06 11:11:50 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-06 11:11:50 -0500 |
| commit | 92714e529f37a76e94d6e2201477fa9ed2410d1c (patch) | |
| tree | e5e04d5a88871483bbb0f19e84e6248afbb2c179 /tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini | |
| parent | be679b8e5e67389095531e78d72306b9ec6d64aa (diff) | |
| parent | ddd179a4189d6f51f7be81567e1119aa67533dae (diff) | |
| download | gem5-92714e529f37a76e94d6e2201477fa9ed2410d1c.tar.xz | |
Automated merge with ssh://daystrom.m5sim.org//repo/m5
Diffstat (limited to 'tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini')
| -rw-r--r-- | tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini index bfcd95204..6a2eadca9 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini @@ -40,7 +40,6 @@ block_size=64 cpu_side_filter_ranges= hash_delay=1 latency=1000 -lifo=false max_miss_count=0 mem_side_filter_ranges= mshrs=10 @@ -58,8 +57,6 @@ prefetcher_size=100 prioritizeRequests=false repl=Null size=262144 -split=false -split_size=0 subblock_size=0 tgts_per_mshr=5 trace_addr=0 @@ -80,7 +77,6 @@ block_size=64 cpu_side_filter_ranges= hash_delay=1 latency=1000 -lifo=false max_miss_count=0 mem_side_filter_ranges= mshrs=10 @@ -98,8 +94,6 @@ prefetcher_size=100 prioritizeRequests=false repl=Null size=131072 -split=false -split_size=0 subblock_size=0 tgts_per_mshr=5 trace_addr=0 @@ -120,7 +114,6 @@ block_size=64 cpu_side_filter_ranges= hash_delay=1 latency=10000 -lifo=false max_miss_count=0 mem_side_filter_ranges= mshrs=10 @@ -138,8 +131,6 @@ prefetcher_size=100 prioritizeRequests=false repl=Null size=2097152 -split=false -split_size=0 subblock_size=0 tgts_per_mshr=5 trace_addr=0 |