diff options
author | Brad Beckmann <Brad.Beckmann@amd.com> | 2011-02-06 22:14:23 -0800 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2011-02-06 22:14:23 -0800 |
commit | 45f881919fc9c4d2b2d4ea9f165fb567aad9849a (patch) | |
tree | 2a6ebbec93e62ef5279ec35e27e06f86577372fd /tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout | |
parent | f5aa75fdc528aca122ac1369fa4ac3df8a915027 (diff) | |
download | gem5-45f881919fc9c4d2b2d4ea9f165fb567aad9849a.tar.xz |
regress: Regression Tester output updates
Diffstat (limited to 'tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout')
-rwxr-xr-x | tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout index 6dd6e994b..c6d73c335 100755 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout @@ -1,5 +1,3 @@ -Redirecting stdout to build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing/simout -Redirecting stderr to build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing/simerr M5 Simulator System Copyright (c) 2001-2008 @@ -7,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Aug 26 2010 11:51:59 -M5 revision 85cafc6ccb42 7662 default qtip tip sc-fail-fix -M5 started Aug 26 2010 11:52:05 -M5 executing on zizzer -command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing +M5 compiled Feb 6 2011 20:42:22 +M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates +M5 started Feb 6 2011 20:43:01 +M5 executing on SC2B0617 +command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. |