diff options
author | Nathan Binkert <nate@binkert.org> | 2008-07-22 17:00:18 -0400 |
---|---|---|
committer | Nathan Binkert <nate@binkert.org> | 2008-07-22 17:00:18 -0400 |
commit | a8df952dd38cb686c6a795480630649aa51fd894 (patch) | |
tree | 380126490f459a4bef6a485cbda2b8efa4ae085e /tests/quick/00.hello/ref/alpha/tru64 | |
parent | aa2bb4f7b9ec571a4430da25173fbb76d1b0c8bb (diff) | |
download | gem5-a8df952dd38cb686c6a795480630649aa51fd894.tar.xz |
tests: update config.ini and stdout for the various tests.
These files were a bit too out of date and resulted in a bit of confusion.
Diffstat (limited to 'tests/quick/00.hello/ref/alpha/tru64')
6 files changed, 31 insertions, 13 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini index 26f63e7be..2971dacfa 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini @@ -376,6 +376,7 @@ max_stack_size=67108864 output=cout pid=100 ppid=99 +simpoint=0 system=system uid=100 @@ -393,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side type=PhysicalMemory file= latency=1 +latency_var=0 +null=false range=0:134217727 zero=false port=system.membus.port[0] diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout index 95bc632c8..abedce50c 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout +++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout @@ -1,4 +1,3 @@ -Hello world! M5 Simulator System Copyright (c) 2001-2008 @@ -6,9 +5,12 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 27 2008 17:52:16 -M5 started Wed Feb 27 17:56:33 2008 +M5 compiled Jul 21 2008 20:12:56 +M5 started Mon Jul 21 20:12:59 2008 M5 executing on zizzer +M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881 +M5 commit date Tue Jul 15 14:38:51 2008 -0400 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/o3-timing tests/run.py quick/00.hello/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second +Hello world! Exiting @ tick 2700000 because target called exit() diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini index ac0ec32b8..74656d464 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini @@ -25,7 +25,8 @@ max_loads_all_threads=0 max_loads_any_thread=0 phase=0 progress_interval=0 -simulate_stalls=false +simulate_data_stalls=false +simulate_inst_stalls=false system=system tracer=system.cpu.tracer width=1 @@ -54,9 +55,11 @@ euid=100 executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +max_stack_size=67108864 output=cout pid=100 ppid=99 +simpoint=0 system=system uid=100 @@ -65,6 +68,7 @@ type=Bus block_size=64 bus_id=0 clock=1000 +header_cycles=1 responder_set=false width=64 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port @@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port type=PhysicalMemory file= latency=1 +latency_var=0 +null=false range=0:134217727 zero=false port=system.membus.port[0] diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout index d906bb79e..0f1a816dd 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout @@ -1,14 +1,16 @@ -Hello world! M5 Simulator System -Copyright (c) 2001-2006 +Copyright (c) 2001-2008 The Regents of The University of Michigan All Rights Reserved -M5 compiled Sep 27 2007 13:46:37 -M5 started Thu Sep 27 20:06:36 2007 -M5 executing on zeep +M5 compiled Jul 21 2008 20:12:56 +M5 started Mon Jul 21 20:13:07 2008 +M5 executing on zizzer +M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881 +M5 commit date Tue Jul 15 14:38:51 2008 -0400 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-atomic tests/run.py quick/00.hello/alpha/tru64/simple-atomic Global frequency set at 1000000000000 ticks per second +Hello world! Exiting @ tick 1297500 because target called exit() diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini index 4f7ec60f2..7d543f47c 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini @@ -174,6 +174,7 @@ max_stack_size=67108864 output=cout pid=100 ppid=99 +simpoint=0 system=system uid=100 @@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side type=PhysicalMemory file= latency=1 +latency_var=0 +null=false range=0:134217727 zero=false port=system.membus.port[0] diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout index c25792a5f..d1bbc80b8 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout +++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout @@ -1,4 +1,3 @@ -Hello world! M5 Simulator System Copyright (c) 2001-2008 @@ -6,9 +5,12 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 24 2008 12:58:20 -M5 started Sun Feb 24 12:58:25 2008 -M5 executing on tater +M5 compiled Jul 21 2008 20:12:56 +M5 started Mon Jul 21 20:24:22 2008 +M5 executing on zizzer +M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881 +M5 commit date Tue Jul 15 14:38:51 2008 -0400 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-timing tests/run.py quick/00.hello/alpha/tru64/simple-timing Global frequency set at 1000000000000 ticks per second +Hello world! Exiting @ tick 9950000 because target called exit() |