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authorAli Saidi <Ali.Saidi@ARM.com>2011-01-18 16:30:06 -0600
committerAli Saidi <Ali.Saidi@ARM.com>2011-01-18 16:30:06 -0600
commitf7885b8f260ca11c2f4a405525d9fc4e554f41a8 (patch)
tree7843d9030dd422473d7efd5a4e2a0fd787e2b7f8 /tests/quick/00.hello/ref/arm/linux/o3-timing/simout
parent9b67f3723e48efdd0a0b640ff82cfcf8aad3a659 (diff)
downloadgem5-f7885b8f260ca11c2f4a405525d9fc4e554f41a8.tar.xz
ARM/O3: Add regressions for ARM w/ O3 CPU.
Diffstat (limited to 'tests/quick/00.hello/ref/arm/linux/o3-timing/simout')
-rwxr-xr-xtests/quick/00.hello/ref/arm/linux/o3-timing/simout16
1 files changed, 16 insertions, 0 deletions
diff --git a/tests/quick/00.hello/ref/arm/linux/o3-timing/simout b/tests/quick/00.hello/ref/arm/linux/o3-timing/simout
new file mode 100755
index 000000000..898cae0a1
--- /dev/null
+++ b/tests/quick/00.hello/ref/arm/linux/o3-timing/simout
@@ -0,0 +1,16 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jan 11 2011 18:16:01
+M5 revision b39a8457b332 7816 default ext/o3_regressions.patch qtip tip
+M5 started Jan 12 2011 04:32:17
+M5 executing on u200439-lin.austin.arm.com
+command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/quick/00.hello/arm/linux/o3-timing -re tests/run.py build/ARM_SE/tests/fast/quick/00.hello/arm/linux/o3-timing
+Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0. Starting simulation...
+Hello world!
+Exiting @ tick 10317500 because target called exit()