diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
| commit | 0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch) | |
| tree | 96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt | |
| parent | 1b64bfa933745294667158d0ce22180780b2a22e (diff) | |
| download | gem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz | |
Stats: Re update stats.
Diffstat (limited to 'tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt')
| -rw-r--r-- | tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt b/tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt index 3c0d4e2a6..438991f53 100644 --- a/tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt +++ b/tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 315416 # Simulator instruction rate (inst/s) -host_mem_usage 248988 # Number of bytes of host memory used +host_inst_rate 265936 # Simulator instruction rate (inst/s) +host_mem_usage 233432 # Number of bytes of host memory used host_seconds 0.02 # Real time elapsed on the host -host_tick_rate 1472008046 # Simulator tick rate (ticks/s) +host_tick_rate 1242220035 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 5563 # Number of instructions simulated sim_seconds 0.000026 # Number of seconds simulated @@ -237,8 +237,24 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 0 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 52692 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 52692 # Number of busy cycles +system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses +system.cpu.num_fp_insts 16 # number of float instructions +system.cpu.num_fp_register_reads 16 # number of times the floating registers were read +system.cpu.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 5563 # Number of instructions executed -system.cpu.num_refs 2145 # Number of memory references +system.cpu.num_int_alu_accesses 4889 # Number of integer alu accesses +system.cpu.num_int_insts 4889 # number of integer instructions +system.cpu.num_int_register_reads 15212 # number of times the integer registers were read +system.cpu.num_int_register_writes 3689 # number of times the integer registers were written +system.cpu.num_load_insts 1207 # Number of load instructions +system.cpu.num_mem_refs 2145 # number of memory refs +system.cpu.num_store_insts 938 # Number of store instructions system.cpu.workload.PROG:num_syscalls 13 # Number of system calls ---------- End Simulation Statistics ---------- |