Merge with the main repo.

--HG--
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh

3 files changed, 21 insertions, 9 deletions

diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
index 383b176d8..36444e22d 100644
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
@@ -10,6 +10,7 @@ type=System
 children=cpu membus physmem
 mem_mode=atomic
 memories=system.physmem
+num_work_ids=16
 physmem=system.physmem
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
+system_port=system.membus.port[0]
 
 [system.cpu]
 type=TimingSimpleCPU
@@ -147,7 +149,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
 
 [system.cpu.toL2Bus]
 type=Bus
@@ -189,7 +191,7 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
 
 [system.physmem]
 type=PhysicalMemory
@@ -199,5 +201,5 @@ latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
 
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout
index 09aaf2152..7525d1ad5 100755
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout
@@ -1,8 +1,8 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 17 2011 12:31:33
-gem5 started Sep 17 2011 12:31:39
+gem5 compiled Jan 23 2012 03:56:13
+gem5 started Jan 23 2012 04:23:52
 gem5 executing on zizzer
 command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt
index 0e8242f31..566ce19a4 100644
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt
@@ -2,12 +2,22 @@
 ---------- Begin Simulation Statistics ----------
 sim_seconds                                  0.000032                       # Number of seconds simulated
 sim_ticks                                    32088000                       # Number of ticks simulated
+final_tick                                   32088000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                   1128                       # Simulator instruction rate (inst/s)
-host_tick_rate                                6214306                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 204312                       # Number of bytes of host memory used
-host_seconds                                     5.16                       # Real time elapsed on the host
+host_inst_rate                                 263412                       # Simulator instruction rate (inst/s)
+host_tick_rate                             1449372115                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 207940                       # Number of bytes of host memory used
+host_seconds                                     0.02                       # Real time elapsed on the host
 sim_insts                                        5827                       # Number of instructions simulated
+system.physmem.bytes_read                       28096                       # Number of bytes read from this memory
+system.physmem.bytes_inst_read                  19264                       # Number of instructions bytes read from this memory
+system.physmem.bytes_written                        0                       # Number of bytes written to this memory
+system.physmem.num_reads                          439                       # Number of read requests responded to by this memory
+system.physmem.num_writes                           0                       # Number of write requests responded to by this memory
+system.physmem.num_other                            0                       # Number of other requests responded to by this memory
+system.physmem.bw_read                      875592122                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read                 600349040                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_total                     875592122                       # Total bandwidth to/from this memory (bytes/s)
 system.cpu.dtb.read_hits                            0                       # DTB read hits
 system.cpu.dtb.read_misses                          0                       # DTB read misses
 system.cpu.dtb.read_accesses                        0                       # DTB read accesses