tests: update stats for name changes

3 files changed, 14 insertions, 66 deletions

diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
index 01d13de53..00709865b 100644
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
@@ -21,60 +21,6 @@ work_item_id=-1
 [system.cpu]
 type=TimingSimpleCPU
 children=dcache dtb icache itb l2cache toL2Bus tracer workload
-CP0_Config=0
-CP0_Config1=0
-CP0_Config1_C2=false
-CP0_Config1_CA=false
-CP0_Config1_DA=0
-CP0_Config1_DL=0
-CP0_Config1_DS=0
-CP0_Config1_EP=false
-CP0_Config1_FP=false
-CP0_Config1_IA=0
-CP0_Config1_IL=0
-CP0_Config1_IS=0
-CP0_Config1_M=0
-CP0_Config1_MD=false
-CP0_Config1_MMU=0
-CP0_Config1_PC=false
-CP0_Config1_WR=false
-CP0_Config2=0
-CP0_Config2_M=false
-CP0_Config2_SA=0
-CP0_Config2_SL=0
-CP0_Config2_SS=0
-CP0_Config2_SU=0
-CP0_Config2_TA=0
-CP0_Config2_TL=0
-CP0_Config2_TS=0
-CP0_Config2_TU=0
-CP0_Config3=0
-CP0_Config3_DSPP=false
-CP0_Config3_LPA=false
-CP0_Config3_M=false
-CP0_Config3_MT=false
-CP0_Config3_SM=false
-CP0_Config3_SP=false
-CP0_Config3_TL=false
-CP0_Config3_VEIC=false
-CP0_Config3_VInt=false
-CP0_Config_AR=0
-CP0_Config_AT=0
-CP0_Config_BE=0
-CP0_Config_MT=0
-CP0_Config_VI=0
-CP0_EBase_CPUNum=0
-CP0_IntCtl_IPPCI=0
-CP0_IntCtl_IPTI=0
-CP0_PRId=0
-CP0_PRId_CompanyID=0
-CP0_PRId_CompanyOptions=0
-CP0_PRId_ProcessorID=1
-CP0_PRId_Revision=0
-CP0_PerfCtr_M=false
-CP0_PerfCtr_W=false
-CP0_SrsCtl_HSS=0
-CP0_WatchHi_M=false
 checker=Null
 clock=500
 cpu_id=0
@@ -105,6 +51,7 @@ assoc=2
 block_size=64
 forward_snoops=true
 hash_delay=1
+is_top_level=true
 latency=1000
 max_miss_count=0
 mshrs=10
@@ -140,6 +87,7 @@ assoc=2
 block_size=64
 forward_snoops=true
 hash_delay=1
+is_top_level=true
 latency=1000
 max_miss_count=0
 mshrs=10
@@ -175,6 +123,7 @@ assoc=2
 block_size=64
 forward_snoops=true
 hash_delay=1
+is_top_level=false
 latency=10000
 max_miss_count=0
 mshrs=10
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout
index 4a897b2a2..3a1be45f5 100755
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout
@@ -5,10 +5,9 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb  7 2011 01:55:51
-M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
-M5 started Feb  7 2011 01:56:00
-M5 executing on burrito
+M5 compiled Apr 19 2011 12:18:54
+M5 started Apr 19 2011 12:18:57
+M5 executing on maize
 command line: build/MIPS_SE/m5.fast -d build/MIPS_SE/tests/fast/quick/00.hello/mips/linux/simple-timing -re tests/run.py build/MIPS_SE/tests/fast/quick/00.hello/mips/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt
index 27b53a7ab..ec5ae032f 100644
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 344481                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 223780                       # Number of bytes of host memory used
-host_seconds                                     0.02                       # Real time elapsed on the host
-host_tick_rate                             1868884758                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 524923                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 203516                       # Number of bytes of host memory used
+host_seconds                                     0.01                       # Real time elapsed on the host
+host_tick_rate                             2843944401                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                        5827                       # Number of instructions simulated
 sim_seconds                                  0.000032                       # Number of seconds simulated
@@ -50,8 +50,8 @@ system.cpu.dcache.demand_mshr_misses              138                       # nu
 system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
 system.cpu.dcache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.dcache.occ_%::0                   0.021352                       # Average percentage of cache occupancy
 system.cpu.dcache.occ_blocks::0             87.458397                       # Average occupied blocks per context
+system.cpu.dcache.occ_percent::0             0.021352                       # Average percentage of cache occupancy
 system.cpu.dcache.overall_accesses               2089                       # number of overall (read+write) accesses
 system.cpu.dcache.overall_avg_miss_latency        56000                       # average overall miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency        53000                       # average overall mshr miss latency
@@ -114,8 +114,8 @@ system.cpu.icache.demand_mshr_misses              303                       # nu
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.icache.occ_%::0                   0.064694                       # Average percentage of cache occupancy
 system.cpu.icache.occ_blocks::0            132.493866                       # Average occupied blocks per context
+system.cpu.icache.occ_percent::0             0.064694                       # Average percentage of cache occupancy
 system.cpu.icache.overall_accesses               5829                       # number of overall (read+write) accesses
 system.cpu.icache.overall_avg_miss_latency 55722.772277                       # average overall miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency 52722.772277                       # average overall mshr miss latency
@@ -188,8 +188,8 @@ system.cpu.l2cache.demand_mshr_misses             439                       # nu
 system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
 system.cpu.l2cache.mshr_cap_events                  0                       # number of times MSHR cap was activated
 system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
-system.cpu.l2cache.occ_%::0                  0.005739                       # Average percentage of cache occupancy
 system.cpu.l2cache.occ_blocks::0           188.045319                       # Average occupied blocks per context
+system.cpu.l2cache.occ_percent::0            0.005739                       # Average percentage of cache occupancy
 system.cpu.l2cache.overall_accesses               441                       # number of overall (read+write) accesses
 system.cpu.l2cache.overall_avg_miss_latency        52000                       # average overall miss latency
 system.cpu.l2cache.overall_avg_mshr_miss_latency        40000                       # average overall mshr miss latency
@@ -231,6 +231,6 @@ system.cpu.num_int_register_writes               3409                       # nu
 system.cpu.num_load_insts                        1164                       # Number of load instructions
 system.cpu.num_mem_refs                          2090                       # number of memory refs
 system.cpu.num_store_insts                        926                       # Number of store instructions
-system.cpu.workload.PROG:num_syscalls               8                       # Number of system calls
+system.cpu.workload.num_syscalls                    8                       # Number of system calls
 
 ---------- End Simulation Statistics   ----------