diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-28 07:24:01 -0800 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-28 07:24:01 -0800 |
commit | c3d41a2def15cdaf2ac3984315f452dacc6a0884 (patch) | |
tree | 5324ebec3add54b934a841eee901983ac3463a7f /tests/quick/00.hello/ref/mips/linux | |
parent | da2a4acc26ba264c3c4a12495776fd6a1c4fb133 (diff) | |
parent | 4acca8a0536d4445ed25b67edf571ae460446ab9 (diff) | |
download | gem5-c3d41a2def15cdaf2ac3984315f452dacc6a0884.tar.xz |
Merge with the main repo.
--HG--
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
Diffstat (limited to 'tests/quick/00.hello/ref/mips/linux')
15 files changed, 118 insertions, 49 deletions
diff --git a/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini index f9f4647e1..1ccb30b9c 100644 --- a/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini @@ -10,6 +10,7 @@ type=System children=cpu membus physmem mem_mode=atomic memories=system.physmem +num_work_ids=16 physmem=system.physmem work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 @@ -18,6 +19,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 +system_port=system.membus.port[0] [system.cpu] type=InOrderCPU @@ -182,7 +184,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.port[2] -mem_side=system.membus.port[1] +mem_side=system.membus.port[2] [system.cpu.toL2Bus] type=Bus @@ -224,7 +226,7 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.physmem.port[0] system.cpu.l2cache.mem_side +port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side [system.physmem] type=PhysicalMemory @@ -234,5 +236,5 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[0] +port=system.membus.port[1] diff --git a/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout b/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout index 86af758df..677598e87 100755 --- a/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout +++ b/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout @@ -1,8 +1,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 17 2011 12:31:33 -gem5 started Sep 17 2011 12:31:39 +gem5 compiled Jan 23 2012 03:56:13 +gem5 started Jan 23 2012 04:23:29 gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/inorder-timing -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/inorder-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt index 844338a8e..78172e7b6 100644 --- a/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt @@ -2,12 +2,22 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 0.000020 # Number of seconds simulated sim_ticks 19785000 # Number of ticks simulated +final_tick 19785000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1139 # Simulator instruction rate (inst/s) -host_tick_rate 3867528 # Simulator tick rate (ticks/s) -host_mem_usage 204696 # Number of bytes of host memory used -host_seconds 5.12 # Real time elapsed on the host +host_inst_rate 71616 # Simulator instruction rate (inst/s) +host_tick_rate 243111037 # Simulator tick rate (ticks/s) +host_mem_usage 208328 # Number of bytes of host memory used +host_seconds 0.08 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated +system.physmem.bytes_read 29120 # Number of bytes read from this memory +system.physmem.bytes_inst_read 20288 # Number of instructions bytes read from this memory +system.physmem.bytes_written 0 # Number of bytes written to this memory +system.physmem.num_reads 455 # Number of read requests responded to by this memory +system.physmem.num_writes 0 # Number of write requests responded to by this memory +system.physmem.num_other 0 # Number of other requests responded to by this memory +system.physmem.bw_read 1471822087 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 1025423300 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_total 1471822087 # Total bandwidth to/from this memory (bytes/s) system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses system.cpu.dtb.read_accesses 0 # DTB read accesses diff --git a/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini index 6a2ff3124..508c3cad4 100644 --- a/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini @@ -10,6 +10,7 @@ type=System children=cpu membus physmem mem_mode=atomic memories=system.physmem +num_work_ids=16 physmem=system.physmem work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 @@ -18,6 +19,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 +system_port=system.membus.port[0] [system.cpu] type=DerivO3CPU @@ -477,7 +479,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.port[2] -mem_side=system.membus.port[1] +mem_side=system.membus.port[2] [system.cpu.toL2Bus] type=Bus @@ -519,7 +521,7 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.physmem.port[0] system.cpu.l2cache.mem_side +port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side [system.physmem] type=PhysicalMemory @@ -529,5 +531,5 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[0] +port=system.membus.port[1] diff --git a/tests/quick/00.hello/ref/mips/linux/o3-timing/simout b/tests/quick/00.hello/ref/mips/linux/o3-timing/simout index 1b7f6128f..eb1e6f70f 100755 --- a/tests/quick/00.hello/ref/mips/linux/o3-timing/simout +++ b/tests/quick/00.hello/ref/mips/linux/o3-timing/simout @@ -1,8 +1,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 17 2011 12:31:33 -gem5 started Sep 17 2011 12:31:39 +gem5 compiled Jan 23 2012 03:56:13 +gem5 started Jan 23 2012 04:23:41 gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/o3-timing -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt index 3721e6673..e49d82dd9 100644 --- a/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt @@ -2,12 +2,22 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 0.000012 # Number of seconds simulated sim_ticks 12272500 # Number of ticks simulated +final_tick 12272500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1003 # Simulator instruction rate (inst/s) -host_tick_rate 2382032 # Simulator tick rate (ticks/s) -host_mem_usage 205244 # Number of bytes of host memory used -host_seconds 5.15 # Real time elapsed on the host +host_inst_rate 65845 # Simulator instruction rate (inst/s) +host_tick_rate 156294886 # Simulator tick rate (ticks/s) +host_mem_usage 208908 # Number of bytes of host memory used +host_seconds 0.08 # Real time elapsed on the host sim_insts 5169 # Number of instructions simulated +system.physmem.bytes_read 30400 # Number of bytes read from this memory +system.physmem.bytes_inst_read 21312 # Number of instructions bytes read from this memory +system.physmem.bytes_written 0 # Number of bytes written to this memory +system.physmem.num_reads 475 # Number of read requests responded to by this memory +system.physmem.num_writes 0 # Number of write requests responded to by this memory +system.physmem.num_other 0 # Number of other requests responded to by this memory +system.physmem.bw_read 2477082909 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 1736565492 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_total 2477082909 # Total bandwidth to/from this memory (bytes/s) system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses system.cpu.dtb.read_accesses 0 # DTB read accesses diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini index fda15903b..8bad8df13 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini @@ -10,6 +10,7 @@ type=System children=cpu membus physmem mem_mode=atomic memories=system.physmem +num_work_ids=16 physmem=system.physmem work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 @@ -18,6 +19,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 +system_port=system.membus.port[0] [system.cpu] type=AtomicSimpleCPU @@ -45,8 +47,8 @@ system=system tracer=system.cpu.tracer width=1 workload=system.cpu.workload -dcache_port=system.membus.port[2] -icache_port=system.membus.port[1] +dcache_port=system.membus.port[3] +icache_port=system.membus.port[2] [system.cpu.dtb] type=MipsTLB @@ -86,7 +88,7 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port +port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=PhysicalMemory @@ -96,5 +98,5 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[0] +port=system.membus.port[1] diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout b/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout index 9eba211ea..4b9270f18 100755 --- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout @@ -1,8 +1,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 17 2011 12:31:33 -gem5 started Sep 17 2011 12:31:39 +gem5 compiled Jan 23 2012 03:56:13 +gem5 started Jan 23 2012 04:23:47 gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-atomic -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-atomic Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt index 6bf960444..397c3f1f6 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt @@ -2,12 +2,23 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 0.000003 # Number of seconds simulated sim_ticks 2913500 # Number of ticks simulated +final_tick 2913500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1129 # Simulator instruction rate (inst/s) -host_tick_rate 564724 # Simulator tick rate (ticks/s) -host_mem_usage 195504 # Number of bytes of host memory used -host_seconds 5.16 # Real time elapsed on the host +host_inst_rate 231601 # Simulator instruction rate (inst/s) +host_tick_rate 115720913 # Simulator tick rate (ticks/s) +host_mem_usage 199128 # Number of bytes of host memory used +host_seconds 0.03 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated +system.physmem.bytes_read 27687 # Number of bytes read from this memory +system.physmem.bytes_inst_read 23312 # Number of instructions bytes read from this memory +system.physmem.bytes_written 3658 # Number of bytes written to this memory +system.physmem.num_reads 6992 # Number of read requests responded to by this memory +system.physmem.num_writes 925 # Number of write requests responded to by this memory +system.physmem.num_other 0 # Number of other requests responded to by this memory +system.physmem.bw_read 9503003261 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 8001372919 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write 1255534580 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total 10758537841 # Total bandwidth to/from this memory (bytes/s) system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses system.cpu.dtb.read_accesses 0 # DTB read accesses diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini index 41938cc87..e5b4b16c8 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini @@ -7,9 +7,10 @@ time_sync_spin_threshold=100000 [system] type=System -children=cpu dir_cntrl0 l1_cntrl0 physmem ruby +children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy mem_mode=timing memories=system.physmem +num_work_ids=16 physmem=system.physmem work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 @@ -18,6 +19,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 +system_port=system.sys_port_proxy.port[0] [system.cpu] type=TimingSimpleCPU @@ -136,6 +138,7 @@ version=0 [system.l1_cntrl0.cacheMemory] type=RubyCache assoc=2 +is_icache=false latency=3 replacement_policy=PSEUDO_LRU size=256 @@ -164,11 +167,11 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.l1_cntrl0.sequencer.physMemPort +port=system.l1_cntrl0.sequencer.physMemPort system.sys_port_proxy.physMemPort [system.ruby] type=RubySystem -children=network profiler tracer +children=network profiler block_size_bytes=64 clock=1 mem_size=134217728 @@ -252,8 +255,14 @@ hot_lines=false num_of_sequencers=1 ruby_system=system.ruby -[system.ruby.tracer] -type=RubyTracer +[system.sys_port_proxy] +type=RubyPortProxy +access_phys_mem=true +physmem=system.physmem ruby_system=system.ruby -warmup_length=100000 +using_network_tester=false +using_ruby_tester=false +version=0 +physMemPort=system.physmem.port[1] +port=system.system_port diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout index b0d2d6b62..f6eaf03f7 100755 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout @@ -1,8 +1,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 17 2011 12:31:33 -gem5 started Sep 17 2011 12:31:39 +gem5 compiled Jan 23 2012 03:56:13 +gem5 started Jan 23 2012 04:23:56 gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing-ruby -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt index fe1143095..65d0aed82 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt @@ -2,12 +2,23 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 0.000293 # Number of seconds simulated sim_ticks 292960 # Number of ticks simulated +final_tick 292960 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 1124 # Simulator instruction rate (inst/s) -host_tick_rate 56528 # Simulator tick rate (ticks/s) -host_mem_usage 213468 # Number of bytes of host memory used -host_seconds 5.18 # Real time elapsed on the host +host_inst_rate 55801 # Simulator instruction rate (inst/s) +host_tick_rate 2804966 # Simulator tick rate (ticks/s) +host_mem_usage 220172 # Number of bytes of host memory used +host_seconds 0.10 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated +system.physmem.bytes_read 27687 # Number of bytes read from this memory +system.physmem.bytes_inst_read 23312 # Number of instructions bytes read from this memory +system.physmem.bytes_written 3658 # Number of bytes written to this memory +system.physmem.num_reads 6992 # Number of read requests responded to by this memory +system.physmem.num_writes 925 # Number of write requests responded to by this memory +system.physmem.num_other 0 # Number of other requests responded to by this memory +system.physmem.bw_read 94507783 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 79574003 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write 12486346 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total 106994129 # Total bandwidth to/from this memory (bytes/s) system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses system.cpu.dtb.read_accesses 0 # DTB read accesses diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini index 383b176d8..36444e22d 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini @@ -10,6 +10,7 @@ type=System children=cpu membus physmem mem_mode=atomic memories=system.physmem +num_work_ids=16 physmem=system.physmem work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 @@ -18,6 +19,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 +system_port=system.membus.port[0] [system.cpu] type=TimingSimpleCPU @@ -147,7 +149,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.port[2] -mem_side=system.membus.port[1] +mem_side=system.membus.port[2] [system.cpu.toL2Bus] type=Bus @@ -189,7 +191,7 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.physmem.port[0] system.cpu.l2cache.mem_side +port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side [system.physmem] type=PhysicalMemory @@ -199,5 +201,5 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[0] +port=system.membus.port[1] diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout index 09aaf2152..7525d1ad5 100755 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout @@ -1,8 +1,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 17 2011 12:31:33 -gem5 started Sep 17 2011 12:31:39 +gem5 compiled Jan 23 2012 03:56:13 +gem5 started Jan 23 2012 04:23:52 gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt index 0e8242f31..566ce19a4 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt @@ -2,12 +2,22 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 0.000032 # Number of seconds simulated sim_ticks 32088000 # Number of ticks simulated +final_tick 32088000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1128 # Simulator instruction rate (inst/s) -host_tick_rate 6214306 # Simulator tick rate (ticks/s) -host_mem_usage 204312 # Number of bytes of host memory used -host_seconds 5.16 # Real time elapsed on the host +host_inst_rate 263412 # Simulator instruction rate (inst/s) +host_tick_rate 1449372115 # Simulator tick rate (ticks/s) +host_mem_usage 207940 # Number of bytes of host memory used +host_seconds 0.02 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated +system.physmem.bytes_read 28096 # Number of bytes read from this memory +system.physmem.bytes_inst_read 19264 # Number of instructions bytes read from this memory +system.physmem.bytes_written 0 # Number of bytes written to this memory +system.physmem.num_reads 439 # Number of read requests responded to by this memory +system.physmem.num_writes 0 # Number of write requests responded to by this memory +system.physmem.num_other 0 # Number of other requests responded to by this memory +system.physmem.bw_read 875592122 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 600349040 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_total 875592122 # Total bandwidth to/from this memory (bytes/s) system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses system.cpu.dtb.read_accesses 0 # DTB read accesses |