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authorBrad Beckmann <Brad.Beckmann@amd.com>2011-02-06 22:14:23 -0800
committerBrad Beckmann <Brad.Beckmann@amd.com>2011-02-06 22:14:23 -0800
commit45f881919fc9c4d2b2d4ea9f165fb567aad9849a (patch)
tree2a6ebbec93e62ef5279ec35e27e06f86577372fd /tests/quick/00.hello/ref/power/linux/simple-atomic
parentf5aa75fdc528aca122ac1369fa4ac3df8a915027 (diff)
downloadgem5-45f881919fc9c4d2b2d4ea9f165fb567aad9849a.tar.xz
regress: Regression Tester output updates
Diffstat (limited to 'tests/quick/00.hello/ref/power/linux/simple-atomic')
-rw-r--r--tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini11
-rwxr-xr-xtests/quick/00.hello/ref/power/linux/simple-atomic/simerr2
-rwxr-xr-xtests/quick/00.hello/ref/power/linux/simple-atomic/simout8
-rw-r--r--tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt26
4 files changed, 36 insertions, 11 deletions
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
index 1ef6f51da..a31e803fb 100644
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
@@ -1,13 +1,22 @@
[root]
type=Root
children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=AtomicSimpleCPU
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr b/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr
index a2a4d88c2..4337f6cf3 100755
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr
@@ -1,5 +1,5 @@
warn: Sockets disabled, not accepting gdb connections
For more information see: http://www.m5sim.org/warn/d946bea6
-warn: allowing mmap of file @ fd 13074680. This will break if not /dev/zero.
+warn: allowing mmap of file @ fd 16904568. This will break if not /dev/zero.
For more information see: http://www.m5sim.org/warn/3a2134f6
hack: be nice to actually delete the event here
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/simout b/tests/quick/00.hello/ref/power/linux/simple-atomic/simout
index 23b972156..2ef8d7aa3 100755
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/simout
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 24 2010 23:13:07
-M5 revision 1a33ca29ec29 6980 default share-aware-test-update.patch tip qtip
-M5 started Feb 24 2010 23:13:11
-M5 executing on SC2B0619
+M5 compiled Feb 6 2011 15:21:41
+M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates
+M5 started Feb 6 2011 20:46:45
+M5 executing on SC2B0617
command line: build/POWER_SE/m5.fast -d build/POWER_SE/tests/fast/quick/00.hello/power/linux/simple-atomic -re tests/run.py build/POWER_SE/tests/fast/quick/00.hello/power/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt b/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt
index 8c0754d0c..70fcd9801 100644
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 277162 # Simulator instruction rate (inst/s)
-host_mem_usage 181156 # Number of bytes of host memory used
-host_seconds 0.02 # Real time elapsed on the host
-host_tick_rate 136566988 # Simulator tick rate (ticks/s)
+host_inst_rate 1262734 # Simulator instruction rate (inst/s)
+host_mem_usage 195732 # Number of bytes of host memory used
+host_seconds 0.00 # Real time elapsed on the host
+host_tick_rate 600414079 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 5801 # Number of instructions simulated
sim_seconds 0.000003 # Number of seconds simulated
@@ -29,8 +29,24 @@ system.cpu.itb.write_hits 0 # DT
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 5801 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 5801 # Number of busy cycles
+system.cpu.num_conditional_control_insts 896 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 22 # Number of float alu accesses
+system.cpu.num_fp_insts 22 # number of float instructions
+system.cpu.num_fp_register_reads 20 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 2 # number of times the floating registers were written
+system.cpu.num_func_calls 200 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 5801 # Number of instructions executed
-system.cpu.num_refs 2008 # Number of memory references
+system.cpu.num_int_alu_accesses 5706 # Number of integer alu accesses
+system.cpu.num_int_insts 5706 # number of integer instructions
+system.cpu.num_int_register_reads 9541 # number of times the integer registers were read
+system.cpu.num_int_register_writes 5005 # number of times the integer registers were written
+system.cpu.num_load_insts 962 # Number of load instructions
+system.cpu.num_mem_refs 2008 # number of memory refs
+system.cpu.num_store_insts 1046 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 9 # Number of system calls
---------- End Simulation Statistics ----------