Stats: Re update stats.

8 files changed, 77 insertions, 22 deletions

diff --git a/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini b/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
index 3d11c96e4..195dd9e9c 100644
--- a/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
@@ -1,13 +1,22 @@
 [root]
 type=Root
 children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
 
 [system]
 type=System
 children=cpu membus physmem
 mem_mode=atomic
 physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
 
 [system.cpu]
 type=DerivO3CPU
diff --git a/tests/quick/00.hello/ref/power/linux/o3-timing/simerr b/tests/quick/00.hello/ref/power/linux/o3-timing/simerr
index 29a71f392..799831583 100755
--- a/tests/quick/00.hello/ref/power/linux/o3-timing/simerr
+++ b/tests/quick/00.hello/ref/power/linux/o3-timing/simerr
@@ -1,5 +1,5 @@
 warn: Sockets disabled, not accepting gdb connections
 For more information see: http://www.m5sim.org/warn/d946bea6
-warn: allowing mmap of file @ fd 16206088. This will break if not /dev/zero.
+warn: allowing mmap of file @ fd 42898616. This will break if not /dev/zero.
 For more information see: http://www.m5sim.org/warn/3a2134f6
 hack: be nice to actually delete the event here
diff --git a/tests/quick/00.hello/ref/power/linux/o3-timing/simout b/tests/quick/00.hello/ref/power/linux/o3-timing/simout
index 6bd581433..9ed661104 100755
--- a/tests/quick/00.hello/ref/power/linux/o3-timing/simout
+++ b/tests/quick/00.hello/ref/power/linux/o3-timing/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Jan 17 2011 17:18:01
-M5 revision f72d94f8c275 7839 default qtip tip outgoing.patch qbase
-M5 started Jan 17 2011 17:18:03
-M5 executing on zizzer
+M5 compiled Feb  7 2011 02:06:34
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb  7 2011 02:06:41
+M5 executing on burrito
 command line: build/POWER_SE/m5.fast -d build/POWER_SE/tests/fast/quick/00.hello/power/linux/o3-timing -re tests/run.py build/POWER_SE/tests/fast/quick/00.hello/power/linux/o3-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/00.hello/ref/power/linux/o3-timing/stats.txt
index 8b311d8d3..eed636458 100644
--- a/tests/quick/00.hello/ref/power/linux/o3-timing/stats.txt
+++ b/tests/quick/00.hello/ref/power/linux/o3-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                  12762                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 202140                       # Number of bytes of host memory used
-host_seconds                                     0.45                       # Real time elapsed on the host
-host_tick_rate                               25804848                       # Simulator tick rate (ticks/s)
+host_inst_rate                                  32835                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 222408                       # Number of bytes of host memory used
+host_seconds                                     0.18                       # Real time elapsed on the host
+host_tick_rate                               66311402                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                        5800                       # Number of instructions simulated
 sim_seconds                                  0.000012                       # Number of seconds simulated
@@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value            0
 system.cpu.commit.COM:committed_per_cycle::max_value            8                       # Number of insts commited each cycle
 system.cpu.commit.COM:committed_per_cycle::total        10473                       # Number of insts commited each cycle
 system.cpu.commit.COM:count                      5800                       # Number of instructions committed
+system.cpu.commit.COM:fp_insts                     22                       # Number of committed floating point instructions.
+system.cpu.commit.COM:function_calls              103                       # Number of function calls committed.
+system.cpu.commit.COM:int_insts                  5706                       # Number of committed integer instructions.
 system.cpu.commit.COM:loads                       962                       # Number of loads committed
 system.cpu.commit.COM:membars                       7                       # Number of memory barriers committed
 system.cpu.commit.COM:refs                       2008                       # Number of memory references committed
@@ -162,6 +165,8 @@ system.cpu.fetch.rateDist::overflows                0      0.00%    100.00% # Nu
 system.cpu.fetch.rateDist::min_value                0                       # Number of instructions fetched each cycle (Total)
 system.cpu.fetch.rateDist::max_value                8                       # Number of instructions fetched each cycle (Total)
 system.cpu.fetch.rateDist::total                11043                       # Number of instructions fetched each cycle (Total)
+system.cpu.fp_regfile_reads                        25                       # number of floating regfile reads
+system.cpu.fp_regfile_writes                        2                       # number of floating regfile writes
 system.cpu.icache.ReadReq_accesses               1490                       # number of ReadReq accesses(hits+misses)
 system.cpu.icache.ReadReq_avg_miss_latency 36422.279793                       # average ReadReq miss latency
 system.cpu.icache.ReadReq_avg_mshr_miss_latency 34777.108434                       # average ReadReq mshr miss latency
@@ -261,6 +266,8 @@ system.cpu.iew.lsq.thread.0.squashedStores          404                       #
 system.cpu.iew.memOrderViolationEvents             42                       # Number of memory order violations
 system.cpu.iew.predictedNotTakenIncorrect          201                       # Number of branches that were predicted not taken incorrectly
 system.cpu.iew.predictedTakenIncorrect             76                       # Number of branches that were predicted taken incorrectly
+system.cpu.int_regfile_reads                    12419                       # number of integer regfile reads
+system.cpu.int_regfile_writes                    6594                       # number of integer regfile writes
 system.cpu.ipc                               0.247156                       # IPC: Instructions Per Cycle
 system.cpu.ipc_total                         0.247156                       # IPC: Total IPC of All Threads
 system.cpu.iq.ISSUE:FU_type_0::No_OpClass            0      0.00%      0.00% # Type of FU issued
@@ -352,6 +359,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value            0
 system.cpu.iq.ISSUE:issued_per_cycle::max_value            8                       # Number of insts issued each cycle
 system.cpu.iq.ISSUE:issued_per_cycle::total        11043                       # Number of insts issued each cycle
 system.cpu.iq.ISSUE:rate                     0.344697                       # Inst issue rate
+system.cpu.iq.fp_alu_accesses                      31                       # Number of floating point alu accesses
+system.cpu.iq.fp_inst_queue_reads                  59                       # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_wakeup_accesses           27                       # Number of floating instruction queue wakeup accesses
+system.cpu.iq.fp_inst_queue_writes                 36                       # Number of floating instruction queue writes
+system.cpu.iq.int_alu_accesses                   8211                       # Number of integer alu accesses
+system.cpu.iq.int_inst_queue_reads              27329                       # Number of integer instruction queue reads
+system.cpu.iq.int_inst_queue_wakeup_accesses         7555                       # Number of integer instruction queue wakeup accesses
+system.cpu.iq.int_inst_queue_writes             12158                       # Number of integer instruction queue writes
 system.cpu.iq.iqInstsAdded                       9163                       # Number of instructions added to the IQ (excludes non-spec)
 system.cpu.iq.iqInstsIssued                      8089                       # Number of instructions issued
 system.cpu.iq.iqNonSpecInstsAdded                  22                       # Number of non-speculative instructions added to the IQ
@@ -437,6 +452,8 @@ system.cpu.memDep0.conflictingStores               29                       # Nu
 system.cpu.memDep0.insertedLoads                 1681                       # Number of loads inserted to the mem dependence unit.
 system.cpu.memDep0.insertedStores                1450                       # Number of stores inserted to the mem dependence unit.
 system.cpu.numCycles                            23467                       # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
+system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.rename.RENAME:BlockCycles              312                       # Number of cycles rename is blocking
 system.cpu.rename.RENAME:CommittedMaps           5007                       # Number of HB maps that are committed
 system.cpu.rename.RENAME:IQFullEvents               7                       # Number of times rename has blocked due to IQ full
@@ -449,10 +466,14 @@ system.cpu.rename.RENAME:RunCycles               1825                       # Nu
 system.cpu.rename.RENAME:SquashCycles             570                       # Number of cycles rename is squashing
 system.cpu.rename.RENAME:UnblockCycles            243                       # Number of cycles rename is unblocking
 system.cpu.rename.RENAME:UndoneMaps              3701                       # Number of HB maps that are undone due to squashing
+system.cpu.rename.RENAME:fp_rename_lookups           55                       # Number of floating rename lookups
+system.cpu.rename.RENAME:int_rename_lookups        16177                       # Number of integer rename lookups
 system.cpu.rename.RENAME:serializeStallCycles          337                       # count of cycles rename stalled for serializing inst
 system.cpu.rename.RENAME:serializingInsts           22                       # count of serializing insts renamed
 system.cpu.rename.RENAME:skidInsts                473                       # count of insts added to the skid buffer
 system.cpu.rename.RENAME:tempSerializingInsts           22                       # count of temporary serializing insts renamed
+system.cpu.rob.rob_reads                        19611                       # The number of ROB reads
+system.cpu.rob.rob_writes                       18950                       # The number of ROB writes
 system.cpu.timesIdled                             230                       # Number of times that the entire CPU went into an idle state and unscheduled itself
 system.cpu.workload.PROG:num_syscalls               9                       # Number of system calls
 
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
index 1ef6f51da..c4bee2b32 100644
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
@@ -1,13 +1,22 @@
 [root]
 type=Root
 children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
 
 [system]
 type=System
 children=cpu membus physmem
 mem_mode=atomic
 physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
 
 [system.cpu]
 type=AtomicSimpleCPU
@@ -58,7 +67,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/hello/bin/power/linux/hello
+executable=/dist/m5/regression/test-progs/hello/bin/power/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr b/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr
index a2a4d88c2..4e7b25b97 100755
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/simerr
@@ -1,5 +1,5 @@
 warn: Sockets disabled, not accepting gdb connections
 For more information see: http://www.m5sim.org/warn/d946bea6
-warn: allowing mmap of file @ fd 13074680. This will break if not /dev/zero.
+warn: allowing mmap of file @ fd 39589752. This will break if not /dev/zero.
 For more information see: http://www.m5sim.org/warn/3a2134f6
 hack: be nice to actually delete the event here
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/simout b/tests/quick/00.hello/ref/power/linux/simple-atomic/simout
index 23b972156..dea57bc4d 100755
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/simout
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2010 23:13:07
-M5 revision 1a33ca29ec29 6980 default share-aware-test-update.patch tip qtip
-M5 started Feb 24 2010 23:13:11
-M5 executing on SC2B0619
+M5 compiled Feb  7 2011 02:06:34
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb  7 2011 02:06:40
+M5 executing on burrito
 command line: build/POWER_SE/m5.fast -d build/POWER_SE/tests/fast/quick/00.hello/power/linux/simple-atomic -re tests/run.py build/POWER_SE/tests/fast/quick/00.hello/power/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt b/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt
index 8c0754d0c..1731c3473 100644
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 277162                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 181156                       # Number of bytes of host memory used
-host_seconds                                     0.02                       # Real time elapsed on the host
-host_tick_rate                              136566988                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 628022                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 214048                       # Number of bytes of host memory used
+host_seconds                                     0.01                       # Real time elapsed on the host
+host_tick_rate                              304927994                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                        5801                       # Number of instructions simulated
 sim_seconds                                  0.000003                       # Number of seconds simulated
@@ -29,8 +29,24 @@ system.cpu.itb.write_hits                           0                       # DT
 system.cpu.itb.write_misses                         0                       # DTB write misses
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.numCycles                             5801                       # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
+system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
+system.cpu.num_busy_cycles                       5801                       # Number of busy cycles
+system.cpu.num_conditional_control_insts          896                       # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses                     22                       # Number of float alu accesses
+system.cpu.num_fp_insts                            22                       # number of float instructions
+system.cpu.num_fp_register_reads                   20                       # number of times the floating registers were read
+system.cpu.num_fp_register_writes                   2                       # number of times the floating registers were written
+system.cpu.num_func_calls                         200                       # number of times a function call or return occured
+system.cpu.num_idle_cycles                          0                       # Number of idle cycles
 system.cpu.num_insts                             5801                       # Number of instructions executed
-system.cpu.num_refs                              2008                       # Number of memory references
+system.cpu.num_int_alu_accesses                  5706                       # Number of integer alu accesses
+system.cpu.num_int_insts                         5706                       # number of integer instructions
+system.cpu.num_int_register_reads                9541                       # number of times the integer registers were read
+system.cpu.num_int_register_writes               5005                       # number of times the integer registers were written
+system.cpu.num_load_insts                         962                       # Number of load instructions
+system.cpu.num_mem_refs                          2008                       # number of memory refs
+system.cpu.num_store_insts                       1046                       # Number of store instructions
 system.cpu.workload.PROG:num_syscalls               9                       # Number of system calls
 
 ---------- End Simulation Statistics   ----------