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authorNathan Binkert <nate@binkert.org>2009-04-08 22:21:30 -0700
committerNathan Binkert <nate@binkert.org>2009-04-08 22:21:30 -0700
commit374ba9bae359e68c1496f8db25c38a817af2da19 (patch)
tree48fe4ae90f77f19aa6005fa5ec2426e836299bc9 /tests/quick/00.hello/ref/sparc/linux/simple-timing
parente0de2c34433be76eac7798e58e1ae02f5bffb732 (diff)
downloadgem5-374ba9bae359e68c1496f8db25c38a817af2da19.tar.xz
tests: update tests for TLB unification
Diffstat (limited to 'tests/quick/00.hello/ref/sparc/linux/simple-timing')
-rw-r--r--tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini4
-rwxr-xr-xtests/quick/00.hello/ref/sparc/linux/simple-timing/simout10
-rw-r--r--tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt8
3 files changed, 11 insertions, 11 deletions
diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
index f68b9582f..2bb5be9ae 100644
--- a/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
@@ -68,7 +68,7 @@ cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
[system.cpu.dtb]
-type=SparcDTB
+type=SparcTLB
size=64
[system.cpu.icache]
@@ -104,7 +104,7 @@ cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
[system.cpu.itb]
-type=SparcITB
+type=SparcTLB
size=64
[system.cpu.l2cache]
diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-timing/simout b/tests/quick/00.hello/ref/sparc/linux/simple-timing/simout
index fcae28521..b434e54e7 100755
--- a/tests/quick/00.hello/ref/sparc/linux/simple-timing/simout
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 16 2009 00:17:12
-M5 revision d8c62c2eaaa6 5874 default qtip pf1 tip qbase
-M5 started Feb 16 2009 00:17:34
-M5 executing on zizzer
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/00.hello/sparc/linux/simple-timing -re tests/run.py quick/00.hello/sparc/linux/simple-timing
+M5 compiled Apr 8 2009 12:30:02
+M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
+M5 started Apr 8 2009 12:30:32
+M5 executing on maize
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/00.hello/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/quick/00.hello/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello World!Exiting @ tick 29031000 because target called exit()
diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt
index cf7518d98..011b7eb96 100644
--- a/tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 21374 # Simulator instruction rate (inst/s)
-host_mem_usage 201092 # Number of bytes of host memory used
-host_seconds 0.25 # Real time elapsed on the host
-host_tick_rate 116036277 # Simulator tick rate (ticks/s)
+host_inst_rate 18112 # Simulator instruction rate (inst/s)
+host_mem_usage 202936 # Number of bytes of host memory used
+host_seconds 0.30 # Real time elapsed on the host
+host_tick_rate 98375821 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 5340 # Number of instructions simulated
sim_seconds 0.000029 # Number of seconds simulated