tests: update stats for name changes

1 files changed, 164 insertions, 164 deletions

diff --git a/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt b/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt
index 738321b57..177a37ea2 100644
--- a/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt
+++ b/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                  85944                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 211192                       # Number of bytes of host memory used
-host_seconds                                     0.11                       # Real time elapsed on the host
-host_tick_rate                               99394076                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 147922                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 208856                       # Number of bytes of host memory used
+host_seconds                                     0.07                       # Real time elapsed on the host
+host_tick_rate                              171003814                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                        9809                       # Number of instructions simulated
 sim_seconds                                  0.000011                       # Number of seconds simulated
@@ -16,38 +16,38 @@ system.cpu.BPredUnit.condIncorrect                485                       # Nu
 system.cpu.BPredUnit.condPredicted               2758                       # Number of conditional branches predicted
 system.cpu.BPredUnit.lookups                     2758                       # Number of BP lookups
 system.cpu.BPredUnit.usedRAS                        0                       # Number of times the RAS was used to get a target.
-system.cpu.commit.COM:branches                   1214                       # Number of branches committed
-system.cpu.commit.COM:bw_lim_events               141                       # number cycles where commit BW limit reached
-system.cpu.commit.COM:bw_limited                    0                       # number of insts not committed due to BW limits
-system.cpu.commit.COM:committed_per_cycle::samples        11809                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::mean     0.830638                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::stdev     1.597584                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::underflows            0      0.00%      0.00% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::0         8189     69.35%     69.35% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::1         1225     10.37%     79.72% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::2          582      4.93%     84.65% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::3          958      8.11%     92.76% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::4          396      3.35%     96.11% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::5          132      1.12%     97.23% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::6          128      1.08%     98.31% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::7           58      0.49%     98.81% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::8          141      1.19%    100.00% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::overflows            0      0.00%    100.00% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::min_value            0                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::max_value            8                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::total        11809                       # Number of insts commited each cycle
-system.cpu.commit.COM:count                      9809                       # Number of instructions committed
-system.cpu.commit.COM:fp_insts                      0                       # Number of committed floating point instructions.
-system.cpu.commit.COM:function_calls                0                       # Number of function calls committed.
-system.cpu.commit.COM:int_insts                  9714                       # Number of committed integer instructions.
-system.cpu.commit.COM:loads                      1056                       # Number of loads committed
-system.cpu.commit.COM:membars                       0                       # Number of memory barriers committed
-system.cpu.commit.COM:refs                       1990                       # Number of memory references committed
-system.cpu.commit.COM:swp_count                     0                       # Number of s/w prefetches committed
 system.cpu.commit.branchMispredicts               485                       # The number of times a branch was mispredicted
+system.cpu.commit.branches                       1214                       # Number of branches committed
+system.cpu.commit.bw_lim_events                   141                       # number cycles where commit BW limit reached
+system.cpu.commit.bw_limited                        0                       # number of insts not committed due to BW limits
 system.cpu.commit.commitCommittedInsts           9809                       # The number of committed instructions
 system.cpu.commit.commitNonSpecStalls              13                       # The number of times commit has been forced to stall to communicate backwards
 system.cpu.commit.commitSquashedInsts            9222                       # The number of squashed insts skipped by commit
+system.cpu.commit.committed_per_cycle::samples        11809                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::mean     0.830638                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::stdev     1.597584                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::0         8189     69.35%     69.35% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::1         1225     10.37%     79.72% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::2          582      4.93%     84.65% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::3          958      8.11%     92.76% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::4          396      3.35%     96.11% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::5          132      1.12%     97.23% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::6          128      1.08%     98.31% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::7           58      0.49%     98.81% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::8          141      1.19%    100.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::min_value            0                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::max_value            8                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::total        11809                       # Number of insts commited each cycle
+system.cpu.commit.count                          9809                       # Number of instructions committed
+system.cpu.commit.fp_insts                          0                       # Number of committed floating point instructions.
+system.cpu.commit.function_calls                    0                       # Number of function calls committed.
+system.cpu.commit.int_insts                      9714                       # Number of committed integer instructions.
+system.cpu.commit.loads                          1056                       # Number of loads committed
+system.cpu.commit.membars                           0                       # Number of memory barriers committed
+system.cpu.commit.refs                           1990                       # Number of memory references committed
+system.cpu.commit.swp_count                         0                       # Number of s/w prefetches committed
 system.cpu.committedInsts                        9809                       # Number of Instructions Simulated
 system.cpu.committedInsts_total                  9809                       # Number of Instructions Simulated
 system.cpu.cpi                               2.318585                       # CPI: Cycles Per Instruction
@@ -96,8 +96,8 @@ system.cpu.dcache.demand_mshr_misses              144                       # nu
 system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
 system.cpu.dcache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.dcache.occ_%::0                   0.020965                       # Average percentage of cache occupancy
 system.cpu.dcache.occ_blocks::0             85.873455                       # Average occupied blocks per context
+system.cpu.dcache.occ_percent::0             0.020965                       # Average percentage of cache occupancy
 system.cpu.dcache.overall_accesses               2465                       # number of overall (read+write) accesses
 system.cpu.dcache.overall_avg_miss_latency 34196.009390                       # average overall miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency 35600.694444                       # average overall mshr miss latency
@@ -119,12 +119,12 @@ system.cpu.dcache.tagsinuse                 85.873455                       # Cy
 system.cpu.dcache.total_refs                     2039                       # Total number of references to valid blocks.
 system.cpu.dcache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
 system.cpu.dcache.writebacks                        0                       # number of writebacks
-system.cpu.decode.DECODE:BlockedCycles           1369                       # Number of cycles decode is blocked
-system.cpu.decode.DECODE:DecodedInsts           22088                       # Number of instructions handled by decode
-system.cpu.decode.DECODE:IdleCycles              7085                       # Number of cycles decode is idle
-system.cpu.decode.DECODE:RunCycles               3278                       # Number of cycles decode is running
-system.cpu.decode.DECODE:SquashCycles            1477                       # Number of cycles decode is squashing
-system.cpu.decode.DECODE:UnblockCycles             77                       # Number of cycles decode is unblocking
+system.cpu.decode.BlockedCycles                  1369                       # Number of cycles decode is blocked
+system.cpu.decode.DecodedInsts                  22088                       # Number of instructions handled by decode
+system.cpu.decode.IdleCycles                     7085                       # Number of cycles decode is idle
+system.cpu.decode.RunCycles                      3278                       # Number of cycles decode is running
+system.cpu.decode.SquashCycles                   1477                       # Number of cycles decode is squashing
+system.cpu.decode.UnblockCycles                    77                       # Number of cycles decode is unblocking
 system.cpu.fetch.Branches                        2758                       # Number of branches that fetch encountered
 system.cpu.fetch.CacheLines                      1703                       # Number of cache lines fetched
 system.cpu.fetch.Cycles                          3590                       # Number of cycles fetch has run and was not squashing or blocked
@@ -187,8 +187,8 @@ system.cpu.icache.demand_mshr_misses              295                       # nu
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.icache.occ_%::0                   0.070743                       # Average percentage of cache occupancy
 system.cpu.icache.occ_blocks::0            144.881554                       # Average occupied blocks per context
+system.cpu.icache.occ_percent::0             0.070743                       # Average percentage of cache occupancy
 system.cpu.icache.overall_accesses               1703                       # number of overall (read+write) accesses
 system.cpu.icache.overall_avg_miss_latency 36577.562327                       # average overall miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency        35100                       # average overall mshr miss latency
@@ -211,21 +211,13 @@ system.cpu.icache.total_refs                     1342                       # To
 system.cpu.icache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
 system.cpu.icache.writebacks                        0                       # number of writebacks
 system.cpu.idleCycles                            9457                       # Total number of cycles that the CPU has spent unscheduled due to idling
-system.cpu.iew.EXEC:branches                     1545                       # Number of branches executed
-system.cpu.iew.EXEC:nop                             0                       # number of nop insts executed
-system.cpu.iew.EXEC:rate                     0.675461                       # Inst execution rate
-system.cpu.iew.EXEC:refs                         2952                       # number of memory reference insts executed
-system.cpu.iew.EXEC:stores                       1295                       # Number of stores executed
-system.cpu.iew.EXEC:swp                             0                       # number of swp insts executed
-system.cpu.iew.WB:consumers                     14668                       # num instructions consuming a value
-system.cpu.iew.WB:count                         15056                       # cumulative count of insts written-back
-system.cpu.iew.WB:fanout                     0.677734                       # average fanout of values written-back
-system.cpu.iew.WB:penalized                         0                       # number of instrctions required to write to 'other' IQ
-system.cpu.iew.WB:penalized_rate                    0                       # fraction of instructions written-back that wrote to 'other' IQ
-system.cpu.iew.WB:producers                      9941                       # num instructions producing a value
-system.cpu.iew.WB:rate                       0.662006                       # insts written-back per cycle
-system.cpu.iew.WB:sent                          15179                       # cumulative count of insts sent to commit
 system.cpu.iew.branchMispredicts                  566                       # Number of branch mispredicts detected at execute
+system.cpu.iew.exec_branches                     1545                       # Number of branches executed
+system.cpu.iew.exec_nop                             0                       # number of nop insts executed
+system.cpu.iew.exec_rate                     0.675461                       # Inst execution rate
+system.cpu.iew.exec_refs                         2952                       # number of memory reference insts executed
+system.cpu.iew.exec_stores                       1295                       # Number of stores executed
+system.cpu.iew.exec_swp                             0                       # number of swp insts executed
 system.cpu.iew.iewBlockCycles                     187                       # Number of cycles IEW is blocking
 system.cpu.iew.iewDispLoadInsts                  2082                       # Number of dispatched load instructions
 system.cpu.iew.iewDispNonSpecInsts                 33                       # Number of dispatched non-speculative instructions
@@ -253,103 +245,93 @@ system.cpu.iew.lsq.thread.0.squashedStores          683                       #
 system.cpu.iew.memOrderViolationEvents             14                       # Number of memory order violations
 system.cpu.iew.predictedNotTakenIncorrect          497                       # Number of branches that were predicted not taken incorrectly
 system.cpu.iew.predictedTakenIncorrect             69                       # Number of branches that were predicted taken incorrectly
+system.cpu.iew.wb_consumers                     14668                       # num instructions consuming a value
+system.cpu.iew.wb_count                         15056                       # cumulative count of insts written-back
+system.cpu.iew.wb_fanout                     0.677734                       # average fanout of values written-back
+system.cpu.iew.wb_penalized                         0                       # number of instrctions required to write to 'other' IQ
+system.cpu.iew.wb_penalized_rate                    0                       # fraction of instructions written-back that wrote to 'other' IQ
+system.cpu.iew.wb_producers                      9941                       # num instructions producing a value
+system.cpu.iew.wb_rate                       0.662006                       # insts written-back per cycle
+system.cpu.iew.wb_sent                          15179                       # cumulative count of insts sent to commit
 system.cpu.int_regfile_reads                    22959                       # number of integer regfile reads
 system.cpu.int_regfile_writes                   13993                       # number of integer regfile writes
 system.cpu.ipc                               0.431298                       # IPC: Instructions Per Cycle
 system.cpu.ipc_total                         0.431298                       # IPC: Total IPC of All Threads
-system.cpu.iq.ISSUE:FU_type_0::No_OpClass            4      0.02%      0.02% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IntAlu           12893     80.31%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IntMult              0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IntDiv               0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatAdd             0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatCmp             0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatCvt             0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatMult            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatDiv             0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatSqrt            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdAdd              0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdAddAcc            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdAlu              0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdCmp              0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdCvt              0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdMisc             0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdMult             0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdMultAcc            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdShift            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdShiftAcc            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdSqrt             0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatAdd            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatAlu            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatCmp            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatCvt            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatDiv            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatMisc            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatMult            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatMultAcc            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatSqrt            0      0.00%     80.33% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::MemRead           1771     11.03%     91.36% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::MemWrite          1387      8.64%    100.00% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IprAccess            0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::InstPrefetch            0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::total            16055                       # Type of FU issued
-system.cpu.iq.ISSUE:fu_busy_cnt                   147                       # FU busy when requested
-system.cpu.iq.ISSUE:fu_busy_rate             0.009156                       # FU busy rate (busy events/executed inst)
-system.cpu.iq.ISSUE:fu_full::No_OpClass             0      0.00%      0.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IntAlu               101     68.71%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IntMult                0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IntDiv                 0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatAdd               0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatCmp               0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatCvt               0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatMult              0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatDiv               0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatSqrt              0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdAdd                0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdAddAcc             0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdAlu                0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdCmp                0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdCvt                0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdMisc               0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdMult               0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdMultAcc            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdShift              0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdShiftAcc            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdSqrt               0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatAdd            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatAlu            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatCmp            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatCvt            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatDiv            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatMisc            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatMult            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatMultAcc            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatSqrt            0      0.00%     68.71% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::MemRead               27     18.37%     87.07% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::MemWrite              19     12.93%    100.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IprAccess              0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::InstPrefetch            0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:issued_per_cycle::samples        13286                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::mean     1.208415                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::stdev     1.917020                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::underflows            0      0.00%      0.00% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::0          8201     61.73%     61.73% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::1          1290      9.71%     71.44% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::2           986      7.42%     78.86% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::3           726      5.46%     84.32% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::4           782      5.89%     90.21% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::5           580      4.37%     94.57% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::6           507      3.82%     98.39% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::7           167      1.26%     99.65% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::8            47      0.35%    100.00% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::overflows            0      0.00%    100.00% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::min_value            0                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::max_value            8                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::total        13286                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:rate                     0.705931                       # Inst issue rate
+system.cpu.iq.FU_type_0::No_OpClass                 4      0.02%      0.02% # Type of FU issued
+system.cpu.iq.FU_type_0::IntAlu                 12893     80.31%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::IntMult                    0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::IntDiv                     0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatAdd                   0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatMisc              0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     80.33% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead                 1771     11.03%     91.36% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite                1387      8.64%    100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::total                  16055                       # Type of FU issued
 system.cpu.iq.fp_alu_accesses                       5                       # Number of floating point alu accesses
 system.cpu.iq.fp_inst_queue_reads                   9                       # Number of floating instruction queue reads
 system.cpu.iq.fp_inst_queue_wakeup_accesses            4                       # Number of floating instruction queue wakeup accesses
 system.cpu.iq.fp_inst_queue_writes                  4                       # Number of floating instruction queue writes
+system.cpu.iq.fu_busy_cnt                         147                       # FU busy when requested
+system.cpu.iq.fu_busy_rate                   0.009156                       # FU busy rate (busy events/executed inst)
+system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntAlu                     101     68.71%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntMult                      0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntDiv                       0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatAdd                     0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCmp                     0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCvt                     0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMult                    0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatDiv                     0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatSqrt                    0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAdd                      0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAlu                      0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCmp                      0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCvt                      0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMisc                     0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMult                     0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShift                    0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdSqrt                     0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMult                0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%     68.71% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead                     27     18.37%     87.07% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite                    19     12.93%    100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00% # attempts to use FU when none available
 system.cpu.iq.int_alu_accesses                  16193                       # Number of integer alu accesses
 system.cpu.iq.int_inst_queue_reads              45588                       # Number of integer instruction queue reads
 system.cpu.iq.int_inst_queue_wakeup_accesses        15052                       # Number of integer instruction queue wakeup accesses
@@ -361,6 +343,24 @@ system.cpu.iq.iqSquashedInstsExamined            8610                       # Nu
 system.cpu.iq.iqSquashedInstsIssued                54                       # Number of squashed instructions issued
 system.cpu.iq.iqSquashedNonSpecRemoved             20                       # Number of squashed non-spec instructions that were removed
 system.cpu.iq.iqSquashedOperandsExamined        10851                       # Number of squashed operands that are examined and possibly removed from graph
+system.cpu.iq.issued_per_cycle::samples         13286                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::mean         1.208415                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::stdev        1.917020                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::0                8201     61.73%     61.73% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::1                1290      9.71%     71.44% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::2                 986      7.42%     78.86% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::3                 726      5.46%     84.32% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::4                 782      5.89%     90.21% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::5                 580      4.37%     94.57% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::6                 507      3.82%     98.39% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::7                 167      1.26%     99.65% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::8                  47      0.35%    100.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::min_value            0                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::max_value            8                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::total           13286                       # Number of insts issued each cycle
+system.cpu.iq.rate                           0.705931                       # Inst issue rate
 system.cpu.l2cache.ReadExReq_accesses              77                       # number of ReadExReq accesses(hits+misses)
 system.cpu.l2cache.ReadExReq_avg_miss_latency 34603.896104                       # average ReadExReq miss latency
 system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency 31396.103896                       # average ReadExReq mshr miss latency
@@ -402,8 +402,8 @@ system.cpu.l2cache.demand_mshr_misses             437                       # nu
 system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
 system.cpu.l2cache.mshr_cap_events                  0                       # number of times MSHR cap was activated
 system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
-system.cpu.l2cache.occ_%::0                  0.005438                       # Average percentage of cache occupancy
 system.cpu.l2cache.occ_blocks::0           178.188786                       # Average occupied blocks per context
+system.cpu.l2cache.occ_percent::0            0.005438                       # Average percentage of cache occupancy
 system.cpu.l2cache.overall_accesses               439                       # number of overall (read+write) accesses
 system.cpu.l2cache.overall_avg_miss_latency 34307.780320                       # average overall miss latency
 system.cpu.l2cache.overall_avg_mshr_miss_latency 31102.974828                       # average overall mshr miss latency
@@ -433,28 +433,28 @@ system.cpu.misc_regfile_reads                    6812                       # nu
 system.cpu.numCycles                            22743                       # number of cpu cycles simulated
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
-system.cpu.rename.RENAME:BlockCycles              565                       # Number of cycles rename is blocking
-system.cpu.rename.RENAME:CommittedMaps           9368                       # Number of HB maps that are committed
-system.cpu.rename.RENAME:IQFullEvents              52                       # Number of times rename has blocked due to IQ full
-system.cpu.rename.RENAME:IdleCycles              7327                       # Number of cycles rename is idle
-system.cpu.rename.RENAME:LSQFullEvents            248                       # Number of times rename has blocked due to LSQ full
-system.cpu.rename.RENAME:ROBFullEvents              3                       # Number of times rename has blocked due to ROB full
-system.cpu.rename.RENAME:RenameLookups          44292                       # Number of register rename lookups that rename has made
-system.cpu.rename.RENAME:RenamedInsts           21008                       # Number of instructions processed by rename
-system.cpu.rename.RENAME:RenamedOperands        19746                       # Number of destination operands rename has renamed
-system.cpu.rename.RENAME:RunCycles               3097                       # Number of cycles rename is running
-system.cpu.rename.RENAME:SquashCycles            1477                       # Number of cycles rename is squashing
-system.cpu.rename.RENAME:UnblockCycles            380                       # Number of cycles rename is unblocking
-system.cpu.rename.RENAME:UndoneMaps             10378                       # Number of HB maps that are undone due to squashing
-system.cpu.rename.RENAME:fp_rename_lookups           16                       # Number of floating rename lookups
-system.cpu.rename.RENAME:int_rename_lookups        44276                       # Number of integer rename lookups
-system.cpu.rename.RENAME:serializeStallCycles          440                       # count of cycles rename stalled for serializing inst
-system.cpu.rename.RENAME:serializingInsts           32                       # count of serializing insts renamed
-system.cpu.rename.RENAME:skidInsts               1483                       # count of insts added to the skid buffer
-system.cpu.rename.RENAME:tempSerializingInsts           31                       # count of temporary serializing insts renamed
+system.cpu.rename.BlockCycles                     565                       # Number of cycles rename is blocking
+system.cpu.rename.CommittedMaps                  9368                       # Number of HB maps that are committed
+system.cpu.rename.IQFullEvents                     52                       # Number of times rename has blocked due to IQ full
+system.cpu.rename.IdleCycles                     7327                       # Number of cycles rename is idle
+system.cpu.rename.LSQFullEvents                   248                       # Number of times rename has blocked due to LSQ full
+system.cpu.rename.ROBFullEvents                     3                       # Number of times rename has blocked due to ROB full
+system.cpu.rename.RenameLookups                 44292                       # Number of register rename lookups that rename has made
+system.cpu.rename.RenamedInsts                  21008                       # Number of instructions processed by rename
+system.cpu.rename.RenamedOperands               19746                       # Number of destination operands rename has renamed
+system.cpu.rename.RunCycles                      3097                       # Number of cycles rename is running
+system.cpu.rename.SquashCycles                   1477                       # Number of cycles rename is squashing
+system.cpu.rename.UnblockCycles                   380                       # Number of cycles rename is unblocking
+system.cpu.rename.UndoneMaps                    10378                       # Number of HB maps that are undone due to squashing
+system.cpu.rename.fp_rename_lookups                16                       # Number of floating rename lookups
+system.cpu.rename.int_rename_lookups            44276                       # Number of integer rename lookups
+system.cpu.rename.serializeStallCycles            440                       # count of cycles rename stalled for serializing inst
+system.cpu.rename.serializingInsts                 32                       # count of serializing insts renamed
+system.cpu.rename.skidInsts                      1483                       # count of insts added to the skid buffer
+system.cpu.rename.tempSerializingInsts             31                       # count of temporary serializing insts renamed
 system.cpu.rob.rob_reads                        30699                       # The number of ROB reads
 system.cpu.rob.rob_writes                       39564                       # The number of ROB writes
 system.cpu.timesIdled                             184                       # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu.workload.PROG:num_syscalls              11                       # Number of system calls
+system.cpu.workload.num_syscalls                   11                       # Number of system calls
 
 ---------- End Simulation Statistics   ----------