summaryrefslogtreecommitdiff
path: root/tests/quick/00.hello/ref/x86/linux/simple-atomic
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2012-01-28 07:24:01 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-28 07:24:01 -0800
commitc3d41a2def15cdaf2ac3984315f452dacc6a0884 (patch)
tree5324ebec3add54b934a841eee901983ac3463a7f /tests/quick/00.hello/ref/x86/linux/simple-atomic
parentda2a4acc26ba264c3c4a12495776fd6a1c4fb133 (diff)
parent4acca8a0536d4445ed25b67edf571ae460446ab9 (diff)
downloadgem5-c3d41a2def15cdaf2ac3984315f452dacc6a0884.tar.xz
Merge with the main repo.
--HG-- rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
Diffstat (limited to 'tests/quick/00.hello/ref/x86/linux/simple-atomic')
-rw-r--r--tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini12
-rwxr-xr-xtests/quick/00.hello/ref/x86/linux/simple-atomic/simout8
-rw-r--r--tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt19
3 files changed, 25 insertions, 14 deletions
diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
index b1b2b6764..e5a1ce348 100644
--- a/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=AtomicSimpleCPU
@@ -45,8 +47,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
-dcache_port=system.membus.port[2]
-icache_port=system.membus.port[1]
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
[system.cpu.dtb]
type=X86TLB
@@ -67,7 +69,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=tests/test-progs/hello/bin/x86/linux/hello
+executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
gid=100
input=cin
max_stack_size=67108864
@@ -86,7 +88,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
[system.physmem]
type=PhysicalMemory
@@ -96,5 +98,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic/simout b/tests/quick/00.hello/ref/x86/linux/simple-atomic/simout
index 65af79972..de652c174 100755
--- a/tests/quick/00.hello/ref/x86/linux/simple-atomic/simout
+++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic/simout
@@ -1,11 +1,9 @@
-Redirecting stdout to build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic/simout
-Redirecting stderr to build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 9 2012 14:18:02
-gem5 started Jan 9 2012 14:28:31
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Jan 23 2012 04:08:34
+gem5 started Jan 23 2012 04:24:38
+gem5 executing on zizzer
command line: build/X86_SE/gem5.opt -d build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt b/tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt
index 2f19e2e68..e2f539833 100644
--- a/tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.000006 # Number of seconds simulated
sim_ticks 5651000 # Number of ticks simulated
+final_tick 5651000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 855797 # Simulator instruction rate (inst/s)
-host_tick_rate 492033087 # Simulator tick rate (ticks/s)
-host_mem_usage 229652 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 225004 # Simulator instruction rate (inst/s)
+host_tick_rate 129531520 # Simulator tick rate (ticks/s)
+host_mem_usage 202604 # Number of bytes of host memory used
+host_seconds 0.04 # Real time elapsed on the host
sim_insts 9810 # Number of instructions simulated
+system.physmem.bytes_read 62348 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 55280 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 7110 # Number of bytes written to this memory
+system.physmem.num_reads 7966 # Number of read requests responded to by this memory
+system.physmem.num_writes 934 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 11033091488 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 9782339409 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 1258184392 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 12291275880 # Total bandwidth to/from this memory (bytes/s)
system.cpu.workload.num_syscalls 11 # Number of system calls
system.cpu.numCycles 11303 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started