m5: Regression Tester Update

This patch includes the necessary regression updates to test the new ruby
configuration system.  The patch includes support for multiple ruby protocols
and adds the ruby random tester.  The patch removes atomic mode test for
ruby since ruby does not support atomic mode acceses.  These tests can be
added back in when ruby supports atomic mode for real.

--HG--
rename : tests/quick/50.memtest/test.py => tests/quick/60.rubytest/test.py

1 files changed, 143 insertions, 225 deletions

diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
index 7d6d1b187..dcc42a4ee 100644
--- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
+++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
@@ -5,73 +5,20 @@ RubySystem config:
   random_seed: 1234
   randomization: 0
   tech_nm: 45
-  freq_mhz: 3000
+  cycle_period: 1
   block_size_bytes: 64
   block_size_bits: 6
-  memory_size_bytes: 1073741824
-  memory_size_bits: 30
-DMA_Controller config: DMAController_0
-  version: 0
-  buffer_size: 32
-  dma_sequencer: DMASequencer_0
-  number_of_TBEs: 256
-  recycle_latency: 10
-  request_latency: 6
-  transitions_per_cycle: 32
-Directory_Controller config: DirectoryController_0
-  version: 0
-  buffer_size: 32
-  directory_latency: 6
-  directory_name: DirectoryMemory_0
-  dma_select_low_bit: 6
-  dma_select_num_bits: 0
-  memory_controller_name: MemoryControl_0
-  number_of_TBEs: 256
-  recycle_latency: 10
-  transitions_per_cycle: 32
-L1Cache_Controller config: L1CacheController_0
-  version: 0
-  buffer_size: 32
-  cache: l1u_0
-  cache_response_latency: 12
-  issue_latency: 2
-  number_of_TBEs: 256
-  recycle_latency: 10
-  sequencer: Sequencer_0
-  transitions_per_cycle: 32
-Cache config: l1u_0
-  controller: L1CacheController_0
-  cache_associativity: 8
-  num_cache_sets_bits: 2
-  num_cache_sets: 4
-  cache_set_size_bytes: 256
-  cache_set_size_Kbytes: 0.25
-  cache_set_size_Mbytes: 0.000244141
-  cache_size_bytes: 2048
-  cache_size_Kbytes: 2
-  cache_size_Mbytes: 0.00195312
+  memory_size_bytes: 134217728
+  memory_size_bits: 27
 DirectoryMemory Global Config: 
   number of directory memories: 1
-  total memory size bytes: 1073741824
-  total memory size bits: 30
-DirectoryMemory module config: DirectoryMemory_0
-  controller: DirectoryController_0
-  version: 0
-  memory_bits: 30
-  memory_size_bytes: 1073741824
-  memory_size_Kbytes: 1.04858e+06
-  memory_size_Mbytes: 1024
-  memory_size_Gbytes: 1
-Seqeuncer config: Sequencer_0
-  controller: L1CacheController_0
-  version: 0
-  max_outstanding_requests: 16
-  deadlock_threshold: 500000
+  total memory size bytes: 134217728
+  total memory size bits: 27
 
 Network Configuration
 ---------------------
 network: SIMPLE_NETWORK
-topology: theTopology
+topology: 
 
 virtual_net_0: active, ordered
 virtual_net_1: active, ordered
@@ -79,25 +26,11 @@ virtual_net_2: active, ordered
 virtual_net_3: inactive
 virtual_net_4: active, ordered
 virtual_net_5: active, ordered
+virtual_net_6: inactive
+virtual_net_7: inactive
+virtual_net_8: inactive
+virtual_net_9: inactive
 
---- Begin Topology Print ---
-
-Topology print ONLY indicates the _NETWORK_ latency between two machines
-It does NOT include the latency within the machines
-
-L1Cache-0 Network Latencies
-  L1Cache-0 -> Directory-0 net_lat: 7
-  L1Cache-0 -> DMA-0 net_lat: 7
-
-Directory-0 Network Latencies
-  Directory-0 -> L1Cache-0 net_lat: 7
-  Directory-0 -> DMA-0 net_lat: 7
-
-DMA-0 Network Latencies
-  DMA-0 -> L1Cache-0 net_lat: 7
-  DMA-0 -> Directory-0 net_lat: 7
-
---- End Topology Print ---
 
 Profiler Configuration
 ----------------------
@@ -106,34 +39,34 @@ periodic_stats_period: 1000000
 ================ End RubySystem Configuration Print ================
 
 
-Real time: Aug/09/2009 04:00:22
+Real time: Jan/21/2010 12:14:46
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 4
-Elapsed_time_in_minutes: 0.0666667
-Elapsed_time_in_hours: 0.00111111
-Elapsed_time_in_days: 4.62963e-05
+Elapsed_time_in_seconds: 0
+Elapsed_time_in_minutes: 0
+Elapsed_time_in_hours: 0
+Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 1.19
-Virtual_time_in_minutes: 0.0198333
-Virtual_time_in_hours:   0.000330556
-Virtual_time_in_days:    1.37731e-05
+Virtual_time_in_seconds: 0.32
+Virtual_time_in_minutes: 0.00533333
+Virtual_time_in_hours:   8.88889e-05
+Virtual_time_in_days:    3.7037e-06
 
-Ruby_current_time: 26617001
-Ruby_start_time: 1
-Ruby_cycles: 26617000
+Ruby_current_time: 287334
+Ruby_start_time: 0
+Ruby_cycles: 287334
 
-mbytes_resident: 144.777
-mbytes_total: 1352.41
-resident_ratio: 0.107057
+mbytes_resident: 34.1406
+mbytes_total: 34.3242
+resident_ratio: 0.994879
 
 Total_misses: 0
 total_misses: 0 [ 0 ]
 user_misses: 0 [ 0 ]
 supervisor_misses: 0 [ 0 ]
 
-ruby_cycles_executed: 26617001 [ 26617001 ]
+ruby_cycles_executed: 287335 [ 287335 ]
 
 transactions_started: 0 [ 0 ]
 transactions_ended: 0 [ 0 ]
@@ -141,41 +74,21 @@ cycles_per_transaction: 0 [ 0 ]
 misses_per_transaction: 0 [ 0 ]
 
 
-Memory control MemoryControl_0:
-  memory_total_requests: 1082
-  memory_reads: 557
-  memory_writes: 525
-  memory_refreshes: 10431
-  memory_total_request_delays: 1311
-  memory_delays_per_request: 1.21165
-  memory_delays_in_input_queue: 525
-  memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 786
-  memory_stalls_for_bank_busy: 180
-  memory_stalls_for_random_busy: 0
-  memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 38
-  memory_stalls_for_bus: 546
-  memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 22
-  memory_stalls_for_read_read_turnaround: 0
-  accesses_per_bank: 58  43  53  51  67  43  40  32  18  19  34  51  41  46  28  10  31  8  8  12  42  34  9  20  10  25  44  26  25  58  55  41  
-
 Busy Controller Counts:
 L1Cache-0:0  
 Directory-0:0  
-DMA-0:0  
+
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8873 average:     1 | standard deviation: 0 | 0 8873 ]
+sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8874 average:     1 | standard deviation: 0 | 0 8874 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 277 count: 8873 average: 11.531 | standard deviation: 40.8912 | 8316 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30 0 0 0 0 11 0 0 0 0 480 0 0 0 0 10 0 0 0 0 10 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_1: [binsize: 2 max: 277 count: 6886 average: 8.82021 | standard deviation: 35.5704 | 6566 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0 0 0 0 6 0 0 0 0 280 0 0 0 0 7 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_2: [binsize: 2 max: 277 count: 1053 average: 23.3457 | standard deviation: 57.517 | 913 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 4 0 0 0 0 118 0 0 0 0 2 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_3: [binsize: 2 max: 257 count: 934 average: 18.197 | standard deviation: 50.763 | 837 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 1 0 0 0 0 82 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 2 max: 373 count: 8873 average: 31.383 | standard deviation: 65.1247 | 0 7435 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 6 5 6 6 3 335 255 166 323 190 5 5 4 3 1 12 13 5 9 4 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 7 13 16 13 8 0 3 3 2 2 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 ]
+miss_latency_1: [binsize: 2 max: 287 count: 6886 average: 19.1856 | standard deviation: 51.0326 | 0 6248 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 4 1 3 2 158 129 57 116 103 3 1 2 2 1 4 7 1 5 4 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 6 4 3 5 5 0 1 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_2: [binsize: 2 max: 373 count: 1053 average: 91.7255 | standard deviation: 89.279 | 0 521 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 1 5 2 1 109 51 79 167 65 1 3 0 1 0 4 5 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 11 8 2 0 0 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 ]
+miss_latency_3: [binsize: 2 max: 281 count: 934 average: 53.2784 | standard deviation: 80.2311 | 0 666 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 68 75 30 40 22 1 1 2 0 0 4 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 8 2 0 1 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -189,22 +102,26 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
 
 Message Delayed Cycles
 ----------------------
-Total_delay_cycles: [binsize: 1 max: 0 count: 1082 average:     0 | standard deviation: 0 | 1082 ]
-Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 1082 average:     0 | standard deviation: 0 | 1082 ]
+Total_delay_cycles: [binsize: 1 max: 0 count: 2872 average:     0 | standard deviation: 0 | 2872 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 2872 average:     0 | standard deviation: 0 | 2872 ]
   virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
-  virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 557 average:     0 | standard deviation: 0 | 557 ]
-  virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 525 average:     0 | standard deviation: 0 | 525 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 1438 average:     0 | standard deviation: 0 | 1438 ]
+  virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 1434 average:     0 | standard deviation: 0 | 1434 ]
   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+  virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 
 Resource Usage
 --------------
 page_size: 4096
-user_time: 1
+user_time: 0
 system_time: 0
-page_reclaims: 38363
-page_faults: 0
+page_reclaims: 7403
+page_faults: 2289
 swaps: 0
 block_inputs: 0
 block_outputs: 0
@@ -214,94 +131,127 @@ Network Stats
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 0.000127033
-  links_utilized_percent_switch_0_link_0: 5.08134e-05 bw: 640000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 0.000203254 bw: 160000 base_latency: 1
+links_utilized_percent_switch_0: 0.156073
+  links_utilized_percent_switch_0_link_0: 0.0625405 bw: 640000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 0.249605 bw: 160000 base_latency: 1
 
-  outgoing_messages_switch_0_link_0_Response_Data: 557 4456 [ 0 557 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Control: 525 4200 [ 0 0 525 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Control: 557 4456 [ 557 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Data: 525 4200 [ 525 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 1438 103536 [ 0 1438 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Control: 1434 11472 [ 0 0 1434 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Control: 1438 11504 [ 1438 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Data: 1434 103248 [ 1434 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 0.000127033
-  links_utilized_percent_switch_1_link_0: 5.08134e-05 bw: 640000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 0.000203254 bw: 160000 base_latency: 1
+links_utilized_percent_switch_1: 0.156282
+  links_utilized_percent_switch_1_link_0: 0.0624012 bw: 640000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 0.250162 bw: 160000 base_latency: 1
 
-  outgoing_messages_switch_1_link_0_Control: 557 4456 [ 557 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Data: 525 4200 [ 525 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Data: 557 4456 [ 0 557 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Control: 525 4200 [ 0 0 525 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Control: 1438 11504 [ 1438 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Data: 1434 103248 [ 1434 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Data: 1438 103536 [ 0 1438 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 1434 11472 [ 0 0 1434 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 0
-  links_utilized_percent_switch_2_link_0: 0 bw: 640000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 0 bw: 160000 base_latency: 1
-
-
-switch_3_inlinks: 3
-switch_3_outlinks: 3
-links_utilized_percent_switch_3: 0.000135502
-  links_utilized_percent_switch_3_link_0: 0.000203254 bw: 160000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 0.000203254 bw: 160000 base_latency: 1
-  links_utilized_percent_switch_3_link_2: 0 bw: 160000 base_latency: 1
-
-  outgoing_messages_switch_3_link_0_Response_Data: 557 4456 [ 0 557 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Writeback_Control: 525 4200 [ 0 0 525 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Control: 557 4456 [ 557 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Data: 525 4200 [ 525 0 0 0 0 0 ] base_latency: 1
-
-l1u_0 cache stats: 
-  l1u_0_total_misses: 557
-  l1u_0_total_demand_misses: 557
-  l1u_0_total_prefetches: 0
-  l1u_0_total_sw_prefetches: 0
-  l1u_0_total_hw_prefetches: 0
-  l1u_0_misses_per_transaction: inf
-
-  l1u_0_request_type_LD:   25.1346%
-  l1u_0_request_type_ST:   17.4147%
-  l1u_0_request_type_IFETCH:   57.4506%
-
-  l1u_0_access_mode_type_SupervisorMode:   557    100%
-  l1u_0_request_size: [binsize: log2 max: 8 count: 557 average: 7.5368 | standard deviation: 1.45496 | 0 12 1 42 502 ]
-
- --- DMA 0 ---
+links_utilized_percent_switch_2: 0.249883
+  links_utilized_percent_switch_2_link_0: 0.250162 bw: 160000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 0.249605 bw: 160000 base_latency: 1
+
+  outgoing_messages_switch_2_link_0_Response_Data: 1438 103536 [ 0 1438 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 1434 11472 [ 0 0 1434 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Control: 1438 11504 [ 1438 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Data: 1434 103248 [ 1434 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+
+Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 1438
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 1438
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_misses_per_transaction: inf
+
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_LD:   36.9958%
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_ST:   18.637%
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_IFETCH:   44.3672%
+
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_access_mode_type_SupervisorMode:   1438    100%
+  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 8 count: 1438 average: 7.26912 | standard deviation: 1.85842 | 0 71 3 0 134 0 0 0 1230 ]
+
+ --- L1Cache 0 ---
  - Event Counts -
-ReadRequest  0
-WriteRequest  0
-Data  0
-Ack  0
+Load  1053
+Ifetch  6886
+Store  934
+Data  1438
+Fwd_GETX  0
+Inv  0
+Replacement  1434
+Writeback_Ack  1434
+Writeback_Nack  0
 
  - Transitions -
-READY  ReadRequest  0 <-- 
-READY  WriteRequest  0 <-- 
+I  Load  532
+I  Ifetch  638
+I  Store  268
+I  Inv  0 <-- 
+I  Replacement  0 <-- 
 
-BUSY_RD  Data  0 <-- 
+II  Writeback_Nack  0 <-- 
 
-BUSY_WR  Ack  0 <-- 
+M  Load  521
+M  Ifetch  6248
+M  Store  666
+M  Fwd_GETX  0 <-- 
+M  Inv  0 <-- 
+M  Replacement  1434
+
+MI  Fwd_GETX  0 <-- 
+MI  Inv  0 <-- 
+MI  Writeback_Ack  1434
+
+IS  Data  1170
+
+IM  Data  268
+
+Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer:
+  memory_total_requests: 2872
+  memory_reads: 1438
+  memory_writes: 1434
+  memory_refreshes: 599
+  memory_total_request_delays: 3924
+  memory_delays_per_request: 1.3663
+  memory_delays_in_input_queue: 1431
+  memory_delays_behind_head_of_bank_queue: 7
+  memory_delays_stalled_at_head_of_bank_queue: 2486
+  memory_stalls_for_bank_busy: 841
+  memory_stalls_for_random_busy: 0
+  memory_stalls_for_anti_starvation: 0
+  memory_stalls_for_arbitration: 109
+  memory_stalls_for_bus: 1466
+  memory_stalls_for_tfaw: 0
+  memory_stalls_for_read_write_turnaround: 70
+  memory_stalls_for_read_read_turnaround: 0
+  accesses_per_bank: 162  142  210  172  216  84  102  44  22  20  146  276  148  116  62  30  84  8  8  14  116  56  12  60  34  58  82  64  44  122  104  54  
 
  --- Directory 0 ---
  - Event Counts -
-GETX  557
+GETX  1438
 GETS  0
-PUTX  525
+PUTX  1434
 PUTX_NotOwner  0
 DMA_READ  0
 DMA_WRITE  0
-Memory_Data  557
-Memory_Ack  525
+Memory_Data  1438
+Memory_Ack  1434
 
  - Transitions -
-I  GETX  557
+I  GETX  1438
 I  PUTX_NotOwner  0 <-- 
 I  DMA_READ  0 <-- 
 I  DMA_WRITE  0 <-- 
 
 M  GETX  0 <-- 
-M  PUTX  525
+M  PUTX  1434
 M  PUTX_NotOwner  0 <-- 
 M  DMA_READ  0 <-- 
 M  DMA_WRITE  0 <-- 
@@ -312,15 +262,19 @@ M_DRD  PUTX  0 <--
 M_DWR  GETX  0 <-- 
 M_DWR  PUTX  0 <-- 
 
+M_DWRI  GETX  0 <-- 
 M_DWRI  Memory_Ack  0 <-- 
 
+M_DRDI  GETX  0 <-- 
+M_DRDI  Memory_Ack  0 <-- 
+
 IM  GETX  0 <-- 
 IM  GETS  0 <-- 
 IM  PUTX  0 <-- 
 IM  PUTX_NotOwner  0 <-- 
 IM  DMA_READ  0 <-- 
 IM  DMA_WRITE  0 <-- 
-IM  Memory_Data  557
+IM  Memory_Data  1438
 
 MI  GETX  0 <-- 
 MI  GETS  0 <-- 
@@ -328,7 +282,7 @@ MI  PUTX  0 <--
 MI  PUTX_NotOwner  0 <-- 
 MI  DMA_READ  0 <-- 
 MI  DMA_WRITE  0 <-- 
-MI  Memory_Ack  525
+MI  Memory_Ack  1434
 
 ID  GETX  0 <-- 
 ID  GETS  0 <-- 
@@ -346,39 +300,3 @@ ID_W  DMA_READ  0 <--
 ID_W  DMA_WRITE  0 <-- 
 ID_W  Memory_Ack  0 <-- 
 
- --- L1Cache 0 ---
- - Event Counts -
-Load  1053
-Ifetch  6886
-Store  934
-Data  557
-Fwd_GETX  0
-Inv  0
-Replacement  525
-Writeback_Ack  525
-Writeback_Nack  0
-
- - Transitions -
-I  Load  140
-I  Ifetch  320
-I  Store  97
-I  Inv  0 <-- 
-I  Replacement  0 <-- 
-
-II  Writeback_Nack  0 <-- 
-
-M  Load  913
-M  Ifetch  6566
-M  Store  837
-M  Fwd_GETX  0 <-- 
-M  Inv  0 <-- 
-M  Replacement  525
-
-MI  Fwd_GETX  0 <-- 
-MI  Inv  0 <-- 
-MI  Writeback_Ack  525
-
-IS  Data  460
-
-IM  Data  97
-