diff options
| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:40 -0800 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:40 -0800 |
| commit | ab2f864af2fd38cbf141708550409f3ca72c675f (patch) | |
| tree | 75b861a290240275d872a58d393a6d6f7e5598d5 /tests/quick/00.hello/ref/x86/linux | |
| parent | ceae8383ffeebdc2c12d9a383941c62653471de1 (diff) | |
| download | gem5-ab2f864af2fd38cbf141708550409f3ca72c675f.tar.xz | |
m5: Regression Tester Update
This patch includes the necessary regression updates to test the new ruby
configuration system. The patch includes support for multiple ruby protocols
and adds the ruby random tester. The patch removes atomic mode test for
ruby since ruby does not support atomic mode acceses. These tests can be
added back in when ruby supports atomic mode for real.
--HG--
rename : tests/quick/50.memtest/test.py => tests/quick/60.rubytest/test.py
Diffstat (limited to 'tests/quick/00.hello/ref/x86/linux')
10 files changed, 323 insertions, 755 deletions
diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/config.ini b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/config.ini deleted file mode 100644 index cd22dbeae..000000000 --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/config.ini +++ /dev/null @@ -1,97 +0,0 @@ -[root] -type=Root -children=system -dummy=0 - -[system] -type=System -children=cpu membus physmem -mem_mode=atomic -physmem=system.physmem - -[system.cpu] -type=AtomicSimpleCPU -children=dtb itb tracer workload -checker=Null -clock=500 -cpu_id=0 -defer_registration=false -do_checkpoint_insts=true -do_statistics_insts=true -dtb=system.cpu.dtb -function_trace=false -function_trace_start=0 -itb=system.cpu.itb -max_insts_all_threads=0 -max_insts_any_thread=0 -max_loads_all_threads=0 -max_loads_any_thread=0 -numThreads=1 -phase=0 -progress_interval=0 -simulate_data_stalls=false -simulate_inst_stalls=false -system=system -tracer=system.cpu.tracer -width=1 -workload=system.cpu.workload -dcache_port=system.membus.port[2] -icache_port=system.membus.port[1] - -[system.cpu.dtb] -type=X86TLB -size=64 - -[system.cpu.itb] -type=X86TLB -size=64 - -[system.cpu.tracer] -type=ExeTracer - -[system.cpu.workload] -type=LiveProcess -cmd=hello -cwd= -egid=100 -env= -errout=cerr -euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello -gid=100 -input=cin -max_stack_size=67108864 -output=cout -pid=100 -ppid=99 -simpoint=0 -system=system -uid=100 - -[system.membus] -type=Bus -block_size=64 -bus_id=0 -clock=1000 -header_cycles=1 -responder_set=false -width=64 -port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port - -[system.physmem] -type=RubyMemory -clock=1 -config_file=build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic-ruby/ruby.config -debug=false -debug_file=ruby.debug -file= -latency=30000 -latency_var=0 -null=false -num_cpus=1 -phase=0 -range=0:134217727 -stats_file=ruby.stats -zero=false -port=system.membus.port[0] - diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/ruby.stats b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/ruby.stats deleted file mode 100644 index aef340be6..000000000 --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/ruby.stats +++ /dev/null @@ -1,344 +0,0 @@ - -================ Begin RubySystem Configuration Print ================ - -RubySystem config: - random_seed: 1234 - randomization: 0 - tech_nm: 45 - freq_mhz: 3000 - block_size_bytes: 64 - block_size_bits: 6 - memory_size_bytes: 1073741824 - memory_size_bits: 30 -DMA_Controller config: DMAController_0 - version: 0 - buffer_size: 32 - dma_sequencer: DMASequencer_0 - number_of_TBEs: 256 - recycle_latency: 10 - request_latency: 6 - transitions_per_cycle: 32 -Directory_Controller config: DirectoryController_0 - version: 0 - buffer_size: 32 - directory_latency: 6 - directory_name: DirectoryMemory_0 - dma_select_low_bit: 6 - dma_select_num_bits: 0 - memory_controller_name: MemoryControl_0 - number_of_TBEs: 256 - recycle_latency: 10 - transitions_per_cycle: 32 -L1Cache_Controller config: L1CacheController_0 - version: 0 - buffer_size: 32 - cache: l1u_0 - cache_response_latency: 12 - issue_latency: 2 - number_of_TBEs: 256 - recycle_latency: 10 - sequencer: Sequencer_0 - transitions_per_cycle: 32 -Cache config: l1u_0 - controller: L1CacheController_0 - cache_associativity: 8 - num_cache_sets_bits: 2 - num_cache_sets: 4 - cache_set_size_bytes: 256 - cache_set_size_Kbytes: 0.25 - cache_set_size_Mbytes: 0.000244141 - cache_size_bytes: 2048 - cache_size_Kbytes: 2 - cache_size_Mbytes: 0.00195312 -DirectoryMemory Global Config: - number of directory memories: 1 - total memory size bytes: 1073741824 - total memory size bits: 30 -DirectoryMemory module config: DirectoryMemory_0 - controller: DirectoryController_0 - version: 0 - memory_bits: 30 - memory_size_bytes: 1073741824 - memory_size_Kbytes: 1.04858e+06 - memory_size_Mbytes: 1024 - memory_size_Gbytes: 1 -Seqeuncer config: Sequencer_0 - controller: L1CacheController_0 - version: 0 - max_outstanding_requests: 16 - deadlock_threshold: 500000 - -Network Configuration ---------------------- -network: SIMPLE_NETWORK -topology: theTopology - -virtual_net_0: active, ordered -virtual_net_1: active, ordered -virtual_net_2: active, ordered -virtual_net_3: inactive -virtual_net_4: active, ordered -virtual_net_5: active, ordered - ---- Begin Topology Print --- - -Topology print ONLY indicates the _NETWORK_ latency between two machines -It does NOT include the latency within the machines - -L1Cache-0 Network Latencies - L1Cache-0 -> Directory-0 net_lat: 7 - L1Cache-0 -> DMA-0 net_lat: 7 - -Directory-0 Network Latencies - Directory-0 -> L1Cache-0 net_lat: 7 - Directory-0 -> DMA-0 net_lat: 7 - -DMA-0 Network Latencies - DMA-0 -> L1Cache-0 net_lat: 7 - DMA-0 -> Directory-0 net_lat: 7 - ---- End Topology Print --- - -Profiler Configuration ----------------------- -periodic_stats_period: 1000000 - -================ End RubySystem Configuration Print ================ - - -Real time: Aug/09/2009 03:58:51 - -Profiler Stats --------------- -Elapsed_time_in_seconds: 1 -Elapsed_time_in_minutes: 0.0166667 -Elapsed_time_in_hours: 0.000277778 -Elapsed_time_in_days: 1.15741e-05 - -Virtual_time_in_seconds: 0.34 -Virtual_time_in_minutes: 0.00566667 -Virtual_time_in_hours: 9.44444e-05 -Virtual_time_in_days: 3.93519e-06 - -Ruby_current_time: 5504001 -Ruby_start_time: 1 -Ruby_cycles: 5504000 - -mbytes_resident: 144.359 -mbytes_total: 1352.23 -resident_ratio: 0.106763 - -Total_misses: 0 -total_misses: 0 [ 0 ] -user_misses: 0 [ 0 ] -supervisor_misses: 0 [ 0 ] - -ruby_cycles_executed: 5504001 [ 5504001 ] - -transactions_started: 0 [ 0 ] -transactions_ended: 0 [ 0 ] -cycles_per_transaction: 0 [ 0 ] -misses_per_transaction: 0 [ 0 ] - - -Busy Controller Counts: -L1Cache-0:0 -Directory-0:0 -DMA-0:0 - -Busy Bank Count:0 - -sequencer_requests_outstanding: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -All Non-Zero Cycle Demand Cache Accesses ----------------------------------------- -miss_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -All Non-Zero Cycle SW Prefetch Requests ------------------------------------- -prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -Request vs. RubySystem State Profile --------------------------------- - - -filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -Message Delayed Cycles ----------------------- -Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -Resource Usage --------------- -page_size: 4096 -user_time: 0 -system_time: 0 -page_reclaims: 38267 -page_faults: 1 -swaps: 0 -block_inputs: 0 -block_outputs: 0 - -Network Stats -------------- - -switch_0_inlinks: 2 -switch_0_outlinks: 2 -links_utilized_percent_switch_0: 0 - links_utilized_percent_switch_0_link_0: 0 bw: 640000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 0 bw: 160000 base_latency: 1 - - -switch_1_inlinks: 2 -switch_1_outlinks: 2 -links_utilized_percent_switch_1: 0 - links_utilized_percent_switch_1_link_0: 0 bw: 640000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 0 bw: 160000 base_latency: 1 - - -switch_2_inlinks: 2 -switch_2_outlinks: 2 -links_utilized_percent_switch_2: 0 - links_utilized_percent_switch_2_link_0: 0 bw: 640000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 0 bw: 160000 base_latency: 1 - - -switch_3_inlinks: 3 -switch_3_outlinks: 3 -links_utilized_percent_switch_3: 0 - links_utilized_percent_switch_3_link_0: 0 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 0 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 0 bw: 160000 base_latency: 1 - - -l1u_0 cache stats: - l1u_0_total_misses: 0 - l1u_0_total_demand_misses: 0 - l1u_0_total_prefetches: 0 - l1u_0_total_sw_prefetches: 0 - l1u_0_total_hw_prefetches: 0 - l1u_0_misses_per_transaction: nan - - l1u_0_request_size: [binsize: log2 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - - --- DMA 0 --- - - Event Counts - -ReadRequest 0 -WriteRequest 0 -Data 0 -Ack 0 - - - Transitions - -READY ReadRequest 0 <-- -READY WriteRequest 0 <-- - -BUSY_RD Data 0 <-- - -BUSY_WR Ack 0 <-- - - --- Directory 0 --- - - Event Counts - -GETX 0 -GETS 0 -PUTX 0 -PUTX_NotOwner 0 -DMA_READ 0 -DMA_WRITE 0 -Memory_Data 0 -Memory_Ack 0 - - - Transitions - -I GETX 0 <-- -I PUTX_NotOwner 0 <-- -I DMA_READ 0 <-- -I DMA_WRITE 0 <-- - -M GETX 0 <-- -M PUTX 0 <-- -M PUTX_NotOwner 0 <-- -M DMA_READ 0 <-- -M DMA_WRITE 0 <-- - -M_DRD GETX 0 <-- -M_DRD PUTX 0 <-- - -M_DWR GETX 0 <-- -M_DWR PUTX 0 <-- - -M_DWRI Memory_Ack 0 <-- - -IM GETX 0 <-- -IM GETS 0 <-- -IM PUTX 0 <-- -IM PUTX_NotOwner 0 <-- -IM DMA_READ 0 <-- -IM DMA_WRITE 0 <-- -IM Memory_Data 0 <-- - -MI GETX 0 <-- -MI GETS 0 <-- -MI PUTX 0 <-- -MI PUTX_NotOwner 0 <-- -MI DMA_READ 0 <-- -MI DMA_WRITE 0 <-- -MI Memory_Ack 0 <-- - -ID GETX 0 <-- -ID GETS 0 <-- -ID PUTX 0 <-- -ID PUTX_NotOwner 0 <-- -ID DMA_READ 0 <-- -ID DMA_WRITE 0 <-- -ID Memory_Data 0 <-- - -ID_W GETX 0 <-- -ID_W GETS 0 <-- -ID_W PUTX 0 <-- -ID_W PUTX_NotOwner 0 <-- -ID_W DMA_READ 0 <-- -ID_W DMA_WRITE 0 <-- -ID_W Memory_Ack 0 <-- - - --- L1Cache 0 --- - - Event Counts - -Load 0 -Ifetch 0 -Store 0 -Data 0 -Fwd_GETX 0 -Inv 0 -Replacement 0 -Writeback_Ack 0 -Writeback_Nack 0 - - - Transitions - -I Load 0 <-- -I Ifetch 0 <-- -I Store 0 <-- -I Inv 0 <-- -I Replacement 0 <-- - -II Writeback_Nack 0 <-- - -M Load 0 <-- -M Ifetch 0 <-- -M Store 0 <-- -M Fwd_GETX 0 <-- -M Inv 0 <-- -M Replacement 0 <-- - -MI Fwd_GETX 0 <-- -MI Inv 0 <-- -MI Writeback_Ack 0 <-- - -IS Data 0 <-- - -IM Data 0 <-- - diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simerr b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simerr deleted file mode 100755 index dba65c3fc..000000000 --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simerr +++ /dev/null @@ -1,11 +0,0 @@ -["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "1", "-m", "1", "-s", "1024"] -Error: User specified set of debug components, but the RUBY_DEBUG compile-time flag is false. -Solution: Re-compile with RUBY_DEBUG set to true. -print config: 1 -warn: Sockets disabled, not accepting gdb connections -For more information see: http://www.m5sim.org/warn/d946bea6 -warn: instruction 'fnstcw_Mw' unimplemented -For more information see: http://www.m5sim.org/warn/437d5238 -warn: instruction 'fldcw_Mw' unimplemented -For more information see: http://www.m5sim.org/warn/437d5238 -hack: be nice to actually delete the event here diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simout b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simout deleted file mode 100755 index 85200a1c8..000000000 --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/simout +++ /dev/null @@ -1,16 +0,0 @@ -M5 Simulator System - -Copyright (c) 2001-2008 -The Regents of The University of Michigan -All Rights Reserved - - -M5 compiled Aug 9 2009 03:58:47 -M5 revision 33faa9915d16 6486 default tip -M5 started Aug 9 2009 03:58:49 -M5 executing on tater -command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic-ruby -re tests/run.py build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-atomic-ruby -Global frequency set at 1000000000000 ticks per second -info: Entering event queue @ 0. Starting simulation... -Hello world! -Exiting @ tick 5504000 because target called exit() diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/stats.txt b/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/stats.txt deleted file mode 100644 index e8b0be97b..000000000 --- a/tests/quick/00.hello/ref/x86/linux/simple-atomic-ruby/stats.txt +++ /dev/null @@ -1,18 +0,0 @@ - ----------- Begin Simulation Statistics ---------- -host_inst_rate 7886 # Simulator instruction rate (inst/s) -host_mem_usage 1384684 # Number of bytes of host memory used -host_seconds 1.21 # Real time elapsed on the host -host_tick_rate 4559114 # Simulator tick rate (ticks/s) -sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 9519 # Number of instructions simulated -sim_seconds 0.000006 # Number of seconds simulated -sim_ticks 5504000 # Number of ticks simulated -system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles -system.cpu.numCycles 11009 # number of cpu cycles simulated -system.cpu.num_insts 9519 # Number of instructions executed -system.cpu.num_refs 1987 # Number of memory references -system.cpu.workload.PROG:num_syscalls 11 # Number of system calls - ----------- End Simulation Statistics ---------- diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini index bb30a8458..febd4efb3 100644 --- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini +++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini @@ -5,7 +5,7 @@ dummy=0 [system] type=System -children=cpu membus physmem +children=cpu physmem ruby mem_mode=atomic physmem=system.physmem @@ -13,7 +13,7 @@ physmem=system.physmem type=TimingSimpleCPU children=dtb itb tracer workload checker=Null -clock=500 +clock=1 cpu_id=0 defer_registration=false do_checkpoint_insts=true @@ -32,8 +32,8 @@ progress_interval=0 system=system tracer=system.cpu.tracer workload=system.cpu.workload -dcache_port=system.membus.port[2] -icache_port=system.membus.port[1] +dcache_port=system.ruby.network.topology.ext_links0.ext_node.sequencer.port[1] +icache_port=system.ruby.network.topology.ext_links0.ext_node.sequencer.port[0] [system.cpu.dtb] type=X86TLB @@ -54,7 +54,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello +executable=tests/test-progs/hello/bin/x86/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -65,30 +65,170 @@ simpoint=0 system=system uid=100 -[system.membus] -type=Bus -block_size=64 -bus_id=0 -clock=1000 -header_cycles=1 -responder_set=false -width=64 -port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port - [system.physmem] -type=RubyMemory -clock=1 -config_file=build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-timing-ruby/ruby.config -debug=false -debug_file=ruby.debug +type=PhysicalMemory file= -latency=30000 +latency=30 latency_var=0 null=false -num_cpus=1 -phase=0 range=0:134217727 -stats_file=ruby.stats zero=false -port=system.membus.port[0] +port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort + +[system.ruby] +type=RubySystem +children=debug network profiler tracer +block_size_bytes=64 +clock=1 +debug=system.ruby.debug +mem_size=134217728 +network=system.ruby.network +profiler=system.ruby.profiler +random_seed=1234 +randomization=false +stats_filename=ruby.stats +tech_nm=45 +tracer=system.ruby.tracer + +[system.ruby.debug] +type=RubyDebug +filter_string=none +output_filename=none +protocol_trace=false +start_time=1 +verbosity_string=none + +[system.ruby.network] +type=SimpleNetwork +children=topology +adaptive_routing=true +buffer_size=0 +control_msg_size=8 +endpoint_bandwidth=10000 +link_latency=1 +number_of_virtual_networks=10 +topology=system.ruby.network.topology + +[system.ruby.network.topology] +type=Topology +children=ext_links0 ext_links1 int_links0 int_links1 +ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 +int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 +num_int_nodes=3 +print_config=false + +[system.ruby.network.topology.ext_links0] +type=ExtLink +children=ext_node +bw_multiplier=64 +ext_node=system.ruby.network.topology.ext_links0.ext_node +int_node=0 +latency=1 +weight=1 + +[system.ruby.network.topology.ext_links0.ext_node] +type=L1Cache_Controller +children=sequencer +buffer_size=0 +cacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache +cache_response_latency=12 +issue_latency=2 +number_of_TBEs=256 +recycle_latency=10 +sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer +transitions_per_cycle=32 +version=0 + +[system.ruby.network.topology.ext_links0.ext_node.sequencer] +type=RubySequencer +children=icache +dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache +deadlock_threshold=500000 +icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache +max_outstanding_requests=16 +physmem=system.physmem +using_ruby_tester=false +version=0 +physMemPort=system.physmem.port[0] +port=system.cpu.icache_port system.cpu.dcache_port + +[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache] +type=RubyCache +assoc=2 +latency=3 +replacement_policy=PSEUDO_LRU +size=256 + +[system.ruby.network.topology.ext_links1] +type=ExtLink +children=ext_node +bw_multiplier=64 +ext_node=system.ruby.network.topology.ext_links1.ext_node +int_node=1 +latency=1 +weight=1 + +[system.ruby.network.topology.ext_links1.ext_node] +type=Directory_Controller +children=directory memBuffer +buffer_size=0 +directory=system.ruby.network.topology.ext_links1.ext_node.directory +directory_latency=12 +memBuffer=system.ruby.network.topology.ext_links1.ext_node.memBuffer +number_of_TBEs=256 +recycle_latency=10 +transitions_per_cycle=32 +version=0 + +[system.ruby.network.topology.ext_links1.ext_node.directory] +type=RubyDirectoryMemory +size=134217728 +version=0 + +[system.ruby.network.topology.ext_links1.ext_node.memBuffer] +type=RubyMemoryControl +bank_bit_0=8 +bank_busy_time=11 +bank_queue_size=12 +banks_per_rank=8 +basic_bus_busy_time=2 +dimm_bit_0=12 +dimms_per_channel=2 +mem_bus_cycle_multiplier=10 +mem_ctl_latency=12 +mem_fixed_delay=0 +mem_random_arbitrate=0 +rank_bit_0=11 +rank_rank_delay=1 +ranks_per_dimm=2 +read_write_delay=2 +refresh_period=1560 +tFaw=0 +version=0 + +[system.ruby.network.topology.int_links0] +type=IntLink +bw_multiplier=16 +latency=1 +node_a=0 +node_b=2 +weight=1 + +[system.ruby.network.topology.int_links1] +type=IntLink +bw_multiplier=16 +latency=1 +node_a=1 +node_b=2 +weight=1 + +[system.ruby.profiler] +type=RubyProfiler +all_instructions=false +hot_lines=false +num_of_sequencers=1 + +[system.ruby.tracer] +type=RubyTracer +warmup_length=100000 diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats index 7d6d1b187..dcc42a4ee 100644 --- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats +++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats @@ -5,73 +5,20 @@ RubySystem config: random_seed: 1234 randomization: 0 tech_nm: 45 - freq_mhz: 3000 + cycle_period: 1 block_size_bytes: 64 block_size_bits: 6 - memory_size_bytes: 1073741824 - memory_size_bits: 30 -DMA_Controller config: DMAController_0 - version: 0 - buffer_size: 32 - dma_sequencer: DMASequencer_0 - number_of_TBEs: 256 - recycle_latency: 10 - request_latency: 6 - transitions_per_cycle: 32 -Directory_Controller config: DirectoryController_0 - version: 0 - buffer_size: 32 - directory_latency: 6 - directory_name: DirectoryMemory_0 - dma_select_low_bit: 6 - dma_select_num_bits: 0 - memory_controller_name: MemoryControl_0 - number_of_TBEs: 256 - recycle_latency: 10 - transitions_per_cycle: 32 -L1Cache_Controller config: L1CacheController_0 - version: 0 - buffer_size: 32 - cache: l1u_0 - cache_response_latency: 12 - issue_latency: 2 - number_of_TBEs: 256 - recycle_latency: 10 - sequencer: Sequencer_0 - transitions_per_cycle: 32 -Cache config: l1u_0 - controller: L1CacheController_0 - cache_associativity: 8 - num_cache_sets_bits: 2 - num_cache_sets: 4 - cache_set_size_bytes: 256 - cache_set_size_Kbytes: 0.25 - cache_set_size_Mbytes: 0.000244141 - cache_size_bytes: 2048 - cache_size_Kbytes: 2 - cache_size_Mbytes: 0.00195312 + memory_size_bytes: 134217728 + memory_size_bits: 27 DirectoryMemory Global Config: number of directory memories: 1 - total memory size bytes: 1073741824 - total memory size bits: 30 -DirectoryMemory module config: DirectoryMemory_0 - controller: DirectoryController_0 - version: 0 - memory_bits: 30 - memory_size_bytes: 1073741824 - memory_size_Kbytes: 1.04858e+06 - memory_size_Mbytes: 1024 - memory_size_Gbytes: 1 -Seqeuncer config: Sequencer_0 - controller: L1CacheController_0 - version: 0 - max_outstanding_requests: 16 - deadlock_threshold: 500000 + total memory size bytes: 134217728 + total memory size bits: 27 Network Configuration --------------------- network: SIMPLE_NETWORK -topology: theTopology +topology: virtual_net_0: active, ordered virtual_net_1: active, ordered @@ -79,25 +26,11 @@ virtual_net_2: active, ordered virtual_net_3: inactive virtual_net_4: active, ordered virtual_net_5: active, ordered +virtual_net_6: inactive +virtual_net_7: inactive +virtual_net_8: inactive +virtual_net_9: inactive ---- Begin Topology Print --- - -Topology print ONLY indicates the _NETWORK_ latency between two machines -It does NOT include the latency within the machines - -L1Cache-0 Network Latencies - L1Cache-0 -> Directory-0 net_lat: 7 - L1Cache-0 -> DMA-0 net_lat: 7 - -Directory-0 Network Latencies - Directory-0 -> L1Cache-0 net_lat: 7 - Directory-0 -> DMA-0 net_lat: 7 - -DMA-0 Network Latencies - DMA-0 -> L1Cache-0 net_lat: 7 - DMA-0 -> Directory-0 net_lat: 7 - ---- End Topology Print --- Profiler Configuration ---------------------- @@ -106,34 +39,34 @@ periodic_stats_period: 1000000 ================ End RubySystem Configuration Print ================ -Real time: Aug/09/2009 04:00:22 +Real time: Jan/21/2010 12:14:46 Profiler Stats -------------- -Elapsed_time_in_seconds: 4 -Elapsed_time_in_minutes: 0.0666667 -Elapsed_time_in_hours: 0.00111111 -Elapsed_time_in_days: 4.62963e-05 +Elapsed_time_in_seconds: 0 +Elapsed_time_in_minutes: 0 +Elapsed_time_in_hours: 0 +Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 1.19 -Virtual_time_in_minutes: 0.0198333 -Virtual_time_in_hours: 0.000330556 -Virtual_time_in_days: 1.37731e-05 +Virtual_time_in_seconds: 0.32 +Virtual_time_in_minutes: 0.00533333 +Virtual_time_in_hours: 8.88889e-05 +Virtual_time_in_days: 3.7037e-06 -Ruby_current_time: 26617001 -Ruby_start_time: 1 -Ruby_cycles: 26617000 +Ruby_current_time: 287334 +Ruby_start_time: 0 +Ruby_cycles: 287334 -mbytes_resident: 144.777 -mbytes_total: 1352.41 -resident_ratio: 0.107057 +mbytes_resident: 34.1406 +mbytes_total: 34.3242 +resident_ratio: 0.994879 Total_misses: 0 total_misses: 0 [ 0 ] user_misses: 0 [ 0 ] supervisor_misses: 0 [ 0 ] -ruby_cycles_executed: 26617001 [ 26617001 ] +ruby_cycles_executed: 287335 [ 287335 ] transactions_started: 0 [ 0 ] transactions_ended: 0 [ 0 ] @@ -141,41 +74,21 @@ cycles_per_transaction: 0 [ 0 ] misses_per_transaction: 0 [ 0 ] -Memory control MemoryControl_0: - memory_total_requests: 1082 - memory_reads: 557 - memory_writes: 525 - memory_refreshes: 10431 - memory_total_request_delays: 1311 - memory_delays_per_request: 1.21165 - memory_delays_in_input_queue: 525 - memory_delays_behind_head_of_bank_queue: 0 - memory_delays_stalled_at_head_of_bank_queue: 786 - memory_stalls_for_bank_busy: 180 - memory_stalls_for_random_busy: 0 - memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 38 - memory_stalls_for_bus: 546 - memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 22 - memory_stalls_for_read_read_turnaround: 0 - accesses_per_bank: 58 43 53 51 67 43 40 32 18 19 34 51 41 46 28 10 31 8 8 12 42 34 9 20 10 25 44 26 25 58 55 41 - Busy Controller Counts: L1Cache-0:0 Directory-0:0 -DMA-0:0 + Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8873 average: 1 | standard deviation: 0 | 0 8873 ] +sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8874 average: 1 | standard deviation: 0 | 0 8874 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 2 max: 277 count: 8873 average: 11.531 | standard deviation: 40.8912 | 8316 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30 0 0 0 0 11 0 0 0 0 480 0 0 0 0 10 0 0 0 0 10 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_1: [binsize: 2 max: 277 count: 6886 average: 8.82021 | standard deviation: 35.5704 | 6566 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0 0 0 0 6 0 0 0 0 280 0 0 0 0 7 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_2: [binsize: 2 max: 277 count: 1053 average: 23.3457 | standard deviation: 57.517 | 913 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 0 0 0 0 4 0 0 0 0 118 0 0 0 0 2 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_3: [binsize: 2 max: 257 count: 934 average: 18.197 | standard deviation: 50.763 | 837 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 1 0 0 0 0 82 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 2 max: 373 count: 8873 average: 31.383 | standard deviation: 65.1247 | 0 7435 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 6 5 6 6 3 335 255 166 323 190 5 5 4 3 1 12 13 5 9 4 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 7 13 16 13 8 0 3 3 2 2 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 ] +miss_latency_1: [binsize: 2 max: 287 count: 6886 average: 19.1856 | standard deviation: 51.0326 | 0 6248 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 4 1 3 2 158 129 57 116 103 3 1 2 2 1 4 7 1 5 4 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 6 4 3 5 5 0 1 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_2: [binsize: 2 max: 373 count: 1053 average: 91.7255 | standard deviation: 89.279 | 0 521 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 2 1 5 2 1 109 51 79 167 65 1 3 0 1 0 4 5 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 11 8 2 0 0 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 ] +miss_latency_3: [binsize: 2 max: 281 count: 934 average: 53.2784 | standard deviation: 80.2311 | 0 666 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 68 75 30 40 22 1 1 2 0 0 4 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 8 2 0 1 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -189,22 +102,26 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN Message Delayed Cycles ---------------------- -Total_delay_cycles: [binsize: 1 max: 0 count: 1082 average: 0 | standard deviation: 0 | 1082 ] -Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 1082 average: 0 | standard deviation: 0 | 1082 ] +Total_delay_cycles: [binsize: 1 max: 0 count: 2872 average: 0 | standard deviation: 0 | 2872 ] +Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 2872 average: 0 | standard deviation: 0 | 2872 ] virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 557 average: 0 | standard deviation: 0 | 557 ] - virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 525 average: 0 | standard deviation: 0 | 525 ] + virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 1438 average: 0 | standard deviation: 0 | 1438 ] + virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 1434 average: 0 | standard deviation: 0 | 1434 ] virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] Resource Usage -------------- page_size: 4096 -user_time: 1 +user_time: 0 system_time: 0 -page_reclaims: 38363 -page_faults: 0 +page_reclaims: 7403 +page_faults: 2289 swaps: 0 block_inputs: 0 block_outputs: 0 @@ -214,94 +131,127 @@ Network Stats switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 0.000127033 - links_utilized_percent_switch_0_link_0: 5.08134e-05 bw: 640000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 0.000203254 bw: 160000 base_latency: 1 +links_utilized_percent_switch_0: 0.156073 + links_utilized_percent_switch_0_link_0: 0.0625405 bw: 640000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 0.249605 bw: 160000 base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 557 4456 [ 0 557 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Control: 525 4200 [ 0 0 525 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Control: 557 4456 [ 557 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Data: 525 4200 [ 525 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 1438 103536 [ 0 1438 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Control: 1434 11472 [ 0 0 1434 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Control: 1438 11504 [ 1438 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Data: 1434 103248 [ 1434 0 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 0.000127033 - links_utilized_percent_switch_1_link_0: 5.08134e-05 bw: 640000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 0.000203254 bw: 160000 base_latency: 1 +links_utilized_percent_switch_1: 0.156282 + links_utilized_percent_switch_1_link_0: 0.0624012 bw: 640000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 0.250162 bw: 160000 base_latency: 1 - outgoing_messages_switch_1_link_0_Control: 557 4456 [ 557 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Data: 525 4200 [ 525 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 557 4456 [ 0 557 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Control: 525 4200 [ 0 0 525 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Control: 1438 11504 [ 1438 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Data: 1434 103248 [ 1434 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 1438 103536 [ 0 1438 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Control: 1434 11472 [ 0 0 1434 0 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 0 - links_utilized_percent_switch_2_link_0: 0 bw: 640000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 0 bw: 160000 base_latency: 1 - - -switch_3_inlinks: 3 -switch_3_outlinks: 3 -links_utilized_percent_switch_3: 0.000135502 - links_utilized_percent_switch_3_link_0: 0.000203254 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 0.000203254 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 0 bw: 160000 base_latency: 1 - - outgoing_messages_switch_3_link_0_Response_Data: 557 4456 [ 0 557 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Writeback_Control: 525 4200 [ 0 0 525 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Control: 557 4456 [ 557 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Data: 525 4200 [ 525 0 0 0 0 0 ] base_latency: 1 - -l1u_0 cache stats: - l1u_0_total_misses: 557 - l1u_0_total_demand_misses: 557 - l1u_0_total_prefetches: 0 - l1u_0_total_sw_prefetches: 0 - l1u_0_total_hw_prefetches: 0 - l1u_0_misses_per_transaction: inf - - l1u_0_request_type_LD: 25.1346% - l1u_0_request_type_ST: 17.4147% - l1u_0_request_type_IFETCH: 57.4506% - - l1u_0_access_mode_type_SupervisorMode: 557 100% - l1u_0_request_size: [binsize: log2 max: 8 count: 557 average: 7.5368 | standard deviation: 1.45496 | 0 12 1 42 502 ] - - --- DMA 0 --- +links_utilized_percent_switch_2: 0.249883 + links_utilized_percent_switch_2_link_0: 0.250162 bw: 160000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 0.249605 bw: 160000 base_latency: 1 + + outgoing_messages_switch_2_link_0_Response_Data: 1438 103536 [ 0 1438 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Control: 1434 11472 [ 0 0 1434 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Control: 1438 11504 [ 1438 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Data: 1434 103248 [ 1434 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + +Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 1438 + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 1438 + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0 + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0 + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0 + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_misses_per_transaction: inf + + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_LD: 36.9958% + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_ST: 18.637% + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_IFETCH: 44.3672% + + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_access_mode_type_SupervisorMode: 1438 100% + system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 8 count: 1438 average: 7.26912 | standard deviation: 1.85842 | 0 71 3 0 134 0 0 0 1230 ] + + --- L1Cache 0 --- - Event Counts - -ReadRequest 0 -WriteRequest 0 -Data 0 -Ack 0 +Load 1053 +Ifetch 6886 +Store 934 +Data 1438 +Fwd_GETX 0 +Inv 0 +Replacement 1434 +Writeback_Ack 1434 +Writeback_Nack 0 - Transitions - -READY ReadRequest 0 <-- -READY WriteRequest 0 <-- +I Load 532 +I Ifetch 638 +I Store 268 +I Inv 0 <-- +I Replacement 0 <-- -BUSY_RD Data 0 <-- +II Writeback_Nack 0 <-- -BUSY_WR Ack 0 <-- +M Load 521 +M Ifetch 6248 +M Store 666 +M Fwd_GETX 0 <-- +M Inv 0 <-- +M Replacement 1434 + +MI Fwd_GETX 0 <-- +MI Inv 0 <-- +MI Writeback_Ack 1434 + +IS Data 1170 + +IM Data 268 + +Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer: + memory_total_requests: 2872 + memory_reads: 1438 + memory_writes: 1434 + memory_refreshes: 599 + memory_total_request_delays: 3924 + memory_delays_per_request: 1.3663 + memory_delays_in_input_queue: 1431 + memory_delays_behind_head_of_bank_queue: 7 + memory_delays_stalled_at_head_of_bank_queue: 2486 + memory_stalls_for_bank_busy: 841 + memory_stalls_for_random_busy: 0 + memory_stalls_for_anti_starvation: 0 + memory_stalls_for_arbitration: 109 + memory_stalls_for_bus: 1466 + memory_stalls_for_tfaw: 0 + memory_stalls_for_read_write_turnaround: 70 + memory_stalls_for_read_read_turnaround: 0 + accesses_per_bank: 162 142 210 172 216 84 102 44 22 20 146 276 148 116 62 30 84 8 8 14 116 56 12 60 34 58 82 64 44 122 104 54 --- Directory 0 --- - Event Counts - -GETX 557 +GETX 1438 GETS 0 -PUTX 525 +PUTX 1434 PUTX_NotOwner 0 DMA_READ 0 DMA_WRITE 0 -Memory_Data 557 -Memory_Ack 525 +Memory_Data 1438 +Memory_Ack 1434 - Transitions - -I GETX 557 +I GETX 1438 I PUTX_NotOwner 0 <-- I DMA_READ 0 <-- I DMA_WRITE 0 <-- M GETX 0 <-- -M PUTX 525 +M PUTX 1434 M PUTX_NotOwner 0 <-- M DMA_READ 0 <-- M DMA_WRITE 0 <-- @@ -312,15 +262,19 @@ M_DRD PUTX 0 <-- M_DWR GETX 0 <-- M_DWR PUTX 0 <-- +M_DWRI GETX 0 <-- M_DWRI Memory_Ack 0 <-- +M_DRDI GETX 0 <-- +M_DRDI Memory_Ack 0 <-- + IM GETX 0 <-- IM GETS 0 <-- IM PUTX 0 <-- IM PUTX_NotOwner 0 <-- IM DMA_READ 0 <-- IM DMA_WRITE 0 <-- -IM Memory_Data 557 +IM Memory_Data 1438 MI GETX 0 <-- MI GETS 0 <-- @@ -328,7 +282,7 @@ MI PUTX 0 <-- MI PUTX_NotOwner 0 <-- MI DMA_READ 0 <-- MI DMA_WRITE 0 <-- -MI Memory_Ack 525 +MI Memory_Ack 1434 ID GETX 0 <-- ID GETS 0 <-- @@ -346,39 +300,3 @@ ID_W DMA_READ 0 <-- ID_W DMA_WRITE 0 <-- ID_W Memory_Ack 0 <-- - --- L1Cache 0 --- - - Event Counts - -Load 1053 -Ifetch 6886 -Store 934 -Data 557 -Fwd_GETX 0 -Inv 0 -Replacement 525 -Writeback_Ack 525 -Writeback_Nack 0 - - - Transitions - -I Load 140 -I Ifetch 320 -I Store 97 -I Inv 0 <-- -I Replacement 0 <-- - -II Writeback_Nack 0 <-- - -M Load 913 -M Ifetch 6566 -M Store 837 -M Fwd_GETX 0 <-- -M Inv 0 <-- -M Replacement 525 - -MI Fwd_GETX 0 <-- -MI Inv 0 <-- -MI Writeback_Ack 525 - -IS Data 460 - -IM Data 97 - diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr index dba65c3fc..94d399eab 100755 --- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr +++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr @@ -1,7 +1,3 @@ -["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "1", "-m", "1", "-s", "1024"] -Error: User specified set of debug components, but the RUBY_DEBUG compile-time flag is false. -Solution: Re-compile with RUBY_DEBUG set to true. -print config: 1 warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 warn: instruction 'fnstcw_Mw' unimplemented diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout index e450b1234..3b6c0e88e 100755 --- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout +++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout @@ -5,12 +5,12 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Aug 9 2009 04:00:16 -M5 revision 33faa9915d16+ 6486+ default tip -M5 started Aug 9 2009 04:00:18 -M5 executing on tater -command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-timing-ruby -Global frequency set at 1000000000000 ticks per second +M5 compiled Jan 21 2010 12:13:38 +M5 revision a2fac757fb31+ 6860+ default qtip brad/rubycfg_orion_update tip +M5 started Jan 21 2010 12:14:46 +M5 executing on svvint07 +command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing-ruby +Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Hello world! -Exiting @ tick 26617000 because target called exit() +Exiting @ tick 287334 because target called exit() diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt index f970da101..5547fdfa4 100644 --- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt @@ -1,16 +1,16 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 2962 # Simulator instruction rate (inst/s) -host_mem_usage 1384872 # Number of bytes of host memory used -host_seconds 3.21 # Real time elapsed on the host -host_tick_rate 8282962 # Simulator tick rate (ticks/s) -sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 52882 # Simulator instruction rate (inst/s) +host_mem_usage 349184 # Number of bytes of host memory used +host_seconds 0.18 # Real time elapsed on the host +host_tick_rate 1596256 # Simulator tick rate (ticks/s) +sim_freq 1000000000 # Frequency of simulated ticks sim_insts 9519 # Number of instructions simulated -sim_seconds 0.000027 # Number of seconds simulated -sim_ticks 26617000 # Number of ticks simulated +sim_seconds 0.000287 # Number of seconds simulated +sim_ticks 287334 # Number of ticks simulated system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles -system.cpu.numCycles 53234 # number of cpu cycles simulated +system.cpu.numCycles 287334 # number of cpu cycles simulated system.cpu.num_insts 9519 # Number of instructions executed system.cpu.num_refs 1987 # Number of memory references system.cpu.workload.PROG:num_syscalls 11 # Number of system calls |