tests: update reference config.ini files for previous cset

Rename 'responder_set' to 'use_default_range'.

18 files changed, 29 insertions, 29 deletions

diff --git a/tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini b/tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini
index 474a0cfef..f516c45fc 100644
--- a/tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini
@@ -176,7 +176,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -208,7 +208,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini b/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
index 409d22ab8..173f18915 100644
--- a/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
index a69256420..d867b793e 100644
--- a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
index 9b07b770c..b9c9ec747 100644
--- a/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
index 73089a2aa..9f8bdfba9 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
index c65c23354..e4650467f 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
index f316dec65..ab47c5c67 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini
index 70fb598b9..e0fa83d1c 100644
--- a/tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
diff --git a/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini
index 0aa4f38a5..8312243a4 100644
--- a/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini
@@ -230,7 +230,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -262,7 +262,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini
index a56ef0667..3aa7b893f 100644
--- a/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini
@@ -397,7 +397,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -429,7 +429,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
index 0e0904624..6242699da 100644
--- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
@@ -128,7 +128,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
index aecf3d2c5..b04189060 100644
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
@@ -196,7 +196,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -228,7 +228,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini b/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
index 5fbc0ed64..e69547764 100644
--- a/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/power/linux/o3-timing/config.ini
@@ -344,7 +344,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -376,7 +376,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
index 930fa65ed..1ef6f51da 100644
--- a/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini
@@ -75,7 +75,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
index 7b5adc160..de14f79c7 100644
--- a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
index 8f9e543cc..d91ebcc59 100644
--- a/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 
diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
index 911046b97..99edb8037 100644
--- a/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini
index db5e719f3..2d6c6d0ac 100644
--- a/tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini
@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side