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author | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-06 15:57:28 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-03-06 15:57:28 -0500 |
commit | 5b1970d1a3c82f72c2e722e53ba320308f969335 (patch) | |
tree | c6037c3026ebf1478e5d33fe85696688a1fc3851 /tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out | |
parent | a81143f06a1ba32839b26f38ddbad8753f93b9cd (diff) | |
download | gem5-5b1970d1a3c82f72c2e722e53ba320308f969335.tar.xz |
Add regression for SPARC "hard" instruction test. Only runs in simple-atomic right now since we don't have cache support for
the atomic instructions.
--HG--
extra : convert_revision : b7013e6963885dfe2b4630ac175e24ddad6d42a6
Diffstat (limited to 'tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out')
-rw-r--r-- | tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out new file mode 100644 index 000000000..392fec336 --- /dev/null +++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out @@ -0,0 +1,60 @@ +[root] +type=Root +clock=1000000000000 +max_tick=0 +progress_interval=0 +output_file=cout + +[system.physmem] +type=PhysicalMemory +file= +range=[0,134217727] +latency=1 +zero=false + +[system] +type=System +physmem=system.physmem +mem_mode=atomic + +[system.membus] +type=Bus +bus_id=0 +clock=1000 +width=64 +responder_set=false + +[system.cpu.workload] +type=LiveProcess +cmd=insttest +executable=tests/test-progs/insttest/bin/sparc/linux/insttest +input=cin +output=cout +env= +cwd= +system=system +uid=100 +euid=100 +gid=100 +egid=100 +pid=100 +ppid=99 + +[system.cpu] +type=AtomicSimpleCPU +max_insts_any_thread=0 +max_insts_all_threads=0 +max_loads_any_thread=0 +max_loads_all_threads=0 +progress_interval=0 +system=system +cpu_id=0 +workload=system.cpu.workload +clock=1 +phase=0 +defer_registration=false +width=1 +function_trace=false +function_trace_start=0 +simulate_stalls=false + |