diff options
author | Nathan Binkert <nate@binkert.org> | 2008-07-22 17:00:18 -0400 |
---|---|---|
committer | Nathan Binkert <nate@binkert.org> | 2008-07-22 17:00:18 -0400 |
commit | a8df952dd38cb686c6a795480630649aa51fd894 (patch) | |
tree | 380126490f459a4bef6a485cbda2b8efa4ae085e /tests/quick/02.insttest/ref | |
parent | aa2bb4f7b9ec571a4430da25173fbb76d1b0c8bb (diff) | |
download | gem5-a8df952dd38cb686c6a795480630649aa51fd894.tar.xz |
tests: update config.ini and stdout for the various tests.
These files were a bit too out of date and resulted in a bit of confusion.
Diffstat (limited to 'tests/quick/02.insttest/ref')
6 files changed, 54 insertions, 37 deletions
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini index c6ceaa121..e981744fd 100644 --- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini +++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini @@ -376,6 +376,7 @@ max_stack_size=67108864 output=cout pid=100 ppid=99 +simpoint=0 system=system uid=100 @@ -393,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side type=PhysicalMemory file= latency=1 +latency_var=0 +null=false range=0:134217727 zero=false port=system.membus.port[0] diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout index ee061a6c6..e6fab5604 100644 --- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout +++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout @@ -1,3 +1,17 @@ +M5 Simulator System + +Copyright (c) 2001-2008 +The Regents of The University of Michigan +All Rights Reserved + + +M5 compiled Jul 21 2008 20:33:06 +M5 started Mon Jul 21 20:33:19 2008 +M5 executing on zizzer +M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881 +M5 commit date Tue Jul 15 14:38:51 2008 -0400 +command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing tests/run.py quick/02.insttest/sparc/linux/o3-timing +Global frequency set at 1000000000000 ticks per second Begining test of difficult SPARC instructions... LDSTUB: Passed SWAP: Passed @@ -9,16 +23,4 @@ LDTX: Passed LDTW: Passed STTW: Passed Done -M5 Simulator System - -Copyright (c) 2001-2008 -The Regents of The University of Michigan -All Rights Reserved - - -M5 compiled Feb 27 2008 17:54:12 -M5 started Wed Feb 27 18:07:27 2008 -M5 executing on zizzer -command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing tests/run.py quick/02.insttest/sparc/linux/o3-timing -Global frequency set at 1000000000000 ticks per second Exiting @ tick 15392500 because target called exit() diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini index a1a3cadc4..ba8f324ab 100644 --- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini +++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini @@ -25,7 +25,8 @@ max_loads_all_threads=0 max_loads_any_thread=0 phase=0 progress_interval=0 -simulate_stalls=false +simulate_data_stalls=false +simulate_inst_stalls=false system=system tracer=system.cpu.tracer width=1 @@ -58,6 +59,7 @@ max_stack_size=67108864 output=cout pid=100 ppid=99 +simpoint=0 system=system uid=100 @@ -66,6 +68,7 @@ type=Bus block_size=64 bus_id=0 clock=1000 +header_cycles=1 responder_set=false width=64 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port @@ -74,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port type=PhysicalMemory file= latency=1 +latency_var=0 +null=false range=0:134217727 zero=false port=system.membus.port[0] diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout index c0bb8f23f..6632a0f07 100644 --- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout +++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout @@ -1,3 +1,17 @@ +M5 Simulator System + +Copyright (c) 2001-2008 +The Regents of The University of Michigan +All Rights Reserved + + +M5 compiled Jul 21 2008 20:33:06 +M5 started Mon Jul 21 20:33:18 2008 +M5 executing on zizzer +M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881 +M5 commit date Tue Jul 15 14:38:51 2008 -0400 +command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic tests/run.py quick/02.insttest/sparc/linux/simple-atomic +Global frequency set at 1000000000000 ticks per second Begining test of difficult SPARC instructions... LDSTUB: Passed SWAP: Passed @@ -9,16 +23,4 @@ LDTX: Passed LDTW: Passed STTW: Passed Done -M5 Simulator System - -Copyright (c) 2001-2006 -The Regents of The University of Michigan -All Rights Reserved - - -M5 compiled Nov 28 2007 18:29:37 -M5 started Wed Nov 28 18:29:38 2007 -M5 executing on nacho -command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic tests/run.py quick/02.insttest/sparc/linux/simple-atomic -Global frequency set at 1000000000000 ticks per second Exiting @ tick 5514000 because target called exit() diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini index f4a82a8e3..fa313ad0d 100644 --- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini +++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini @@ -174,6 +174,7 @@ max_stack_size=67108864 output=cout pid=100 ppid=99 +simpoint=0 system=system uid=100 @@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side type=PhysicalMemory file= latency=1 +latency_var=0 +null=false range=0:134217727 zero=false port=system.membus.port[0] diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout index a0c51dd80..e7f5d2afa 100644 --- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout +++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout @@ -1,3 +1,17 @@ +M5 Simulator System + +Copyright (c) 2001-2008 +The Regents of The University of Michigan +All Rights Reserved + + +M5 compiled Jul 21 2008 20:33:06 +M5 started Mon Jul 21 20:33:19 2008 +M5 executing on zizzer +M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881 +M5 commit date Tue Jul 15 14:38:51 2008 -0400 +command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing tests/run.py quick/02.insttest/sparc/linux/simple-timing +Global frequency set at 1000000000000 ticks per second Begining test of difficult SPARC instructions... LDSTUB: Passed SWAP: Passed @@ -9,16 +23,4 @@ LDTX: Passed LDTW: Passed STTW: Passed Done -M5 Simulator System - -Copyright (c) 2001-2008 -The Regents of The University of Michigan -All Rights Reserved - - -M5 compiled Feb 24 2008 13:27:50 -M5 started Mon Feb 25 12:26:21 2008 -M5 executing on tater -command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing tests/run.py quick/02.insttest/sparc/linux/simple-timing -Global frequency set at 1000000000000 ticks per second Exiting @ tick 25237000 because target called exit() |