Merge with the main repo.

--HG--
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh

14 files changed, 98 insertions, 59 deletions

diff --git a/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/config.ini
index 7ee142626..7db48bf0e 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/config.ini
@@ -10,6 +10,7 @@ type=System
 children=cpu membus physmem
 mem_mode=atomic
 memories=system.physmem
+num_work_ids=16
 physmem=system.physmem
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
+system_port=system.membus.port[0]
 
 [system.cpu]
 type=InOrderCPU
@@ -182,7 +184,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
 
 [system.cpu.toL2Bus]
 type=Bus
@@ -205,7 +207,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/arm/scratch/sysexplr/dist/test-progs/insttest/bin/sparc/linux/insttest
+executable=/dist/m5/regression/test-progs/insttest/bin/sparc/linux/insttest
 gid=100
 input=cin
 max_stack_size=67108864
@@ -224,7 +226,7 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
 
 [system.physmem]
 type=PhysicalMemory
@@ -234,5 +236,5 @@ latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
 
diff --git a/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simout b/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simout
index 64331370b..38fdee473 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simout
+++ b/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simout
@@ -1,9 +1,9 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul  9 2011 14:58:11
-gem5 started Jul  9 2011 15:02:19
-gem5 executing on nadc-0321
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 04:24:21
+gem5 executing on zizzer
 command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/inorder-timing -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/inorder-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/stats.txt b/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/stats.txt
index 10d7a8655..7b0904682 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/inorder-timing/stats.txt
@@ -2,12 +2,22 @@
 ---------- Begin Simulation Statistics ----------
 sim_seconds                                  0.000025                       # Number of seconds simulated
 sim_ticks                                    25058500                       # Number of ticks simulated
+final_tick                                   25058500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                  66853                       # Simulator instruction rate (inst/s)
-host_tick_rate                              110387436                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 249432                       # Number of bytes of host memory used
-host_seconds                                     0.23                       # Real time elapsed on the host
+host_inst_rate                                  55020                       # Simulator instruction rate (inst/s)
+host_tick_rate                               90849063                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 212976                       # Number of bytes of host memory used
+host_seconds                                     0.28                       # Real time elapsed on the host
 sim_insts                                       15175                       # Number of instructions simulated
+system.physmem.bytes_read                       27904                       # Number of bytes read from this memory
+system.physmem.bytes_inst_read                  19072                       # Number of instructions bytes read from this memory
+system.physmem.bytes_written                        0                       # Number of bytes written to this memory
+system.physmem.num_reads                          436                       # Number of read requests responded to by this memory
+system.physmem.num_writes                           0                       # Number of write requests responded to by this memory
+system.physmem.num_other                            0                       # Number of other requests responded to by this memory
+system.physmem.bw_read                     1113554283                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read                 761099028                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_total                    1113554283                       # Total bandwidth to/from this memory (bytes/s)
 system.cpu.workload.num_syscalls                   18                       # Number of system calls
 system.cpu.numCycles                            50118                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
index 6736c2ed4..6652fe60b 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
@@ -10,6 +10,7 @@ type=System
 children=cpu membus physmem
 mem_mode=atomic
 memories=system.physmem
+num_work_ids=16
 physmem=system.physmem
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
+system_port=system.membus.port[0]
 
 [system.cpu]
 type=DerivO3CPU
@@ -477,7 +479,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
 
 [system.cpu.toL2Bus]
 type=Bus
@@ -519,7 +521,7 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
 
 [system.physmem]
 type=PhysicalMemory
@@ -529,5 +531,5 @@ latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
 
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout
index bc80135e3..14970f00a 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout
@@ -1,10 +1,8 @@
-Redirecting stdout to build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing/simout
-Redirecting stderr to build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Aug 20 2011 13:07:22
-gem5 started Aug 20 2011 13:07:32
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 04:24:22
 gem5 executing on zizzer
 command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing
 Global frequency set at 1000000000000 ticks per second
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt
index ea9aaaf42..3a1cfc4e9 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt
@@ -2,12 +2,22 @@
 ---------- Begin Simulation Statistics ----------
 sim_seconds                                  0.000018                       # Number of seconds simulated
 sim_ticks                                    18114000                       # Number of ticks simulated
+final_tick                                   18114000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                   2357                       # Simulator instruction rate (inst/s)
-host_tick_rate                                2955469                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 210004                       # Number of bytes of host memory used
-host_seconds                                     6.13                       # Real time elapsed on the host
+host_inst_rate                                  74785                       # Simulator instruction rate (inst/s)
+host_tick_rate                               93746300                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 213808                       # Number of bytes of host memory used
+host_seconds                                     0.19                       # Real time elapsed on the host
 sim_insts                                       14449                       # Number of instructions simulated
+system.physmem.bytes_read                       30464                       # Number of bytes read from this memory
+system.physmem.bytes_inst_read                  21120                       # Number of instructions bytes read from this memory
+system.physmem.bytes_written                        0                       # Number of bytes written to this memory
+system.physmem.num_reads                          476                       # Number of read requests responded to by this memory
+system.physmem.num_writes                           0                       # Number of write requests responded to by this memory
+system.physmem.num_other                            0                       # Number of other requests responded to by this memory
+system.physmem.bw_read                     1681793088                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read                1165948990                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_total                    1681793088                       # Total bandwidth to/from this memory (bytes/s)
 system.cpu.workload.num_syscalls                   18                       # Number of system calls
 system.cpu.numCycles                            36229                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
index 15ddd6551..421dd8a46 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
@@ -9,6 +9,8 @@ time_sync_spin_threshold=100000000
 type=System
 children=cpu membus physmem
 mem_mode=atomic
+memories=system.physmem
+num_work_ids=16
 physmem=system.physmem
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
@@ -17,6 +19,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
+system_port=system.membus.port[0]
 
 [system.cpu]
 type=AtomicSimpleCPU
@@ -44,8 +47,8 @@ system=system
 tracer=system.cpu.tracer
 width=1
 workload=system.cpu.workload
-dcache_port=system.membus.port[2]
-icache_port=system.membus.port[1]
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
 
 [system.cpu.dtb]
 type=SparcTLB
@@ -85,7 +88,7 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 
 [system.physmem]
 type=PhysicalMemory
@@ -95,5 +98,5 @@ latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
 
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr
index eabe42249..e45cd058f 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr
@@ -1,3 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-For more information see: http://www.m5sim.org/warn/d946bea6
 hack: be nice to actually delete the event here
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout
index c90052363..df7964c68 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout
@@ -1,14 +1,10 @@
-M5 Simulator System
+gem5 Simulator System.  http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
 
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Apr 19 2011 12:19:46
-M5 started Apr 19 2011 12:21:33
-M5 executing on maize
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 04:24:24
+gem5 executing on zizzer
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Begining test of difficult SPARC instructions...
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
index 070242574..389636d62 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
@@ -2,12 +2,23 @@
 ---------- Begin Simulation Statistics ----------
 sim_seconds                                  0.000008                       # Number of seconds simulated
 sim_ticks                                     7618500                       # Number of ticks simulated
+final_tick                                    7618500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 391175                       # Simulator instruction rate (inst/s)
-host_tick_rate                              196252250                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 216204                       # Number of bytes of host memory used
-host_seconds                                     0.04                       # Real time elapsed on the host
+host_inst_rate                                 296178                       # Simulator instruction rate (inst/s)
+host_tick_rate                              148615294                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 203776                       # Number of bytes of host memory used
+host_seconds                                     0.05                       # Real time elapsed on the host
 sim_insts                                       15175                       # Number of instructions simulated
+system.physmem.bytes_read                       72223                       # Number of bytes read from this memory
+system.physmem.bytes_inst_read                  60880                       # Number of instructions bytes read from this memory
+system.physmem.bytes_written                     9042                       # Number of bytes written to this memory
+system.physmem.num_reads                        17446                       # Number of read requests responded to by this memory
+system.physmem.num_writes                        1442                       # Number of write requests responded to by this memory
+system.physmem.num_other                            6                       # Number of other requests responded to by this memory
+system.physmem.bw_read                     9479950121                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read                7991074358                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write                    1186847805                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total                   10666797926                       # Total bandwidth to/from this memory (bytes/s)
 system.cpu.workload.num_syscalls                   18                       # Number of system calls
 system.cpu.numCycles                            15238                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
index e5ac7d1dd..fb5a1cb83 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
@@ -9,6 +9,8 @@ time_sync_spin_threshold=100000000
 type=System
 children=cpu membus physmem
 mem_mode=atomic
+memories=system.physmem
+num_work_ids=16
 physmem=system.physmem
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
@@ -17,6 +19,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
+system_port=system.membus.port[0]
 
 [system.cpu]
 type=TimingSimpleCPU
@@ -146,7 +149,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
 
 [system.cpu.toL2Bus]
 type=Bus
@@ -188,7 +191,7 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
 
 [system.physmem]
 type=PhysicalMemory
@@ -198,5 +201,5 @@ latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
 
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr
index eabe42249..e45cd058f 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr
@@ -1,3 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-For more information see: http://www.m5sim.org/warn/d946bea6
 hack: be nice to actually delete the event here
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout
index 8aa153829..d982745c0 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout
@@ -1,14 +1,10 @@
-M5 Simulator System
+gem5 Simulator System.  http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
 
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Apr 19 2011 12:19:46
-M5 started Apr 19 2011 12:20:31
-M5 executing on maize
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 04:24:28
+gem5 executing on zizzer
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Begining test of difficult SPARC instructions...
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt
index ad7479276..f52890637 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt
@@ -2,12 +2,22 @@
 ---------- Begin Simulation Statistics ----------
 sim_seconds                                  0.000042                       # Number of seconds simulated
 sim_ticks                                    41800000                       # Number of ticks simulated
+final_tick                                   41800000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 434801                       # Simulator instruction rate (inst/s)
-host_tick_rate                             1196840935                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 225108                       # Number of bytes of host memory used
-host_seconds                                     0.04                       # Real time elapsed on the host
+host_inst_rate                                 146106                       # Simulator instruction rate (inst/s)
+host_tick_rate                              402347608                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 212484                       # Number of bytes of host memory used
+host_seconds                                     0.10                       # Real time elapsed on the host
 sim_insts                                       15175                       # Number of instructions simulated
+system.physmem.bytes_read                       26624                       # Number of bytes read from this memory
+system.physmem.bytes_inst_read                  17792                       # Number of instructions bytes read from this memory
+system.physmem.bytes_written                        0                       # Number of bytes written to this memory
+system.physmem.num_reads                          416                       # Number of read requests responded to by this memory
+system.physmem.num_writes                           0                       # Number of write requests responded to by this memory
+system.physmem.num_other                            0                       # Number of other requests responded to by this memory
+system.physmem.bw_read                      636937799                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read                 425645933                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_total                     636937799                       # Total bandwidth to/from this memory (bytes/s)
 system.cpu.workload.num_syscalls                   18                       # Number of system calls
 system.cpu.numCycles                            83600                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started