O3: Update stats for new ordering fix.

3 files changed, 13 insertions, 10 deletions

diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
index 9574fc9f3..6736c2ed4 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
@@ -102,6 +102,7 @@ smtNumFetchingThreads=1
 smtROBPolicy=Partitioned
 smtROBThreshold=100
 squashWidth=8
+store_set_clear_period=250000
 system=system
 tracer=system.cpu.tracer
 trapLatency=13
@@ -499,7 +500,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/chips/pd/randd/dist/test-progs/insttest/bin/sparc/linux/insttest
+executable=/dist/m5/regression/test-progs/insttest/bin/sparc/linux/insttest
 gid=100
 input=cin
 max_stack_size=67108864
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout
index 8de42a2d1..bc80135e3 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout
@@ -1,9 +1,11 @@
+Redirecting stdout to build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing/simout
+Redirecting stderr to build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 15 2011 17:51:42
-gem5 started Jul 15 2011 20:49:40
-gem5 executing on u200439-lin.austin.arm.com
+gem5 compiled Aug 20 2011 13:07:22
+gem5 started Aug 20 2011 13:07:32
+gem5 executing on zizzer
 command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt
index 44f3bc0f0..ea9aaaf42 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt
@@ -3,10 +3,10 @@
 sim_seconds                                  0.000018                       # Number of seconds simulated
 sim_ticks                                    18114000                       # Number of ticks simulated
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                  40525                       # Simulator instruction rate (inst/s)
-host_tick_rate                               50798832                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 250076                       # Number of bytes of host memory used
-host_seconds                                     0.36                       # Real time elapsed on the host
+host_inst_rate                                   2357                       # Simulator instruction rate (inst/s)
+host_tick_rate                                2955469                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 210004                       # Number of bytes of host memory used
+host_seconds                                     6.13                       # Real time elapsed on the host
 sim_insts                                       14449                       # Number of instructions simulated
 system.cpu.workload.num_syscalls                   18                       # Number of system calls
 system.cpu.numCycles                            36229                       # number of cpu cycles simulated
@@ -185,7 +185,7 @@ system.cpu.iew.lsq.thread0.forwLoads               26                       # Nu
 system.cpu.iew.lsq.thread0.invAddrLoads             0                       # Number of loads ignored due to an invalid address
 system.cpu.iew.lsq.thread0.squashedLoads          888                       # Number of loads squashed
 system.cpu.iew.lsq.thread0.ignoredResponses            2                       # Number of memory responses ignored because the instruction is squashed
-system.cpu.iew.lsq.thread0.memOrderViolation           28                       # Number of memory ordering violations
+system.cpu.iew.lsq.thread0.memOrderViolation           27                       # Number of memory ordering violations
 system.cpu.iew.lsq.thread0.squashedStores          528                       # Number of stores squashed
 system.cpu.iew.lsq.thread0.invAddrSwpfs             0                       # Number of software prefetches ignored due to an invalid address
 system.cpu.iew.lsq.thread0.blockedLoads             0                       # Number of blocked loads due to partial load-store forwarding
@@ -202,7 +202,7 @@ system.cpu.iew.iewDispStoreInsts                 1976                       # Nu
 system.cpu.iew.iewDispNonSpecInsts                615                       # Number of dispatched non-speculative instructions
 system.cpu.iew.iewIQFullEvents                      2                       # Number of times the IQ has become full, causing a stall
 system.cpu.iew.iewLSQFullEvents                     0                       # Number of times the LSQ has become full, causing a stall
-system.cpu.iew.memOrderViolationEvents             28                       # Number of memory order violations
+system.cpu.iew.memOrderViolationEvents             27                       # Number of memory order violations
 system.cpu.iew.predictedTakenIncorrect            371                       # Number of branches that were predicted taken incorrectly
 system.cpu.iew.predictedNotTakenIncorrect          573                       # Number of branches that were predicted not taken incorrectly
 system.cpu.iew.branchMispredicts                  944                       # Number of branch mispredicts detected at execute