Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.

11 files changed, 32 insertions, 47 deletions

diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
index 6ee9f16a8..b0fb0c129 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
@@ -104,7 +104,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -122,8 +121,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=262144
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=20
 trace_addr=0
@@ -281,7 +278,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -299,8 +295,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=131072
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=20
 trace_addr=0
@@ -321,7 +315,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -339,8 +332,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=2097152
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt
index f90003dbb..d80957aed 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt
@@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect                   2923                       # Nu
 global.BPredUnit.condPredicted                  11413                       # Number of conditional branches predicted
 global.BPredUnit.lookups                        11413                       # Number of BP lookups
 global.BPredUnit.usedRAS                            0                       # Number of times the RAS was used to get a target.
-host_inst_rate                                  50656                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 199212                       # Number of bytes of host memory used
-host_seconds                                     0.29                       # Real time elapsed on the host
-host_tick_rate                               97240761                       # Simulator tick rate (ticks/s)
+host_inst_rate                                  55497                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 199732                       # Number of bytes of host memory used
+host_seconds                                     0.26                       # Real time elapsed on the host
+host_tick_rate                              106451563                       # Simulator tick rate (ticks/s)
 memdepunit.memDep.conflictingLoads                 26                       # Number of conflicting loads.
 memdepunit.memDep.conflictingStores                 0                       # Number of conflicting stores.
 memdepunit.memDep.insertedLoads                  4960                       # Number of loads inserted to the mem dependence unit.
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr
index 0598945b4..ee69ae99e 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr
@@ -1,2 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
+warn: be nice to actually delete the event here
diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
index ba74f1637..1f6eb4b07 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
@@ -5,13 +5,14 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:21:24
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:32:53
-M5 executing on piton
+M5 compiled Nov  5 2008 22:40:47
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:43:55
+M5 executing on zizzer
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing -re --stdout-file stdout --stderr-file stderr tests/run.py quick/02.insttest/sparc/linux/o3-timing
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Begining test of difficult SPARC instructions...
 LDSTUB:		Passed
 SWAP:		Passed
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt
index 8d9b3b609..fa5cbc97a 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                  15225                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 202592                       # Number of bytes of host memory used
-host_seconds                                     1.00                       # Real time elapsed on the host
-host_tick_rate                                7641899                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 641188                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 191520                       # Number of bytes of host memory used
+host_seconds                                     0.02                       # Real time elapsed on the host
+host_tick_rate                              319099476                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                       15175                       # Number of instructions simulated
 sim_seconds                                  0.000008                       # Number of seconds simulated
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr
index 0598945b4..ee69ae99e 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr
@@ -1,2 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
+warn: be nice to actually delete the event here
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout
index 777898779..7103e96c6 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout
@@ -5,13 +5,14 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:21:24
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:32:54
-M5 executing on piton
+M5 compiled Nov  5 2008 22:40:47
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:43:56
+M5 executing on zizzer
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic -re --stdout-file stdout --stderr-file stderr tests/run.py quick/02.insttest/sparc/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Begining test of difficult SPARC instructions...
 LDSTUB:		Passed
 SWAP:		Passed
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
index 7773c920e..35e384fb9 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
@@ -40,7 +40,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -58,8 +57,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=262144
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
@@ -80,7 +77,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -98,8 +94,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=131072
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
@@ -120,7 +114,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=10000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -138,8 +131,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=2097152
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt
index 42336245f..f45ffd986 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 494493                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 198556                       # Number of bytes of host memory used
+host_inst_rate                                 494848                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 199068                       # Number of bytes of host memory used
 host_seconds                                     0.03                       # Real time elapsed on the host
-host_tick_rate                             1381087807                       # Simulator tick rate (ticks/s)
+host_tick_rate                             1383502218                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                       15175                       # Number of instructions simulated
 sim_seconds                                  0.000043                       # Number of seconds simulated
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr
index 0598945b4..ee69ae99e 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr
@@ -1,2 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
+warn: be nice to actually delete the event here
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
index 1426e329d..796520389 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
@@ -5,13 +5,14 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:21:24
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:32:54
-M5 executing on piton
+M5 compiled Nov  5 2008 22:40:47
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:43:56
+M5 executing on zizzer
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing -re --stdout-file stdout --stderr-file stderr tests/run.py quick/02.insttest/sparc/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Begining test of difficult SPARC instructions...
 LDSTUB:		Passed
 SWAP:		Passed