update all the regresstion tests for release

--HG--
extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2

1 files changed, 304 insertions, 52 deletions

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
index 8145ecdc4..6e38281a1 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
@@ -5,8 +5,8 @@ dummy=0
 
 [system]
 type=LinuxAlphaSystem
-children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus membus physmem sim_console simple_disk tsunami
-boot_cpu_frequency=1
+children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus l2c membus physmem sim_console simple_disk toL2Bus tsunami
+boot_cpu_frequency=500
 boot_osflags=root=/dev/hda1 console=ttyS0
 console=/dist/m5/system/binaries/console
 init_param=0
@@ -21,17 +21,22 @@ system_type=34
 
 [system.bridge]
 type=Bridge
-delay=0
-queue_size_a=16
-queue_size_b=16
+delay=50000
+fix_partial_write_a=false
+fix_partial_write_b=true
+nack_delay=4000
+req_size_a=16
+req_size_b=16
+resp_size_a=16
+resp_size_b=16
 write_ack=false
 side_a=system.iobus.port[0]
 side_b=system.membus.port[0]
 
 [system.cpu0]
 type=AtomicSimpleCPU
-children=dtb itb
-clock=1
+children=dcache dtb icache itb
+clock=500
 cpu_id=0
 defer_registration=false
 do_checkpoint_insts=true
@@ -51,21 +56,109 @@ progress_interval=0
 simulate_stalls=false
 system=system
 width=1
-dcache_port=system.membus.port[3]
-icache_port=system.membus.port[2]
+dcache_port=system.cpu0.dcache.cpu_side
+icache_port=system.cpu0.icache.cpu_side
+
+[system.cpu0.dcache]
+type=BaseCache
+children=protocol
+adaptive_compression=false
+assoc=4
+block_size=64
+compressed_bus=false
+compression_latency=0
+hash_delay=1
+latency=1000
+lifo=false
+max_miss_count=0
+mshrs=4
+prefetch_access=false
+prefetch_cache_check_push=true
+prefetch_data_accesses_only=false
+prefetch_degree=1
+prefetch_latency=10
+prefetch_miss=false
+prefetch_past_page=false
+prefetch_policy=none
+prefetch_serial_squash=false
+prefetch_use_cpu_id=true
+prefetcher_size=100
+prioritizeRequests=false
+protocol=system.cpu0.dcache.protocol
+repl=Null
+size=32768
+split=false
+split_size=0
+store_compressed=false
+subblock_size=0
+tgts_per_mshr=8
+trace_addr=0
+two_queue=false
+write_buffers=8
+cpu_side=system.cpu0.dcache_port
+mem_side=system.toL2Bus.port[2]
+
+[system.cpu0.dcache.protocol]
+type=CoherenceProtocol
+do_upgrades=true
+protocol=moesi
 
 [system.cpu0.dtb]
 type=AlphaDTB
 size=64
 
+[system.cpu0.icache]
+type=BaseCache
+children=protocol
+adaptive_compression=false
+assoc=1
+block_size=64
+compressed_bus=false
+compression_latency=0
+hash_delay=1
+latency=1000
+lifo=false
+max_miss_count=0
+mshrs=4
+prefetch_access=false
+prefetch_cache_check_push=true
+prefetch_data_accesses_only=false
+prefetch_degree=1
+prefetch_latency=10
+prefetch_miss=false
+prefetch_past_page=false
+prefetch_policy=none
+prefetch_serial_squash=false
+prefetch_use_cpu_id=true
+prefetcher_size=100
+prioritizeRequests=false
+protocol=system.cpu0.icache.protocol
+repl=Null
+size=32768
+split=false
+split_size=0
+store_compressed=false
+subblock_size=0
+tgts_per_mshr=8
+trace_addr=0
+two_queue=false
+write_buffers=8
+cpu_side=system.cpu0.icache_port
+mem_side=system.toL2Bus.port[1]
+
+[system.cpu0.icache.protocol]
+type=CoherenceProtocol
+do_upgrades=true
+protocol=moesi
+
 [system.cpu0.itb]
 type=AlphaITB
 size=48
 
 [system.cpu1]
 type=AtomicSimpleCPU
-children=dtb itb
-clock=1
+children=dcache dtb icache itb
+clock=500
 cpu_id=1
 defer_registration=false
 do_checkpoint_insts=true
@@ -85,13 +178,101 @@ progress_interval=0
 simulate_stalls=false
 system=system
 width=1
-dcache_port=system.membus.port[5]
-icache_port=system.membus.port[4]
+dcache_port=system.cpu1.dcache.cpu_side
+icache_port=system.cpu1.icache.cpu_side
+
+[system.cpu1.dcache]
+type=BaseCache
+children=protocol
+adaptive_compression=false
+assoc=4
+block_size=64
+compressed_bus=false
+compression_latency=0
+hash_delay=1
+latency=1000
+lifo=false
+max_miss_count=0
+mshrs=4
+prefetch_access=false
+prefetch_cache_check_push=true
+prefetch_data_accesses_only=false
+prefetch_degree=1
+prefetch_latency=10
+prefetch_miss=false
+prefetch_past_page=false
+prefetch_policy=none
+prefetch_serial_squash=false
+prefetch_use_cpu_id=true
+prefetcher_size=100
+prioritizeRequests=false
+protocol=system.cpu1.dcache.protocol
+repl=Null
+size=32768
+split=false
+split_size=0
+store_compressed=false
+subblock_size=0
+tgts_per_mshr=8
+trace_addr=0
+two_queue=false
+write_buffers=8
+cpu_side=system.cpu1.dcache_port
+mem_side=system.toL2Bus.port[4]
+
+[system.cpu1.dcache.protocol]
+type=CoherenceProtocol
+do_upgrades=true
+protocol=moesi
 
 [system.cpu1.dtb]
 type=AlphaDTB
 size=64
 
+[system.cpu1.icache]
+type=BaseCache
+children=protocol
+adaptive_compression=false
+assoc=1
+block_size=64
+compressed_bus=false
+compression_latency=0
+hash_delay=1
+latency=1000
+lifo=false
+max_miss_count=0
+mshrs=4
+prefetch_access=false
+prefetch_cache_check_push=true
+prefetch_data_accesses_only=false
+prefetch_degree=1
+prefetch_latency=10
+prefetch_miss=false
+prefetch_past_page=false
+prefetch_policy=none
+prefetch_serial_squash=false
+prefetch_use_cpu_id=true
+prefetcher_size=100
+prioritizeRequests=false
+protocol=system.cpu1.icache.protocol
+repl=Null
+size=32768
+split=false
+split_size=0
+store_compressed=false
+subblock_size=0
+tgts_per_mshr=8
+trace_addr=0
+two_queue=false
+write_buffers=8
+cpu_side=system.cpu1.icache_port
+mem_side=system.toL2Bus.port[3]
+
+[system.cpu1.icache.protocol]
+type=CoherenceProtocol
+do_upgrades=true
+protocol=moesi
+
 [system.cpu1.itb]
 type=AlphaITB
 size=48
@@ -99,7 +280,7 @@ size=48
 [system.disk0]
 type=IdeDisk
 children=image
-delay=2000
+delay=1000000
 driveID=master
 image=system.disk0.image
 
@@ -118,7 +299,7 @@ read_only=true
 [system.disk2]
 type=IdeDisk
 children=image
-delay=2000
+delay=1000000
 driveID=master
 image=system.disk2.image
 
@@ -140,27 +321,67 @@ sys=system
 
 [system.iobus]
 type=Bus
+block_size=64
 bus_id=0
-clock=2
+clock=1000
 responder_set=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.console.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
 
+[system.l2c]
+type=BaseCache
+adaptive_compression=false
+assoc=8
+block_size=64
+compressed_bus=false
+compression_latency=0
+hash_delay=1
+latency=10000
+lifo=false
+max_miss_count=0
+mshrs=92
+prefetch_access=false
+prefetch_cache_check_push=true
+prefetch_data_accesses_only=false
+prefetch_degree=1
+prefetch_latency=10
+prefetch_miss=false
+prefetch_past_page=false
+prefetch_policy=none
+prefetch_serial_squash=false
+prefetch_use_cpu_id=true
+prefetcher_size=100
+prioritizeRequests=false
+protocol=Null
+repl=Null
+size=4194304
+split=false
+split_size=0
+store_compressed=false
+subblock_size=0
+tgts_per_mshr=16
+trace_addr=0
+two_queue=false
+write_buffers=8
+cpu_side=system.toL2Bus.port[0]
+mem_side=system.membus.port[2]
+
 [system.membus]
 type=Bus
 children=responder
+block_size=64
 bus_id=1
-clock=2
+clock=1000
 responder_set=false
 width=64
 default=system.membus.responder.pio
-port=system.bridge.side_b system.physmem.port system.cpu0.icache_port system.cpu0.dcache_port system.cpu1.icache_port system.cpu1.dcache_port
+port=system.bridge.side_b system.physmem.port system.l2c.mem_side
 
 [system.membus.responder]
 type=IsaFake
 pio_addr=0
-pio_latency=0
+pio_latency=1
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=true
@@ -200,6 +421,33 @@ type=RawDiskImage
 image_file=/dist/m5/system/disks/linux-latest.img
 read_only=true
 
+[system.toL2Bus]
+type=Bus
+children=responder
+block_size=64
+bus_id=0
+clock=1000
+responder_set=false
+width=64
+default=system.toL2Bus.responder.pio
+port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
+
+[system.toL2Bus.responder]
+type=IsaFake
+pio_addr=0
+pio_latency=1
+pio_size=8
+platform=system.tsunami
+ret_bad_addr=true
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=system
+update_data=false
+warn_access=
+pio=system.toL2Bus.default
+
 [system.tsunami]
 type=Tsunami
 children=cchip console etherint ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
@@ -209,7 +457,7 @@ system=system
 [system.tsunami.cchip]
 type=TsunamiCChip
 pio_addr=8803072344064
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 system=system
 tsunami=system.tsunami
@@ -220,7 +468,7 @@ type=AlphaConsole
 cpu=system.cpu0
 disk=system.simple_disk
 pio_addr=8804682956800
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 sim_console=system.sim_console
 system=system
@@ -235,7 +483,7 @@ peer=Null
 type=NSGigE
 children=configdata
 clock=0
-config_latency=40
+config_latency=20000
 configdata=system.tsunami.ethernet.configdata
 dma_data_free=false
 dma_desc_free=false
@@ -245,19 +493,21 @@ dma_read_factor=0
 dma_write_delay=0
 dma_write_factor=0
 hardware_address=00:90:00:00:00:01
-intr_delay=20000
+intr_delay=10000000
+max_backoff_delay=10000000
+min_backoff_delay=4000
 pci_bus=0
 pci_dev=1
 pci_func=0
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 rss=false
-rx_delay=2000
+rx_delay=1000000
 rx_fifo_size=524288
 rx_filter=true
 rx_thread=false
 system=system
-tx_delay=2000
+tx_delay=1000000
 tx_fifo_size=524288
 tx_thread=false
 config=system.iobus.port[28]
@@ -302,7 +552,7 @@ VendorID=4107
 [system.tsunami.fake_OROM]
 type=IsaFake
 pio_addr=8796093677568
-pio_latency=2
+pio_latency=1000
 pio_size=393216
 platform=system.tsunami
 ret_bad_addr=false
@@ -318,7 +568,7 @@ pio=system.iobus.port[9]
 [system.tsunami.fake_ata0]
 type=IsaFake
 pio_addr=8804615848432
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -334,7 +584,7 @@ pio=system.iobus.port[20]
 [system.tsunami.fake_ata1]
 type=IsaFake
 pio_addr=8804615848304
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -350,7 +600,7 @@ pio=system.iobus.port[21]
 [system.tsunami.fake_pnp_addr]
 type=IsaFake
 pio_addr=8804615848569
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -366,7 +616,7 @@ pio=system.iobus.port[10]
 [system.tsunami.fake_pnp_read0]
 type=IsaFake
 pio_addr=8804615848451
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -382,7 +632,7 @@ pio=system.iobus.port[12]
 [system.tsunami.fake_pnp_read1]
 type=IsaFake
 pio_addr=8804615848515
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -398,7 +648,7 @@ pio=system.iobus.port[13]
 [system.tsunami.fake_pnp_read2]
 type=IsaFake
 pio_addr=8804615848579
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -414,7 +664,7 @@ pio=system.iobus.port[14]
 [system.tsunami.fake_pnp_read3]
 type=IsaFake
 pio_addr=8804615848643
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -430,7 +680,7 @@ pio=system.iobus.port[15]
 [system.tsunami.fake_pnp_read4]
 type=IsaFake
 pio_addr=8804615848707
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -446,7 +696,7 @@ pio=system.iobus.port[16]
 [system.tsunami.fake_pnp_read5]
 type=IsaFake
 pio_addr=8804615848771
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -462,7 +712,7 @@ pio=system.iobus.port[17]
 [system.tsunami.fake_pnp_read6]
 type=IsaFake
 pio_addr=8804615848835
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -478,7 +728,7 @@ pio=system.iobus.port[18]
 [system.tsunami.fake_pnp_read7]
 type=IsaFake
 pio_addr=8804615848899
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -494,7 +744,7 @@ pio=system.iobus.port[19]
 [system.tsunami.fake_pnp_write]
 type=IsaFake
 pio_addr=8804615850617
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -510,7 +760,7 @@ pio=system.iobus.port[11]
 [system.tsunami.fake_ppc]
 type=IsaFake
 pio_addr=8804615848891
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -526,7 +776,7 @@ pio=system.iobus.port[8]
 [system.tsunami.fake_sm_chip]
 type=IsaFake
 pio_addr=8804615848816
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -542,7 +792,7 @@ pio=system.iobus.port[3]
 [system.tsunami.fake_uart1]
 type=IsaFake
 pio_addr=8804615848696
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -558,7 +808,7 @@ pio=system.iobus.port[4]
 [system.tsunami.fake_uart2]
 type=IsaFake
 pio_addr=8804615848936
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -574,7 +824,7 @@ pio=system.iobus.port[5]
 [system.tsunami.fake_uart3]
 type=IsaFake
 pio_addr=8804615848680
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -590,7 +840,7 @@ pio=system.iobus.port[6]
 [system.tsunami.fake_uart4]
 type=IsaFake
 pio_addr=8804615848944
-pio_latency=2
+pio_latency=1000
 pio_size=8
 platform=system.tsunami
 ret_bad_addr=false
@@ -607,7 +857,7 @@ pio=system.iobus.port[7]
 type=BadDevice
 devicename=FrameBuffer
 pio_addr=8804615848912
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 system=system
 pio=system.iobus.port[22]
@@ -615,13 +865,15 @@ pio=system.iobus.port[22]
 [system.tsunami.ide]
 type=IdeController
 children=configdata
-config_latency=40
+config_latency=20000
 configdata=system.tsunami.ide.configdata
 disks=system.disk0 system.disk2
+max_backoff_delay=10000000
+min_backoff_delay=4000
 pci_bus=0
 pci_dev=0
 pci_func=0
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 system=system
 config=system.iobus.port[30]
@@ -665,9 +917,9 @@ VendorID=32902
 
 [system.tsunami.io]
 type=TsunamiIO
-frequency=1953125
+frequency=976562500
 pio_addr=8804615847936
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 system=system
 time=2009 1 1 0 0 0 3 1
@@ -678,7 +930,7 @@ pio=system.iobus.port[23]
 [system.tsunami.pchip]
 type=TsunamiPChip
 pio_addr=8802535473152
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 system=system
 tsunami=system.tsunami
@@ -696,7 +948,7 @@ pio=system.iobus.default
 [system.tsunami.uart]
 type=Uart8250
 pio_addr=8804615848952
-pio_latency=2
+pio_latency=1000
 platform=system.tsunami
 sim_console=system.sim_console
 system=system