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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:27:53 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:27:53 -0700 |
| commit | a51e2fd8bd581d45f8a87874c9a6680f99d11e24 (patch) | |
| tree | 8de4626b115b234de0962cc04d32e15b6eb0fa3a /tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt | |
| parent | e7e2d5ce9072808d94d5fe399e6c4262d92b7923 (diff) | |
| download | gem5-a51e2fd8bd581d45f8a87874c9a6680f99d11e24.tar.xz | |
Stats: Update the stats.
--HG--
extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
Diffstat (limited to 'tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt')
| -rw-r--r-- | tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt index d9ba4afe5..eabfb44c3 100644 --- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt +++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt @@ -1,11 +1,11 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 2271343 # Simulator instruction rate (inst/s) -host_mem_usage 326380 # Number of bytes of host memory used -host_seconds 27.79 # Real time elapsed on the host -host_tick_rate 67296173797 # Simulator tick rate (ticks/s) +host_inst_rate 2322076 # Simulator instruction rate (inst/s) +host_mem_usage 309268 # Number of bytes of host memory used +host_seconds 27.18 # Real time elapsed on the host +host_tick_rate 68811889767 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 63125943 # Number of instructions simulated +sim_insts 63114079 # Number of instructions simulated sim_seconds 1.870335 # Number of seconds simulated sim_ticks 1870335101500 # Number of ticks simulated system.cpu0.dcache.LoadLockedReq_accesses 188283 # number of LoadLockedReq accesses(hits+misses) @@ -240,7 +240,7 @@ system.cpu0.kern.syscall_144 2 0.88% 99.12% # nu system.cpu0.kern.syscall_147 2 0.88% 100.00% # number of syscalls executed system.cpu0.not_idle_fraction 0.015290 # Percentage of non-idle cycles system.cpu0.numCycles 57193784 # number of cpu cycles simulated -system.cpu0.num_insts 57190172 # Number of instructions executed +system.cpu0.num_insts 57182116 # Number of instructions executed system.cpu0.num_refs 15322419 # Number of memory references system.cpu1.dcache.LoadLockedReq_accesses 16418 # number of LoadLockedReq accesses(hits+misses) system.cpu1.dcache.LoadLockedReq_hits 15129 # number of LoadLockedReq hits @@ -457,7 +457,7 @@ system.cpu1.kern.syscall_90 1 1.00% 98.00% # nu system.cpu1.kern.syscall_132 2 2.00% 100.00% # number of syscalls executed system.cpu1.not_idle_fraction 0.001587 # Percentage of non-idle cycles system.cpu1.numCycles 5937367 # number of cpu cycles simulated -system.cpu1.num_insts 5935771 # Number of instructions executed +system.cpu1.num_insts 5931963 # Number of instructions executed system.cpu1.num_refs 1926645 # Number of memory references system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). |