summaryrefslogtreecommitdiff
path: root/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic
diff options
context:
space:
mode:
authorNathan Binkert <nate@binkert.org>2009-04-22 10:25:17 -0700
committerNathan Binkert <nate@binkert.org>2009-04-22 10:25:17 -0700
commit567cab685965e4e627ac1541a9fdacb93fd6e5fe (patch)
treed79f8cfd677dfc314ccb48630b77785412a9f1bd /tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic
parentca3d82b38ab92114f5056a35bacf0dceb8b6d4a6 (diff)
downloadgem5-567cab685965e4e627ac1541a9fdacb93fd6e5fe.tar.xz
stats: update reference outputs now that compatibility is gone
Because of the initialization bug, it wasn't consistent anyway.
Diffstat (limited to 'tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic')
-rwxr-xr-xtests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout8
-rw-r--r--tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt258
2 files changed, 133 insertions, 133 deletions
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
index 6085e3c17..b85207b5e 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Apr 21 2009 17:45:48
-M5 revision e6dd09514462 6117 default qtip tip stats-update
-M5 started Apr 21 2009 17:54:37
-M5 executing on zizzer
+M5 compiled Apr 22 2009 06:58:24
+M5 revision ce26a627c841 6126 default qtip tip stats_no_compat.diff
+M5 started Apr 22 2009 07:05:27
+M5 executing on maize
command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic -re tests/run.py build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /dist/m5/system/binaries/vmlinux
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
index 2f7905f66..a536081c4 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2944628 # Simulator instruction rate (inst/s)
-host_mem_usage 292076 # Number of bytes of host memory used
-host_seconds 20.39 # Real time elapsed on the host
-host_tick_rate 89719993414 # Simulator tick rate (ticks/s)
+host_inst_rate 4025289 # Simulator instruction rate (inst/s)
+host_mem_usage 293608 # Number of bytes of host memory used
+host_seconds 14.92 # Real time elapsed on the host
+host_tick_rate 122645865621 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 60038305 # Number of instructions simulated
sim_seconds 1.829332 # Number of seconds simulated
@@ -24,17 +24,17 @@ system.cpu.dcache.WriteReq_accesses 6152574 # nu
system.cpu.dcache.WriteReq_hits 5753150 # number of WriteReq hits
system.cpu.dcache.WriteReq_miss_rate 0.064920 # miss rate for WriteReq accesses
system.cpu.dcache.WriteReq_misses 399424 # number of WriteReq misses
-system.cpu.dcache.avg_blocked_cycles_no_mshrs <err: div-0> # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles_no_targets <err: div-0> # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
system.cpu.dcache.avg_refs 6.870767 # Average number of references to valid blocks.
-system.cpu.dcache.blocked_no_mshrs 0 # number of cycles access was blocked
-system.cpu.dcache.blocked_no_targets 0 # number of cycles access was blocked
-system.cpu.dcache.blocked_cycles_no_mshrs 0 # number of cycles access was blocked
-system.cpu.dcache.blocked_cycles_no_targets 0 # number of cycles access was blocked
+system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
+system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
+system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
+system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.cache_copies 0 # number of cache copies performed
system.cpu.dcache.demand_accesses 15682061 # number of demand (read+write) accesses
system.cpu.dcache.demand_avg_miss_latency 0 # average overall miss latency
-system.cpu.dcache.demand_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
+system.cpu.dcache.demand_avg_mshr_miss_latency no_value # average overall mshr miss latency
system.cpu.dcache.demand_hits 13560932 # number of demand (read+write) hits
system.cpu.dcache.demand_miss_latency 0 # number of demand (read+write) miss cycles
system.cpu.dcache.demand_miss_rate 0.135258 # miss rate for demand accesses
@@ -48,8 +48,8 @@ system.cpu.dcache.mshr_cap_events 0 # nu
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.dcache.overall_accesses 15682061 # number of overall (read+write) accesses
system.cpu.dcache.overall_avg_miss_latency 0 # average overall miss latency
-system.cpu.dcache.overall_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
-system.cpu.dcache.overall_avg_mshr_uncacheable_latency <err: div-0> # average overall mshr uncacheable latency
+system.cpu.dcache.overall_avg_mshr_miss_latency no_value # average overall mshr miss latency
+system.cpu.dcache.overall_avg_mshr_uncacheable_latency no_value # average overall mshr uncacheable latency
system.cpu.dcache.overall_hits 13560932 # number of overall hits
system.cpu.dcache.overall_miss_latency 0 # number of overall miss cycles
system.cpu.dcache.overall_miss_rate 0.135258 # miss rate for overall accesses
@@ -87,17 +87,17 @@ system.cpu.icache.ReadReq_accesses 60050143 # nu
system.cpu.icache.ReadReq_hits 59129922 # number of ReadReq hits
system.cpu.icache.ReadReq_miss_rate 0.015324 # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_misses 920221 # number of ReadReq misses
-system.cpu.icache.avg_blocked_cycles_no_mshrs <err: div-0> # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles_no_targets <err: div-0> # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
system.cpu.icache.avg_refs 64.264250 # Average number of references to valid blocks.
-system.cpu.icache.blocked_no_mshrs 0 # number of cycles access was blocked
-system.cpu.icache.blocked_no_targets 0 # number of cycles access was blocked
-system.cpu.icache.blocked_cycles_no_mshrs 0 # number of cycles access was blocked
-system.cpu.icache.blocked_cycles_no_targets 0 # number of cycles access was blocked
+system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
+system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
+system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
+system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.icache.cache_copies 0 # number of cache copies performed
system.cpu.icache.demand_accesses 60050143 # number of demand (read+write) accesses
system.cpu.icache.demand_avg_miss_latency 0 # average overall miss latency
-system.cpu.icache.demand_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
+system.cpu.icache.demand_avg_mshr_miss_latency no_value # average overall mshr miss latency
system.cpu.icache.demand_hits 59129922 # number of demand (read+write) hits
system.cpu.icache.demand_miss_latency 0 # number of demand (read+write) miss cycles
system.cpu.icache.demand_miss_rate 0.015324 # miss rate for demand accesses
@@ -111,8 +111,8 @@ system.cpu.icache.mshr_cap_events 0 # nu
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.icache.overall_accesses 60050143 # number of overall (read+write) accesses
system.cpu.icache.overall_avg_miss_latency 0 # average overall miss latency
-system.cpu.icache.overall_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
-system.cpu.icache.overall_avg_mshr_uncacheable_latency <err: div-0> # average overall mshr uncacheable latency
+system.cpu.icache.overall_avg_mshr_miss_latency no_value # average overall mshr miss latency
+system.cpu.icache.overall_avg_mshr_uncacheable_latency no_value # average overall mshr uncacheable latency
system.cpu.icache.overall_hits 59129922 # number of overall hits
system.cpu.icache.overall_miss_latency 0 # number of overall miss cycles
system.cpu.icache.overall_miss_rate 0.015324 # miss rate for overall accesses
@@ -147,90 +147,90 @@ system.cpu.itb.write_accesses 0 # DT
system.cpu.itb.write_acv 0 # DTB write access violations
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
-system.cpu.kern.callpal 192180 # number of callpals executed
-system.cpu.kern.callpal_cserve 1 0.00% 0.00% # number of callpals executed
-system.cpu.kern.callpal_wrmces 1 0.00% 0.00% # number of callpals executed
-system.cpu.kern.callpal_wrfen 1 0.00% 0.00% # number of callpals executed
-system.cpu.kern.callpal_wrvptptr 1 0.00% 0.00% # number of callpals executed
-system.cpu.kern.callpal_swpctx 4177 2.17% 2.18% # number of callpals executed
-system.cpu.kern.callpal_tbi 54 0.03% 2.20% # number of callpals executed
-system.cpu.kern.callpal_wrent 7 0.00% 2.21% # number of callpals executed
-system.cpu.kern.callpal_swpipl 175249 91.19% 93.40% # number of callpals executed
-system.cpu.kern.callpal_rdps 6771 3.52% 96.92% # number of callpals executed
-system.cpu.kern.callpal_wrkgp 1 0.00% 96.92% # number of callpals executed
-system.cpu.kern.callpal_wrusp 7 0.00% 96.92% # number of callpals executed
-system.cpu.kern.callpal_rdusp 9 0.00% 96.93% # number of callpals executed
-system.cpu.kern.callpal_whami 2 0.00% 96.93% # number of callpals executed
-system.cpu.kern.callpal_rti 5203 2.71% 99.64% # number of callpals executed
-system.cpu.kern.callpal_callsys 515 0.27% 99.91% # number of callpals executed
-system.cpu.kern.callpal_imb 181 0.09% 100.00% # number of callpals executed
+system.cpu.kern.callpal::cserve 1 0.00% # number of callpals executed
+system.cpu.kern.callpal::wrmces 1 0.00% # number of callpals executed
+system.cpu.kern.callpal::wrfen 1 0.00% # number of callpals executed
+system.cpu.kern.callpal::wrvptptr 1 0.00% # number of callpals executed
+system.cpu.kern.callpal::swpctx 4177 2.17% # number of callpals executed
+system.cpu.kern.callpal::tbi 54 0.03% # number of callpals executed
+system.cpu.kern.callpal::wrent 7 0.00% # number of callpals executed
+system.cpu.kern.callpal::swpipl 175249 91.19% # number of callpals executed
+system.cpu.kern.callpal::rdps 6771 3.52% # number of callpals executed
+system.cpu.kern.callpal::wrkgp 1 0.00% # number of callpals executed
+system.cpu.kern.callpal::wrusp 7 0.00% # number of callpals executed
+system.cpu.kern.callpal::rdusp 9 0.00% # number of callpals executed
+system.cpu.kern.callpal::whami 2 0.00% # number of callpals executed
+system.cpu.kern.callpal::rti 5203 2.71% # number of callpals executed
+system.cpu.kern.callpal::callsys 515 0.27% # number of callpals executed
+system.cpu.kern.callpal::imb 181 0.09% # number of callpals executed
+system.cpu.kern.callpal::total 192180 # number of callpals executed
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.hwrei 211319 # number of hwrei instructions executed
system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed
-system.cpu.kern.ipl_count 182562 # number of times we switched to this ipl
-system.cpu.kern.ipl_count_0 74830 40.99% 40.99% # number of times we switched to this ipl
-system.cpu.kern.ipl_count_21 243 0.13% 41.12% # number of times we switched to this ipl
-system.cpu.kern.ipl_count_22 1866 1.02% 42.14% # number of times we switched to this ipl
-system.cpu.kern.ipl_count_31 105623 57.86% 100.00% # number of times we switched to this ipl
-system.cpu.kern.ipl_good 149035 # number of times we switched to this ipl from a different ipl
-system.cpu.kern.ipl_good_0 73463 49.29% 49.29% # number of times we switched to this ipl from a different ipl
-system.cpu.kern.ipl_good_21 243 0.16% 49.46% # number of times we switched to this ipl from a different ipl
-system.cpu.kern.ipl_good_22 1866 1.25% 50.71% # number of times we switched to this ipl from a different ipl
-system.cpu.kern.ipl_good_31 73463 49.29% 100.00% # number of times we switched to this ipl from a different ipl
-system.cpu.kern.ipl_ticks 1829332050500 # number of cycles we spent at this ipl
-system.cpu.kern.ipl_ticks_0 1811927407500 99.05% 99.05% # number of cycles we spent at this ipl
-system.cpu.kern.ipl_ticks_21 20110000 0.00% 99.05% # number of cycles we spent at this ipl
-system.cpu.kern.ipl_ticks_22 80238000 0.00% 99.05% # number of cycles we spent at this ipl
-system.cpu.kern.ipl_ticks_31 17304295000 0.95% 100.00% # number of cycles we spent at this ipl
-system.cpu.kern.ipl_used_0 0.981732 # fraction of swpipl calls that actually changed the ipl
-system.cpu.kern.ipl_used_21 1 # fraction of swpipl calls that actually changed the ipl
-system.cpu.kern.ipl_used_22 1 # fraction of swpipl calls that actually changed the ipl
-system.cpu.kern.ipl_used_31 0.695521 # fraction of swpipl calls that actually changed the ipl
-system.cpu.kern.mode_good_kernel 1909
-system.cpu.kern.mode_good_user 1738
-system.cpu.kern.mode_good_idle 171
-system.cpu.kern.mode_switch_kernel 5949 # number of protection mode switches
-system.cpu.kern.mode_switch_user 1738 # number of protection mode switches
-system.cpu.kern.mode_switch_idle 2097 # number of protection mode switches
-system.cpu.kern.mode_switch_good 1.402439 # fraction of useful protection mode switches
-system.cpu.kern.mode_switch_good_kernel 0.320894 # fraction of useful protection mode switches
-system.cpu.kern.mode_switch_good_user 1 # fraction of useful protection mode switches
-system.cpu.kern.mode_switch_good_idle 0.081545 # fraction of useful protection mode switches
-system.cpu.kern.mode_ticks_kernel 26834202500 1.47% 1.47% # number of ticks spent at the given mode
-system.cpu.kern.mode_ticks_user 1465074000 0.08% 1.55% # number of ticks spent at the given mode
-system.cpu.kern.mode_ticks_idle 1801032773000 98.45% 100.00% # number of ticks spent at the given mode
+system.cpu.kern.ipl_count::0 74830 40.99% # number of times we switched to this ipl
+system.cpu.kern.ipl_count::21 243 0.13% # number of times we switched to this ipl
+system.cpu.kern.ipl_count::22 1866 1.02% # number of times we switched to this ipl
+system.cpu.kern.ipl_count::31 105623 57.86% # number of times we switched to this ipl
+system.cpu.kern.ipl_count::total 182562 # number of times we switched to this ipl
+system.cpu.kern.ipl_good::0 73463 49.29% # number of times we switched to this ipl from a different ipl
+system.cpu.kern.ipl_good::21 243 0.16% # number of times we switched to this ipl from a different ipl
+system.cpu.kern.ipl_good::22 1866 1.25% # number of times we switched to this ipl from a different ipl
+system.cpu.kern.ipl_good::31 73463 49.29% # number of times we switched to this ipl from a different ipl
+system.cpu.kern.ipl_good::total 149035 # number of times we switched to this ipl from a different ipl
+system.cpu.kern.ipl_ticks::0 1811927407500 99.05% # number of cycles we spent at this ipl
+system.cpu.kern.ipl_ticks::21 20110000 0.00% # number of cycles we spent at this ipl
+system.cpu.kern.ipl_ticks::22 80238000 0.00% # number of cycles we spent at this ipl
+system.cpu.kern.ipl_ticks::31 17304295000 0.95% # number of cycles we spent at this ipl
+system.cpu.kern.ipl_ticks::total 1829332050500 # number of cycles we spent at this ipl
+system.cpu.kern.ipl_used::0 0.981732 # fraction of swpipl calls that actually changed the ipl
+system.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
+system.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
+system.cpu.kern.ipl_used::31 0.695521 # fraction of swpipl calls that actually changed the ipl
+system.cpu.kern.mode_good::kernel 1909
+system.cpu.kern.mode_good::user 1738
+system.cpu.kern.mode_good::idle 171
+system.cpu.kern.mode_switch::kernel 5949 # number of protection mode switches
+system.cpu.kern.mode_switch::user 1738 # number of protection mode switches
+system.cpu.kern.mode_switch::idle 2097 # number of protection mode switches
+system.cpu.kern.mode_switch_good::kernel 0.320894 # fraction of useful protection mode switches
+system.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
+system.cpu.kern.mode_switch_good::idle 0.081545 # fraction of useful protection mode switches
+system.cpu.kern.mode_switch_good::total 1.402439 # fraction of useful protection mode switches
+system.cpu.kern.mode_ticks::kernel 26834202500 1.47% # number of ticks spent at the given mode
+system.cpu.kern.mode_ticks::user 1465074000 0.08% # number of ticks spent at the given mode
+system.cpu.kern.mode_ticks::idle 1801032773000 98.45% # number of ticks spent at the given mode
system.cpu.kern.swap_context 4178 # number of times the context was actually changed
-system.cpu.kern.syscall 326 # number of syscalls executed
-system.cpu.kern.syscall_2 8 2.45% 2.45% # number of syscalls executed
-system.cpu.kern.syscall_3 30 9.20% 11.66% # number of syscalls executed
-system.cpu.kern.syscall_4 4 1.23% 12.88% # number of syscalls executed
-system.cpu.kern.syscall_6 42 12.88% 25.77% # number of syscalls executed
-system.cpu.kern.syscall_12 1 0.31% 26.07% # number of syscalls executed
-system.cpu.kern.syscall_15 1 0.31% 26.38% # number of syscalls executed
-system.cpu.kern.syscall_17 15 4.60% 30.98% # number of syscalls executed
-system.cpu.kern.syscall_19 10 3.07% 34.05% # number of syscalls executed
-system.cpu.kern.syscall_20 6 1.84% 35.89% # number of syscalls executed
-system.cpu.kern.syscall_23 4 1.23% 37.12% # number of syscalls executed
-system.cpu.kern.syscall_24 6 1.84% 38.96% # number of syscalls executed
-system.cpu.kern.syscall_33 11 3.37% 42.33% # number of syscalls executed
-system.cpu.kern.syscall_41 2 0.61% 42.94% # number of syscalls executed
-system.cpu.kern.syscall_45 54 16.56% 59.51% # number of syscalls executed
-system.cpu.kern.syscall_47 6 1.84% 61.35% # number of syscalls executed
-system.cpu.kern.syscall_48 10 3.07% 64.42% # number of syscalls executed
-system.cpu.kern.syscall_54 10 3.07% 67.48% # number of syscalls executed
-system.cpu.kern.syscall_58 1 0.31% 67.79% # number of syscalls executed
-system.cpu.kern.syscall_59 7 2.15% 69.94% # number of syscalls executed
-system.cpu.kern.syscall_71 54 16.56% 86.50% # number of syscalls executed
-system.cpu.kern.syscall_73 3 0.92% 87.42% # number of syscalls executed
-system.cpu.kern.syscall_74 16 4.91% 92.33% # number of syscalls executed
-system.cpu.kern.syscall_87 1 0.31% 92.64% # number of syscalls executed
-system.cpu.kern.syscall_90 3 0.92% 93.56% # number of syscalls executed
-system.cpu.kern.syscall_92 9 2.76% 96.32% # number of syscalls executed
-system.cpu.kern.syscall_97 2 0.61% 96.93% # number of syscalls executed
-system.cpu.kern.syscall_98 2 0.61% 97.55% # number of syscalls executed
-system.cpu.kern.syscall_132 4 1.23% 98.77% # number of syscalls executed
-system.cpu.kern.syscall_144 2 0.61% 99.39% # number of syscalls executed
-system.cpu.kern.syscall_147 2 0.61% 100.00% # number of syscalls executed
+system.cpu.kern.syscall::2 8 2.45% # number of syscalls executed
+system.cpu.kern.syscall::3 30 9.20% # number of syscalls executed
+system.cpu.kern.syscall::4 4 1.23% # number of syscalls executed
+system.cpu.kern.syscall::6 42 12.88% # number of syscalls executed
+system.cpu.kern.syscall::12 1 0.31% # number of syscalls executed
+system.cpu.kern.syscall::15 1 0.31% # number of syscalls executed
+system.cpu.kern.syscall::17 15 4.60% # number of syscalls executed
+system.cpu.kern.syscall::19 10 3.07% # number of syscalls executed
+system.cpu.kern.syscall::20 6 1.84% # number of syscalls executed
+system.cpu.kern.syscall::23 4 1.23% # number of syscalls executed
+system.cpu.kern.syscall::24 6 1.84% # number of syscalls executed
+system.cpu.kern.syscall::33 11 3.37% # number of syscalls executed
+system.cpu.kern.syscall::41 2 0.61% # number of syscalls executed
+system.cpu.kern.syscall::45 54 16.56% # number of syscalls executed
+system.cpu.kern.syscall::47 6 1.84% # number of syscalls executed
+system.cpu.kern.syscall::48 10 3.07% # number of syscalls executed
+system.cpu.kern.syscall::54 10 3.07% # number of syscalls executed
+system.cpu.kern.syscall::58 1 0.31% # number of syscalls executed
+system.cpu.kern.syscall::59 7 2.15% # number of syscalls executed
+system.cpu.kern.syscall::71 54 16.56% # number of syscalls executed
+system.cpu.kern.syscall::73 3 0.92% # number of syscalls executed
+system.cpu.kern.syscall::74 16 4.91% # number of syscalls executed
+system.cpu.kern.syscall::87 1 0.31% # number of syscalls executed
+system.cpu.kern.syscall::90 3 0.92% # number of syscalls executed
+system.cpu.kern.syscall::92 9 2.76% # number of syscalls executed
+system.cpu.kern.syscall::97 2 0.61% # number of syscalls executed
+system.cpu.kern.syscall::98 2 0.61% # number of syscalls executed
+system.cpu.kern.syscall::132 4 1.23% # number of syscalls executed
+system.cpu.kern.syscall::144 2 0.61% # number of syscalls executed
+system.cpu.kern.syscall::147 2 0.61% # number of syscalls executed
+system.cpu.kern.syscall::total 326 # number of syscalls executed
system.cpu.not_idle_fraction 0.016415 # Percentage of non-idle cycles
system.cpu.numCycles 3658664408 # number of cpu cycles simulated
system.cpu.num_insts 60038305 # Number of instructions executed
@@ -253,17 +253,17 @@ system.iocache.ReadReq_misses 174 # nu
system.iocache.WriteReq_accesses 41552 # number of WriteReq accesses(hits+misses)
system.iocache.WriteReq_miss_rate 1 # miss rate for WriteReq accesses
system.iocache.WriteReq_misses 41552 # number of WriteReq misses
-system.iocache.avg_blocked_cycles_no_mshrs <err: div-0> # average number of cycles each access was blocked
-system.iocache.avg_blocked_cycles_no_targets <err: div-0> # average number of cycles each access was blocked
+system.iocache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
+system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
system.iocache.avg_refs 0 # Average number of references to valid blocks.
-system.iocache.blocked_no_mshrs 0 # number of cycles access was blocked
-system.iocache.blocked_no_targets 0 # number of cycles access was blocked
-system.iocache.blocked_cycles_no_mshrs 0 # number of cycles access was blocked
-system.iocache.blocked_cycles_no_targets 0 # number of cycles access was blocked
+system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
+system.iocache.blocked::no_targets 0 # number of cycles access was blocked
+system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
+system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.iocache.cache_copies 0 # number of cache copies performed
system.iocache.demand_accesses 41726 # number of demand (read+write) accesses
system.iocache.demand_avg_miss_latency 0 # average overall miss latency
-system.iocache.demand_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
+system.iocache.demand_avg_mshr_miss_latency no_value # average overall mshr miss latency
system.iocache.demand_hits 0 # number of demand (read+write) hits
system.iocache.demand_miss_latency 0 # number of demand (read+write) miss cycles
system.iocache.demand_miss_rate 1 # miss rate for demand accesses
@@ -277,8 +277,8 @@ system.iocache.mshr_cap_events 0 # nu
system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
system.iocache.overall_accesses 41726 # number of overall (read+write) accesses
system.iocache.overall_avg_miss_latency 0 # average overall miss latency
-system.iocache.overall_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
-system.iocache.overall_avg_mshr_uncacheable_latency <err: div-0> # average overall mshr uncacheable latency
+system.iocache.overall_avg_mshr_miss_latency no_value # average overall mshr miss latency
+system.iocache.overall_avg_mshr_uncacheable_latency no_value # average overall mshr uncacheable latency
system.iocache.overall_hits 0 # number of overall hits
system.iocache.overall_miss_latency 0 # number of overall miss cycles
system.iocache.overall_miss_rate 1 # miss rate for overall accesses
@@ -308,17 +308,17 @@ system.l2c.UpgradeReq_miss_rate 1 # mi
system.l2c.UpgradeReq_misses 124945 # number of UpgradeReq misses
system.l2c.Writeback_accesses 428893 # number of Writeback accesses(hits+misses)
system.l2c.Writeback_hits 428893 # number of Writeback hits
-system.l2c.avg_blocked_cycles_no_mshrs <err: div-0> # average number of cycles each access was blocked
-system.l2c.avg_blocked_cycles_no_targets <err: div-0> # average number of cycles each access was blocked
+system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
+system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
system.l2c.avg_refs 1.727246 # Average number of references to valid blocks.
-system.l2c.blocked_no_mshrs 0 # number of cycles access was blocked
-system.l2c.blocked_no_targets 0 # number of cycles access was blocked
-system.l2c.blocked_cycles_no_mshrs 0 # number of cycles access was blocked
-system.l2c.blocked_cycles_no_targets 0 # number of cycles access was blocked
+system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked
+system.l2c.blocked::no_targets 0 # number of cycles access was blocked
+system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
+system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.l2c.cache_copies 0 # number of cache copies performed
system.l2c.demand_accesses 2963417 # number of demand (read+write) accesses
system.l2c.demand_avg_miss_latency 0 # average overall miss latency
-system.l2c.demand_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
+system.l2c.demand_avg_mshr_miss_latency no_value # average overall mshr miss latency
system.l2c.demand_hits 1696652 # number of demand (read+write) hits
system.l2c.demand_miss_latency 0 # number of demand (read+write) miss cycles
system.l2c.demand_miss_rate 0.427468 # miss rate for demand accesses
@@ -332,8 +332,8 @@ system.l2c.mshr_cap_events 0 # nu
system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
system.l2c.overall_accesses 2963417 # number of overall (read+write) accesses
system.l2c.overall_avg_miss_latency 0 # average overall miss latency
-system.l2c.overall_avg_mshr_miss_latency <err: div-0> # average overall mshr miss latency
-system.l2c.overall_avg_mshr_uncacheable_latency <err: div-0> # average overall mshr uncacheable latency
+system.l2c.overall_avg_mshr_miss_latency no_value # average overall mshr miss latency
+system.l2c.overall_avg_mshr_uncacheable_latency no_value # average overall mshr uncacheable latency
system.l2c.overall_hits 1696652 # number of overall hits
system.l2c.overall_miss_latency 0 # number of overall miss cycles
system.l2c.overall_miss_rate 0.427468 # miss rate for overall accesses
@@ -351,15 +351,15 @@ system.l2c.tagsinuse 30228.585605 # Cy
system.l2c.total_refs 1867269 # Total number of references to valid blocks.
system.l2c.warmup_cycle 765422500 # Cycle when the warmup percentage was hit.
system.l2c.writebacks 119147 # number of writebacks
-system.tsunami.ethernet.coalescedRxDesc <err: div-0> # average number of RxDesc's coalesced into each post
-system.tsunami.ethernet.coalescedRxIdle <err: div-0> # average number of RxIdle's coalesced into each post
-system.tsunami.ethernet.coalescedRxOk <err: div-0> # average number of RxOk's coalesced into each post
-system.tsunami.ethernet.coalescedRxOrn <err: div-0> # average number of RxOrn's coalesced into each post
-system.tsunami.ethernet.coalescedSwi <err: div-0> # average number of Swi's coalesced into each post
-system.tsunami.ethernet.coalescedTotal <err: div-0> # average number of interrupts coalesced into each post
-system.tsunami.ethernet.coalescedTxDesc <err: div-0> # average number of TxDesc's coalesced into each post
-system.tsunami.ethernet.coalescedTxIdle <err: div-0> # average number of TxIdle's coalesced into each post
-system.tsunami.ethernet.coalescedTxOk <err: div-0> # average number of TxOk's coalesced into each post
+system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post
+system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post
+system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post
+system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post
+system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post
+system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post
+system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post
+system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post
+system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA